Relative Movement Between The Substrate And A Confined Pool Of Etchant Patents (Class 216/90)
  • Publication number: 20040094268
    Abstract: Methods for etching a target conducted in an etching solution that is substantially free of entrained oxygen gas, thereby inhibiting oxidation of an etching target, and apparatus for achieving the same. An etching solution that is substantially free of entrained oxygen gas is achieved by driving off the entrained oxygen gas with an inert gas.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 20, 2004
    Inventor: Justin K. Brask
  • Patent number: 6730605
    Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: May 4, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Chantal Arena-Foster, Robert F. Foster, Joseph T. Hillman, Thomas J. Licata, Tugrul Yasar
  • Patent number: 6726847
    Abstract: This invention relates to methods for regenerating spent DNA detection chips for further use. Specifically, this invention relates to a method for removal of silver from used DNA detection chips that employ gold nanoparticle-oligonucleotide conjugate probes and that use silver staining for signal amplification.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: April 27, 2004
    Assignee: Northwestern University
    Inventors: Chad A. Mirkin, So-Jung Park, Rongchao Jin
  • Publication number: 20040074871
    Abstract: The invention is an improvement in the metal finishing processes disclosed in U.S. Pat. No. 4,818,333. The improvement arises in the use of nonabrasive media, such as stainless steel or plastic, in combination with chemicals that are reactive to the metal surface processed. The invention also includes metal articles finished using this process.
    Type: Application
    Filed: October 13, 2003
    Publication date: April 22, 2004
    Inventors: Jerry Holland, Mark Michaud, Michael Salerno, Gary Sroka, Lane Winkelmann
  • Publication number: 20040069748
    Abstract: An electrochemical process for simultaneously stripping diverse coatings from a metal substrate and, more particularly to the removal of MCrAlY and aluminide coatings from a base metal.
    Type: Application
    Filed: October 9, 2002
    Publication date: April 15, 2004
    Inventors: Michael A. Kryzman, Mark Jaworowski
  • Patent number: 6716365
    Abstract: A wafer protected by a protective film on a first surface is mounted on a base member. An etching bath cylinder, to which a gasket for sealing the periphery of the wafer on a second surface that is opposite to the first surface is attached, is placed on the wafer. An etching chamber is formed by vacuum chucking with a vacuum chuck cylinder in an etching pot. Nitrogen gas is supplied from a high pressure gas supply source to a hermetic room, which is formed by the base member and the wafer, while being regulated by a pressure regulator. The pressure regulator includes a water reservoir, a decompressing room having an orifice, a first balance tube, and a second balance tube. The wafer is etched while a pressure higher than that applied to the second surface from an etchant is put on the protective film by the nitrogen gas.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: April 6, 2004
    Assignee: Denso Corporation
    Inventors: Atusi Sakaida, Toshihisa Taniguchi
  • Patent number: 6699400
    Abstract: In a process using a hot phosphoric acid etchant (12) to etch silicon nitride on a semiconductor wafer (15) submerged in a tank (11) of the etchant (12), a recirculating path is established for the etchant (12). A porous filter (35) is coated with silicon nitride and installed in the recirculating path. As the etchant (12) in the recirculating path flows through the porous filter (35), the silicon nitride on the porous filter (35) dissolves into the etchant (12). In the tank (11), the silicon nitride dissolved in the etchant (12) significantly suppresses the etch of silicon dioxide on the semiconductor wafer (15), thereby enhancing the etch selectivity of the process. Monitoring and maintaining the concentration of the silicon nitride in the etchant (12) stabilizes the etch selectivity of the process.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: March 2, 2004
    Inventors: Arne W. Ballantine, Scott A. Estes, Emily E. Fisch, Gary Milo, Ronald A. Warren
  • Patent number: 6660640
    Abstract: A process for planarizing a patterned metal structure for a magnetic thin film head includes the steps of applying an encapsulation/planarizing material on a substrate, spinning the substrate in a photoresist spinner or similar machine, curing the encapsulation/planarizing layer by energetic particles such as an electron beam. The planarizing process further comprises the step of polishing the entire structure using a conventional chemical-mechanical polishing step. The curing step takes place at the substrate temperature less than 200° C., which prevents the damages of the thin film head structures such as MR and GMR sensors. This process is cheap, efficient and easy to apply.
    Type: Grant
    Filed: July 11, 2000
    Date of Patent: December 9, 2003
    Assignee: International Business Machines Corporation
    Inventors: Robert Dennis Miller, Alfred Floyd Renaldo, Willi Volksen, Howard Gordon Zolla
  • Patent number: 6648933
    Abstract: Powder composition and method for polishing stone. The present invention relates to a powder composition and to a method for polishing stone, in particular granite, said method making use of said powder composition.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: November 18, 2003
    Inventors: Wing Thye Lum, Whee Huat Tan
  • Patent number: 6624087
    Abstract: An etchant for patterning indium tin oxide, wherein the etchant is a mixed solution of HCl, CH3COOH, and water, and a method of fabricating a liquid crystal display device are disclosed in the present invention. The method includes forming a gate electrode on a substrate, forming a gate insulating layer and an amorphous silicon layer on the gate electrode including the substrate, forming an active area by patterning the amorphous silicon layer, forming a source electrode and a drain electrode on the active area, forming a passivation layer on the source electrode and the drain electrode and the gate insulating layer, forming a contact hole exposing a part of the drain electrode, forming an indium tin oxide layer on the passivation layer, and forming an indium tin oxide electrode by selectively etching the indium tin oxide layer using a mixed solution of HCl, CH3COOH, and water as an etchant.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: September 23, 2003
    Assignee: LG. Philips Co., Ltd.
    Inventors: Byung Tae Roh, You Shin Ahn
  • Patent number: 6616514
    Abstract: The present invention provides a chemical mechanical polishing slurry for use in removing a first substance from a surface of an article in preference to silicon nitride by chemical mechanical polishing. The chemical mechanical polishing slurry according to the invention includes an abrasive, an aqueous medium, and an organic polyol that does not dissociate protons, said organic polyol including a compound having at least three hydroxyl groups that are not dissociable in the aqueous medium, or a polymer formed from at least one monomer having at least three hydroxyl groups that are not dissociable in the aqueous medium. In the preferred embodiment, ceria particles are used as the abrasive and the organic polyol is selected from the group consisting of mannitol, sorbitol, mannose, xylitol, sorbose, sucrose, and dextrin. The chemical mechanical polishing slurry can further optionally include acids or bases for adjusting the pH within an effective range of from about 2 to about 12.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: September 9, 2003
    Assignee: Ferro Corporation
    Inventors: Brian Edelbach, Eric Oswald, Yie-Shein Her
  • Patent number: 6586143
    Abstract: A method for checking the position of alignment marks after a chemical mechanical polishing (CMP) process and automatically compensating for alignment of a wafer stepper based on the position checking is described. A wafer is provided having an alignment mark thereon for the purpose of aligning a reticle in the wafer stepper. The wafer is polished by CMP. Thereafter, alignment mark positioning is checked for deviation from a normal vectorial position of the alignment mark whereby information about the deviation is fed back to the wafer stepper and wherein the wafer stepper automatically compensates for correctable alignment error based on the deviation information.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: July 1, 2003
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Juan Boon Tan, Tak Yan Tse, Sajan Marokkey Raphael, Fang Hong Gn
  • Patent number: 6579798
    Abstract: A process for polishing a semiconductor wafer includes the steps of providing a plurality of wafers, forming a first layer, such as a barrier layer, over at least a portion of each wafer, and forming at least one layer including copper over at least a portion of each first layer. The process also includes the steps of providing a first polishing pad, providing a buffing pad, providing a plurality of operatively connected wafer carriers, and disposing a wafer within each of the wafer carriers. The process further includes the steps of disposing a first slurry composition on the first polishing pad and polishing a first wafer with the first polishing pad for a first length of time, in which the first polishing pad substantially removes the copper layer of the first wafer.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: June 17, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Basab Chatterjee, Mona Eissa, Chad Kaneshige, Vincent Korthuis, Barry Lanier, Satyavolu Papa Rao
  • Patent number: 6566268
    Abstract: A method of planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is described. The method includes the step of positioning a fluid flow surface relative to the wafer surface so that (i) a space is defined between the wafer surface and the fluid flow surface, and (ii) the elevated portion of the semiconductor wafer is positioned in the space. The method also includes the step of advancing a fluid within the space so that the fluid contacts and erodes the elevated portion of the semiconductor wafer. An associated apparatus for planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is also described.
    Type: Grant
    Filed: July 25, 2002
    Date of Patent: May 20, 2003
    Assignee: LSI Logic Corporation
    Inventor: John Gregory
  • Patent number: 6547974
    Abstract: A printed circuit board is produced by patterning a resist layer according to a circuit mask that defines desired circuit paths. The resist pattern layer is formed by removing the resist from the board in the desired circuit paths and a conductive material is plated onto the board in the resist voids defined by the circuit mask so that the height of the conductive material relative to the substrate equals or exceeds the height of the resist layer relative to the substrate. A low-reactive solution is applied over the conductive material and removes a surface portion of the conductive material. As the solution removes the conductive layer, it forms a film barrier and the solution composition changes, both of which substantially inhibits any further removal of the conductive material. Next, the film barrier is removed from the board allowing another film barrier to form stimulating the removal of further conductive material.
    Type: Grant
    Filed: June 27, 1995
    Date of Patent: April 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: Stanley Michael Albrechta, Christina Marie Boyko, Kathleen Lorraine Covert, Natalie Barbara Feilchenfeld, Voya Rista Markovich, William Earl Wilson, Michael Wozniak
  • Publication number: 20030054662
    Abstract: Systems and methods are described for synthesis of films, coatings or layers using surfactants. A method includes providing a surfactant as an impurity within at least one of a first precursor layer that is coupled to a first substrate and a second precursor layer that is coupled to a second substrate; forming a composition layer; and moving the first substrate relative to the second substrate, wherein the composition layer remains coupled to the second substrate.
    Type: Application
    Filed: September 20, 2001
    Publication date: March 20, 2003
    Inventor: Billy J. Stanbery
  • Patent number: 6497238
    Abstract: A method of manufacturing electronic devices, in particular, but not exclusively, semiconductor devices, and apparatus for carrying out such a method, in which method substrates 1, which are provided at a surface 2 with a silicon oxide-containing material 3 to be removed, are subjected, while being divided into successive batches, to a wet treatment in a bath 4 containing a solution 5 of hydrofluoric acid in water. During this wet treatment the conductivity of the solution 5 is monitored and the silicon oxide-containing material 3 is removed, thereby forming ionic components. The monitored conductivity is brought to approximately a desired conductivity at time intervals by adding hydrofluoric acid and/or water to the solution 5 inside the bath 4.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: December 24, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Dirk Maarten Knotter
  • Publication number: 20020190028
    Abstract: A method of improving the uniformity of etching of a film on an article, the method including the steps of immersing the article containing the film into a tank of etchant, rotating the article while in the etchant for a desired amount of time so as to cause improved uniformity of etching of the film compared to etching without rotating the article, and removing the article from the tank of etchant. In a preferred embodiment of the invention, the article is a semiconductor wafer.
    Type: Application
    Filed: May 31, 2001
    Publication date: December 19, 2002
    Applicant: International Business Machines Corporation
    Inventors: Kamalesh K. Srivastava, Mary C. Cullinan-Scholl, Lisa A. Fanti, Jonathan H. Griffith, Randolph F. Knarr
  • Patent number: 6461470
    Abstract: An apparatus for etching a glass substrate 30 includes a first bath 13 containing an etchant, at least one porous panel having a plurality of jet holes 16 in the first bath, the porous panel containing the etchant to jet the etchant against the glass substrate, a container 20 storing the etchant, and a pump 24 supplying the etchant from the container to the porous panel, the pump being connected to the container and the porous panel.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: October 8, 2002
    Assignee: L.G. Philips LCD Co., Ltd.
    Inventor: Woong Kwon Kim
  • Publication number: 20020125214
    Abstract: This invention relates to methods for regenerating spent DNA detection chips for further use. Specifically, this invention relates to a method for removal of silver from used DNA detection chips that employ gold nanoparticle-oligonucleotide conjugate probes and that use silver staining for signal amplification.
    Type: Application
    Filed: November 30, 2001
    Publication date: September 12, 2002
    Inventors: Chad A. Mirkin, So-Jung Park, Rongchao Jin
  • Patent number: 6440320
    Abstract: A substrate processing method and apparatus capable of uniformly supplying a processing liquid to a substrate surface in substrate processing such as development processing without exerting an influence on the physical properties of the processing liquid and without damaging the substrate. A rotating blade is disposed above the horizontally placed substrate so as to face the substrate. The processing liquid is supplied to the surface of the substrate, and the rotating blade is rotated while being kept out of contact with the processing liquid to induce a gas current. The gas current forms a mass of processing liquid having an internal circulating current on the substrate surface below the rotating blade.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: August 27, 2002
    Assignee: Ebara Corporation
    Inventor: Hiroyuki Shinozaki
  • Publication number: 20020080690
    Abstract: Fabrication of an MO disc, the formation of a master pattern of servo and track information, and the subsequent transfer of that pattern to a series of pits and grooves on a substrate. On top of that substrate, at least one sacrificial layer is provided atop a relatively hard layer. The recording stack may be provided with both silicon nitride and silicon dioxide top layers, with the silicon dioxide layer acting as a sacrificial layer to ensure that the hard layer, of silicon nitride, remains at the end of the process. A layer of aluminum or aluminum alloy may be deposited, with the aluminum plugs filling the grooves and pits (created by the embossed servo information) to a level higher than any of the adjacent layers of silicon dioxide, silicon nitride, or similar dielectric layer.
    Type: Application
    Filed: July 23, 2001
    Publication date: June 27, 2002
    Applicant: SEAGATE TECHNOLOGY, LLC.
    Inventors: Karl A. Belser, John H. Jerman
  • Patent number: 6409936
    Abstract: A composition and method of construction and use therefor in chemical-mechanical polishing (“CMP”) of one or more substrate assemblies is described. More particularly, a polishing solution comprising etchant, abrasive particles, and surfactant and methods of mixing to form and to dispense the polishing solution are described. One or more of the etchant, abrasive particles, and/or surfactant may comprise a liquid medium. Etchant, surfactant or abrasive particles may be premixed, mixed in-situ (“point of use mixing”), or any combination thereof. The surfactant may be ionic or nonionic. In particular, a polyoxyethylene may be used, and more particularly, a polyoxyethylene ester or ether may be used.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: June 25, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Karl M. Robinson, Whonchee Lee
  • Patent number: 6402883
    Abstract: A pad conditioner having integral conditioning points. The pad conditioner includes a conditioning surface having a first integral conditioning point extending from the conditioning surface. For one embodiment the conditioning surface is formed of diamond and an array of integral conditioning points including the first integral conditioning point extends from the diamond surface.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: June 11, 2002
    Assignee: Intel Corporation
    Inventor: Bruce H. Billett
  • Publication number: 20020056702
    Abstract: This invention relates to a method of forming a substrate with preparing a surface capable of making a cocontinuous bond comprising the steps of 1) obtaining a copper or copper alloy substrate and 2) applying an etching composition which comprises (a) an acid, (b) an oxidizing agent, (c) a copper complexing agent, and (d) a copper complex, wherein the copper complex is present in an amount which precipitates when applied to the copper or copper alloy substrate. The method also includes the step of 3) treating the substrate with a coating composition and/or 4) applying a stripping composition to the substrate. The invention also relates to copper articles, having surface porosity, including multilayer articles such as printed circuit boards and compositions used in the method. The present invention provides microporous copper or copper alloy substrates which have improved adhesion properties to organic material.
    Type: Application
    Filed: August 13, 2001
    Publication date: May 16, 2002
    Inventors: Craig V. Bishop, George S. Bokisa, Robert J. Durante, John R. Kochilla
  • Patent number: 6383332
    Abstract: A method of planarizing a semiconductor wafer having a polishing endpoint layer that includes a ligand is disclosed. One step of the method includes polishing a first side of the wafer in order to remove the ligand from the wafer. Another step of the method includes determining that a chelating agent has bound the ligand due to the polishing step removing the ligand of the polishing endpoint layer. The method also includes the step of terminating the polishing step in response to determining that the chelating agent has bound the ligand. A polishing system is also disclosed which detects a polishing endpoint based upon a chelating agent binding a ligand of a polishing endpoint layer of a semiconductor device.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: May 7, 2002
    Assignee: LSI Logic Corporation
    Inventors: Gail D. Shelton, Gayle W. Miller
  • Publication number: 20020040888
    Abstract: A process for selectively etching a surface of an anodized aluminum article. A preferred process includes: providing an aluminum sheet or web including first and second sides having anodized finishes; etching the first side to improve the adhesion capabilities of that side but not etching the second side so that the second side retains its anodized finish. The anodized aluminum may be colored before etching, thus the second side retains its color after etching. In a more preferred embodiment, sodium hydroxide or phosphoric acid is used to etch the anodized aluminum. Optionally, the etching of the second side is prevented by administering gas or liquid over the second side, masking the second side with a protective film, or shielding the second side with a shield. Further, the gas or liquid administered over the second side may be controlled to increase or decrease the rate of etching on the first side.
    Type: Application
    Filed: July 5, 2001
    Publication date: April 11, 2002
    Inventors: Gregory S. Marczak, Rick A. Minner
  • Patent number: 6361708
    Abstract: A method and an apparatus for polishing a metal film formed on a semiconductor device are disclosed. A semiconductor wafer is immersed in an oxidizing solution before it is polished. As a result, the undesirable part of a W film deposited on the circumferential edge of the wafer is removed by etching.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: March 26, 2002
    Assignee: NEC Corporation
    Inventors: Akira Kubo, Mieko Suzuki
  • Patent number: 6361646
    Abstract: An apparatus to generate an endpoint signal to control the polishing of thin films on a semiconductor wafer surface includes a through-hole in a polish pad, a light source, a fiber optic cable, a light sensor, and a computer. A pad assembly includes the polish pad, a pad backer, and a pad backing plate. The pad backer includes a pinhole and a canal that holds the fiber optic cable. The pad backer holds the polish pad so that the through-hole is coincident with the pinhole opening. A wafer chuck holds a semiconductor wafer so that the surface to be polished is against the polish pad. The light source provides light within a predetermined bandwidth. The fiber optic cable propagates the light through the through-hole opening to illuminate the surface as the pad assembly orbits and the chuck rotates. The light sensor receives reflected light from the surface through the fiber optic cable and generates reflected spectral data. The computer receives the reflected spectral data and calculates an endpoint signal.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: March 26, 2002
    Assignee: Speedfam-IPEC Corporation
    Inventors: Thomas Frederick Allen Bibby, Jr., John A. Adams, Robert A. Eaton
  • Patent number: 6351682
    Abstract: The present invention provides semiconductor workpiece position sensors and methods of monitoring the position of a semiconductor workpiece. One embodiment of the invention provides a method of monitoring position of a semiconductor workpiece including providing a process module including a process container having a process fluid therein and a workpiece holder configured to support the semiconductor workpiece, moving the semiconductor workpiece toward the process fluid within the process container, applying a reference signal to the process module, and indicating position of the semiconductor workpiece with respect to the process fluid responsive to the reference signal.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: February 26, 2002
    Assignee: Semitool, Inc.
    Inventor: James W. Doolittle
  • Publication number: 20020022370
    Abstract: Metal CMP with reduced dishing and overpolish insensitivity is achieved with an abrasive-free polishing composition having a pH and oxidation-reduction potential in the domain of passivation of the metal and, therefore, a low static etching rate at high temperatures, e.g., higher than 50° C. Embodiments of the present invention comprise CMP of Cu film without any abrasive using a composition comprising one or more chelating agents, one or more oxidizers, one or more corrosion inhibitors, one or more agents to achieve a pH of about 3 to about 10 and deionized water.
    Type: Application
    Filed: April 6, 2000
    Publication date: February 21, 2002
    Inventors: Lizhong Sun, Shijian Li, Fritz Redeker
  • Patent number: 6340434
    Abstract: A method for chemical-mechanical polishing of a layer that is deposited on a surface of an integrated circuit substrate is described. The method includes: (1) immobilizing the integrated circuit substrate using a substrate holder such that the integrated circuit substrate surface is positioned against a surface of a polishing pad, which is mounted on a supporting surface; (2) a first stage of polishing the substrate surface including maintaining a predetermined difference between the rotational velocity of the polishing pad and the rotational velocity of the substrate holder allowing an endpoint of the chemical-mechanical polishing process of the layer to be detected; and (3) a second stage of polishing the substrate such that the rotational velocity of the polishing pad and the rotational velocity of the substrate holder are substantially the same to produce a substantially planar substrate surface.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: January 22, 2002
    Assignee: LSI Logic Corporation
    Inventors: Hiroshi Mizuno, Osamu Kinoshita, Tetsuaki Murohashi, Akihisa Ueno, Yoshifumi Sakuma, Kostas Amberiadis
  • Patent number: 6303041
    Abstract: PURPOSE: To increase the mechanical strength of a connected optical fiber, by carrying out a surface treatment by dipping the melt-struck connection part of the optical fiber in a treating liquid of strong acid and then in a treating liquid of hydrofluoric acid. CONSTITUTION: A treatment liquid 6 of a mixture solution consisting of 1 or ≧2 kinds of strong acid such as sulfuric acid, hydrochloric acid, nitric acid, etc. is stored in a liquid tank 7. A melt-stuck connection part 5 of end parts 2A and 2B of optical fibers 1A and 1B is dipped in the tank 7. Thus coat residue, dust, metallic particles, etc. sticking to the surface of the part 5 are removed. Then the part 5 is dipped in a treating liquid containing an aqueous solution of hydrofluoric acid, ammonium fluoride, sodium fluoride in a liquid tank 8. Thus the minute flaws on the surface are removed or annealed. As a result, the strength is increased at the part 5.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: October 16, 2001
    Assignee: Pirelli Cavi e Sistemi S.p.A.
    Inventors: Richard Ian Laming, Laurence Reekie, Liang Dong, Jose Luis Cruz
  • Publication number: 20010010306
    Abstract: A subcritical or supercritical water is used to selectively etch a silicon nitride film against a silicon dioxide film or to selectively etch a silicon dioxide film against a crystalline silicon region. This method is applicable to a process of forming a MISFET or a charge emitting device.
    Type: Application
    Filed: January 30, 2001
    Publication date: August 2, 2001
    Inventor: Kiyoyuki Morita
  • Publication number: 20010009246
    Abstract: A method of removing a ceramic coating (18), and particularly zirconia-containing thermal barrier coating (TBC) materials such as yttria-stabilized zirconia (YSZ), that has been either intentionally or unintentionally deposited on the surface of a component (10). The method entails subjecting the ceramic coating (18) to an aqueous solution containing an acid fluoride salt, such as ammonium bifluoride (NH4HF2) or sodium bifluoride (NaHF2), and a corrosion inhibitor. The method is capable of completely removing the ceramic coating (18) without removing or damaging the underlying substrate material, which may include a metallic bond coat (16).
    Type: Application
    Filed: December 5, 2000
    Publication date: July 26, 2001
    Inventors: Robert George Zimmerman, William Clarke Brooks, Roger Dale Wustman, John Douglas Evans
  • Publication number: 20010009247
    Abstract: A method of removing a ceramic coating, such as a thermal barrier coating (TBC) of yttria-stabilized zirconia (YSZ), from the surface of a component, such as a gas turbine engine component. The method generally entails subjecting the ceramic coating to an aqueous solution of ammonium bifluoride, optionally containing a wetting agent, such as by immersing the component in the solution while maintained at an elevated temperature. Using the method of the invention, a ceramic coating can be completely removed from the component and any cooling holes, with essentially no degradation of the bond coat.
    Type: Application
    Filed: February 23, 2001
    Publication date: July 26, 2001
    Inventor: William C. Brooks
  • Patent number: 6264848
    Abstract: Fabrication of an MO disc, the formation of a master pattern of servo and track information, and the subsequent transfer of that pattern to a series of pits and grooves on a substrate. On top of that substrate, at least one sacrificial layer is provided atop a relatively hard layer. The recording stack may be provided with both silicon nitride and silicon dioxide top layers, with the silicon dioxide layer acting as a sacrificial layer to ensure that the hard layer, of silicon nitride, remains at the end of the process. A layer of aluminum or aluminum alloy may be deposited, with the aluminum plugs filling the grooves and pits (created by the embossed servo information) to a level higher than any of the adjacent layers of silicon dioxide, silicon nitride, or similar dielectric layer.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: July 24, 2001
    Assignee: Seagate Technology LLC
    Inventors: Karl A. Belser, John H. Jerman
  • Patent number: 6258205
    Abstract: An apparatus for planarizing a semiconductor wafer having a polishing endpoint layer that includes a catalyst material is disclosed. The apparatus is operable to detect the endpoint based upon the chemical slurry whether a catalytic reaction has occurred due to the polishing platen removing a portion of the catalyst material from the wafer.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: July 10, 2001
    Assignee: LSI Logic Corporation
    Inventors: Brynne K. Chisholm, Gayle W. Miller, Gail D. Shelton
  • Patent number: 6251542
    Abstract: A semiconductor wafer etching method is disclosed that allows etching without use of restricted ozone-destroying solvents such as trichloroethane or fluorocarbons. This method involves forming a protective film of silicon resin or alkali resistant resin on a semiconductor wafer. Then, a surface region of the wafer not covered by the protective film is etched. Finally, the protective film is peeled from the semiconductor wafer without damaging the wafer or employing solvents harmful to the environment.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: June 26, 2001
    Assignee: Nippondenso Co., Ltd.
    Inventors: Masahiro Tomita, Yasuo Souki, Motoki Ito, Kazuo Tanaka, Hiroshi Tanaka
  • Patent number: 6245250
    Abstract: A process vessel which may be utilized in wet processing of semiconductor wafers includes a tank having one or more fluid displacers attachable to the tank. The one or more fluid displacer(s) have position in which they extend into the interior of the tank. The fluid displacers may be carried by a lid moveable into a closed position covering the opening in the tank. Movement of the lid into the closed position causes the fluid displacers to extend into the tank.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: June 12, 2001
    Assignee: SCP Global Technologies Inc.
    Inventors: Tom Krawzak, Victor Mimken, Rod Fladwood, Wyland Atkins
  • Patent number: 6228280
    Abstract: A method for detecting the endpoint for removal of a target film overlying a stopping film by chemical-mechanical polishing using a slurry, by removing the target film with a polishing process that generates a chemical reaction product (for example ammonia when polishing a wafer with a nitride film in a slurry containing KOH) in the slurry, adding to the slurry a reagent which produces a characteristic result upon reacting with the chemical reaction product, and monitoring the slurry for the characteristic result as the target film is removed.
    Type: Grant
    Filed: May 6, 1998
    Date of Patent: May 8, 2001
    Assignee: International Business Machines Corporation
    Inventors: Leping Li, James Albert Gilhooly, Clifford Owen Morgan, III, Cong Wei
  • Patent number: 6224713
    Abstract: Methods of forming substantially defect-free silicon structures at the submicron level by enhancing microscopic etchant concentration uniformity and reducing hydrogen bubble adhesion. Etchant mixtures are subjected to the application of ultrasonic waves. The ultrasonic waves promote cavitation that mixes the etchant mixture on a microscopic level, and also assists in promoting bubble detachment. Wetting agents are added to the etchant mixture to enhance the hydrophilicity of the silicon surfaces and thereby reduce bubble adhesion. Apparatus to carry out the method of forming silicon structures are also disclosed.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: May 1, 2001
    Assignee: Micron Technology, Inc.
    Inventors: David R. Hembree, Salman Akram
  • Patent number: 6203716
    Abstract: A method of chemical milling which includes the following steps: (I) suspending an extrusion or casting formed from metal in an etching solution wherein initially the extrusion or casting is fully submerged in the etching solution by virtue of its weight and which thereafter is rendered buoyant by metal being removed from the extrusion or casting by the etching solution wherein the casting or extrusion is supported by a non-buoyant support which maintains the casting or extrusion in a fully submerged condition throughout its immersion in the etching solution; and (ii) withdrawing the extrusion or casting from the etching solution when required.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: March 20, 2001
    Assignee: Melanesia International Trust Company Limited
    Inventor: Milne Jurisich
  • Patent number: 6138690
    Abstract: A method for the wet treatment of a semiconductor wafer comprised of subjecting a semiconductor wafer to chemicals treatment, rinsing with pure water and drying by direct transfer of the wafer to an atmosphere of a vapor containing an alcohol, wherein the semiconductor wafer is treated with a solution containing a semiconductive particle-removing agent during the interval between the steps of the chemicals treatment and the drying. The semiconductive particle-removing agent is one which is able to control the zeta potential of the particles to prevent the deposition of the particles. Alternatively, semiconductive colloid coagulants may be used which inhibit the formation of the particles by coagulation of semiconductive colloids. Thus, deposition of particles on a wet-treated semiconductor wafer is prevented.
    Type: Grant
    Filed: October 15, 1997
    Date of Patent: October 31, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Norikazu Nakatani
  • Patent number: 6136711
    Abstract: A chemical mechanical polishing composition comprising a composition capable of etching tungsten and at least one inhibitor of tungsten etching and methods for using the composition to polish tungsten containing substrates.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: October 24, 2000
    Assignee: Cabot Corporation
    Inventors: Steven K. Grumbine, Christopher C. Streinz, Eric W.G. Hoglund
  • Patent number: 6090711
    Abstract: The present invention provides semiconductor workpiece processors and methods of wetting and processing a semiconductor workpiece. One method of wetting and processing a semiconductor workpiece with process fluid comprises providing a semiconductor workpiece having a surface; providing a process fluid; contacting the surface of the semiconductor workpiece with the process fluid; and raising the semiconductor workpiece relative to the process fluid following the contacting.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: July 18, 2000
    Assignee: Semitool, Inc.
    Inventors: Robert W. Batz, Jr., Reed A. Blackburn, Steven E. Kelly
  • Patent number: 6042739
    Abstract: An etchant for chalcogenide glass or oxychalcogenide glass contains an acid and a compound, e.g., an oxidizing agent, which reacts with hydrogen chalcogen to guarantee safe etching of sulfuric glasses in rendering the glass surface smooth and free from surface defects. The etchant is used for an etching method in which a member made of chalcogenide glass or oxychalcogenide glass is dipped in the prepared etchant. The member can make a glass optical member having a surface, substantially free from latent scratch, whose surface roughness difference is one micron meter or less in a length of 0.1 micron meter taken along the surface.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: March 28, 2000
    Assignee: Hoya Corporation
    Inventor: Katsuhisa Itoh
  • Patent number: 6033994
    Abstract: An improved method of deprocessing semiconductor chips provides faster, more accurate and more complete deprocessing. The chip to be deprocessed is placed in a chemical agent to loosen or undercut layers of material to be removed. A physical impact or series of impacts is then delivered to the chip, for example, by a compression wave transmitted through a fluid medium. The impact will cause chemically loosened or undercut material to break loose from the chip. The amount of time between when the chip is placed in the chemical agent and when the impact occurs, and the power and duration of the impact can be controlled to determine what layer of the chip structure will be exposed by the deprocessing.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: March 7, 2000
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventor: Victor Tikhonov
  • Patent number: 6030542
    Abstract: The invention discloses a polyester film for leader tapes, including a polyester film having been brought into contact with an alkaline liquid and etched on at least one side to have a thickness pattern, wherein the polyester film has a tip portion having a thickness of 10 .mu.m or more and is 80% or less of the original thickness. The invention also includes a process for producing a polyester film for leader tapes including the steps of bringing a polyester film into contact with an alkaline liquid and etching the polyester film at least on one side to form a tip portion having a thickness of 10 .mu.m or more and 80% or less of the original thickness, with the etched depth controlled differently from position to position, for processing to have a desired thickness pattern.
    Type: Grant
    Filed: October 22, 1996
    Date of Patent: February 29, 2000
    Assignee: Toyo Metallizing Co., Ltd.
    Inventors: Kazuyoshi Koide, Ken-iti Sato, Kazuo Okabe
  • Patent number: 6007695
    Abstract: Material of a given chemical type is selectively electrochemically removed from a structure by subjecting portions of the structure to an electrolytic bath. The characteristics of certain parts of the structure are chosen to have electrochemical reduction half-cell potentials that enable removal of the undesired material to be achieved in the bath without applying external potential to any part of the structure. The electrolytic bath can be implemented with liquid that is inherently corrosive to, or inherently benign to, material of the chemical type being selectively removed.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: December 28, 1999
    Assignee: Candescent Technologies Corporation
    Inventors: N. Johan Knall, John D. Porter, Christopher J. Spindt