Abstract: A method for forming a gap-filled, planarization structure of dielectric materials on a substrate topography useful for forming microelectronic devices. A dielectric material is first deposited as continuous, dry dielectric layer, preferably a SOG layer. Then the dielectric layer is partially removed by chemical-mechanical polishing (CMP). The chemical and mechanical properties of the structure can be chosen by varying the composition of the SOG layer and the subsequent CMP conditions.

Abstract: The method of evaluating silicon wafers according to this invention is capable of predicating degradation of the quality of oxide film insulation, which is incurred, on the silicon wafers, by process faults or local residual strains undetectable by the naked eye. The method includes the following steps of: removing selectively a surface of a silicon wafer treated by mirror polishing by using an etching selectivity caused by an unordinary surface state; counting the number of etch pits on the surface of the silicon wafer with the aid of an optical microscope; and judging the quality of the silicon wafer based on the etch pit density, which is calculated from the above number of etch pits, and the threshold value of etch pit density. The threshold value of etch pit density of the silicon wafer treated by selective etching is set to be below 5.times.10.sup.5 pits/cm.sup.2, and improvements to the processing of production lines relating to low-quality silicon wafers can be made.

Abstract: According to the invention, a plurality of wafers are disposed in a steady-state rotating flow of a mixed acid in a main chemical processing zone in an etching trough, the rotating flow being formed to be substantially concentric circle with the wafers, thus permitting uniform dispersion of air bubbles for bubbling in the mixed acid and stable flow thereof to obtain reliable reproduction of satisfactory flatness and luster. A flow of mixed acid in the etching trough is formed as a superficial horizontal laminar flow in the neighborhood of the liquid level and a rotating flow induced in the neighborhood of the semiconductor wafer. Mixed acid in the etching trough is caused to overflow from the mixed acid supply side to the opposite side and is thus discharged.

Abstract: Wet etch methods of anisotropically etching a substantially vertical etched step in a film. Methods of forming a substantially vertical etched step include depositing an etching solution droplet upon the surface of the film to be etched and monitoring at least one characteristic parameter of the etching solution droplet. Control of the etching solution droplet is carried out corresponding to monitored parameters of the etching solution droplet. Control is carried out through infusion and effusion of the etching solution droplet in order to replenish the chemical reactants in the etching solution droplet. Replenishing the etching solution droplet, while keeping the droplet of a uniform size, maintains a uniform etching chemistry as the etching solution droplet would otherwise constantly change in its chemistry as it etches material from the surface being etched.

Abstract: Silicon carbide wafers are prepared for semiconductor epitaxial growth by first lapping a silicon carbide wafer derived from a boule, by placing the wafer in a recess of a metal backed template and moving the wafer over and against a rotating plate. Two different diamond slurry mixtures of progressively smaller diamond grit sizes are sequentially used, along with a lubricant, for a predetermined period of time. The lapping operation is followed by a polishing operation which sequentially utilizes two different diamond slurry mixtures of progressively smaller diamond grit sizes, along with three different apertured pads sequentially applied to a rotatable plate, with the pads being of progressively softer composition. In a preferred embodiment the wafers are cleaned and the templates are changed after each new diamond slurry mixture used.

Abstract: Disclosed is a method of dissolving a surface of a semiconductor substrate or a thin-film surface layer formed on the semiconductor substrate, with an oxidizing agent and fluorine-series gas. The method is characterized in that an initial dissolution rate is controlled by gradually increasing a concentration of fluorine-series gas introduced in a dissolving solution containing the oxidizing agent.

Abstract: A method of removing an inorganic antireflective coating from a semiconductor substrate and a method of forming an integrated circuit (IC) are provided. In the former method, a sacrificial layer is formed over a semiconductor substrate, the layer being selectively removable from the substrate and compatible with photolithography. An inorganic antireflective coating such as SiON is then formed over the sacrificial layer. Thereafter, the sacrificial layer is removed from the substrate to lift the coating off the substrate. Preferred materials for the sacrificial layer include TiN, tetraethyl orthosilicate-based silicon oxide, spin-on-glass (SOG) such as hydrogen silsesquioxane and methyl silsesquioxane, and porous polymeric materials. In the latter method, a patterned layer of photoresist material is formed over the anitreflective coating.

Abstract: A semiconductor wafer etching method is disclosed that allows etching without use of restricted ozone-destroying solvents such as trichloroethane or fluorocarbons. This method involves forming a protective film of silicon resin or alkali resistant resin on a semiconductor wafer. Then, a surface region of the wafer not covered by the protective film is etched. Finally, the protective film is peeled from the semiconductor wafer without damaging the wafer or employing solvents harmful to the environment.

Abstract: A silicon wafer is set in a processing bath and an HF water solution and ozone water are respectively supplied from an HF line and ozone water line into the processing bath via an HF valve and ozone water valve to create a mixture. The mixture contains an HF water solution with a concentration of 0.01% to 1% and ozone water with a concentration of 0.1 ppm to 20 ppm, has substantially the same etching rate for silicon and for silicon oxide film and is used at a temperature in the range of 10.degree. to 30.degree. C. The silicon wafer and the silicon oxide film formed on part of the surface of the wafer can be simultaneously cleaned by use of the above mixture.

Abstract: A method and apparatus for treating a surface on a glass article with a fluid. The article is surrounded by a containment system for the treating fluid and the fluid is continuously agitated by an agitator.

Abstract: A liquid etch apparatus including an outer tank for holding a liquid etch solution, which has included therein an inner cylindrical member positioned in the outer tank. At one end of the inner cylindrical member, a sparger or other gas supply means may be provided. Filters are provided between the inner cylindrical member and the outer tank. Substrates are secured in the inner tank and a propeller is provided below the substrates. Gas is introduced into the inner cylindrical member during the etch process which creates a pressure gradient between the inner tank and the outer tank, forcing particulate matter carried by the gaseous particles to circulate around to the filters.

Abstract: Chemical mechanical polishing slurry characteristics, such as oxidant concentration and abrasive particle dispersion, are determined using electrochemical measurement techniques, such as chronoamperometry, amperometry, chronopotentiometry, ionic conductivity, or linear sweep potentiometry. Slurry characteristics may be tested and monitored independent of a CMP polishing tool. Slurry characteristics may also be automatically controlled in an on-line chemical mechanical polishing process using electrochemical measurements.

Abstract: An abrasive wheel made of an abrasive which is chemically reactive with a ceramic workpiece and a binder mixed with the abrasive is held against the ceramic workpiece at a temperature ranging from 40.degree. C. to 300.degree. C. preferably 100.degree. C. to 180.degree. C., under at least an atmospheric pressure in a moistening atmosphere within a pressure vessel. The abrasive wheel is rotated in abrading contact with the ceramic workpiece. A surface layer of the ceramic workpiece which is held against the abrasive wheel is mechanically abraded and also subjected to a tribochemical reaction with the abrasive wheel, so that the surface layer of the ceramic workpiece can smoothly and neatly be removed from the ceramic workpiece. The ceramic workpiece thus ground is finished highly accurately and efficiently.

Abstract: A method of manufacturing semiconductor wafers includes a double side primary polishing step, a back side etching step and a single side mirror polishing step. This method is capable of easy sensor detection of the front and back sides of the wafer, wafer processing of higher flatness level by forming etched rough surface at the back side of the double side polished wafer and setting up of wafer manufacturing process including a double side polishing step.

Abstract: A wet etching station and a wet etching method adapted for utilizing the same are provided. The wet etching station includes a bath apparatus containing a chemical etchant, with the bath apparatus having a plurality of cooling lines installed in the lower portion of the bath area, such that the cooling lines can make contact with the chemical etchant. Thus, a large-diameter wafer can uniformly etched.

Abstract: An apparatus and method for selectively etching an encapsulant forming a package of resinous material around an electronic device includes a etchant solution source and an etching assembly including an etch plate and a movable cover forming an etching chamber. An etch head is supported by the plate and the device package is mountable in the chamber on the etch head. A first syringe pump pumps a first quantity of etchant into the etch head and a second syringe pump agitates or oscillates at least part of the first quantity of etchant repeatedly into and out of an etched cavity formed on the package exterior surface by reaction of the etchant solution with the resinous material. A waste outlet and reservoir extends from the etch head. The etch head is attached to an alumina ceramic heat exchanger including a spirally grooved passageway formed by an inserted core to heat a small volume of etchant immediately prior to introduction of the etchant against the package and subsequent oscillation.

Abstract: Method for separating and removing a photosensitive layer, containing a binder resin, from a photosensitive drum, by immersing the photosensitive drum in an aqueous composition of water and an organic compound capable of dissolving or wetting the resin binder of the photosensitive resin in an oil-in-water dispersion.

Abstract: A micromechanical structure is etched on a component that has been introduced into a container having a plurality of inlet and discharge openings. The liquid etchant is displaced downwardly through a liquid discharge at the underside of the container by admitting water through the liquid inlet at the upper side, whereby no turbulence occurs in the liquid flow. The water employed as a rinsing agent is displaced by a liquid having a lower density such as, for example, ethanol or acetone. Finally, a liquefied gas, for example liquid carbon dioxide, is admitted via the liquid, this gas is evaporated by heating the container above the critical temperature, the pressure in the inside of the container is reduced to the ambient air pressure by opening a gas discharge, and the component is removed from the container through a sluice or lock.

Abstract: Upon grinding a back of a substrate, a protecting tape made of a material soluble to IPA (isopropanol), for example, a vinyl acetate thermoplastic adhesive is appended on the surface of a pattern-formed layer of a wafer, grinding the back, dipping the wafer in a cleaning vessel containing IPA, and dissolving and removing the protecting tape from the wafer, thereby giving no damages to the wafer, and reducing the number of operation steps.

Abstract: A wet etching process (10) etches sacrificial oxide on a substrate without damaging a polycrystalline silicon structure on the substrate. The etching process (10) includes dipping the substrate in a surfactant (11), submerging a portion of the substrate in a recirculating bath of the etchant while injecting an inert gas into the etchant (12) to purge the etchant of oxygen, rinsing the substrate in deionized water (14), submerging a portion of the substrate in a hydrogen peroxide solution (15), rinsing the substrate for a second time (17), and drying the substrate in isopropyl alcohol vapor (18). The inert gas injected into the etchant displaces oxygen dissolved in the etchant and protects the polycrystalline silicon structure from being etched.

Abstract: A preconditioning plate (10) prepares the surface of a polishing pad (24) to prepare the pad's surface for subsequent metal polishing of semiconductor wafers (27). The preconditioning plate has at least three intersecting radial ridges (14) on its surface and is made from a rigid plastic material. The preconditioning plate is rotated relative to the surface of the polishing pad prior to actual polishing to provide a uniform and stable polishing surface. The preconditioning plate does not abrade or wear away the polishing pad, nor does it form grooves in the polishing pad. Additionally, the preconditioning plate is reusable.

Abstract: A semiconductor processor and methods using pillar shaped liquid emitters. The emitters have emission ports upon which liquid domes of processing chemicals are formed. The domes are applied to the surface of a wafer to wash discrete areas and thereby allow gases evolved from the reaction to easily escape about the domes and through gas passageways existing about the pillars. The wafer is rotated to provide even processing of the treated surface.

Abstract: The invention is an improvement of a method for selectively etching a first surface of each of a plurality of wafers (21-23) comprising the steps of masking the entirety of each wafer except certain exposed portions to be etched on the first surface, and immersing the wafers in a heated etch bath (34) for a sufficient time to etch V-grooves (11) into the first surfaces. In one embodiment, the wafers are arranged in the etch bath with the first surface of each wafer (the surface to be etched) facing the first surface of another wafer. The first surfaces of all of the wafers are substantially parallel and are all substantially transverse to a bottom surface of the vessel containing the etch bath. The bottom surface of the vessel is heated to make in the etch bath a temperature gradient that is at a maximum at the bottom surface of the vessel and a minimum at the top surface of the bath.

Abstract: A decapsulation embodiment of the present invention comprises clamping a device-under-test to a fixture with a non-recessed etch head. The fixture has an etch plate with a hole that defines the area on the device-under-test for the decapsulation. Electrical access is provided to the package pins of the device-under-test. The fixture comprises a support with connections for the pins and the etch-resistant etch plate on top with the hole for locating over the site of the active die within the device-under-test package. The hole is sized to define the proper dissolved opening dimensions for decapsulation and is deep enough to enable decapsulation to start and yet not so deep that fresh etchant solution cannot reach the surface of the device-under-test. The device-under-test is placed on top of the support and covered with a etch plate. The whole assembly is then clamped together.

Abstract: A predetermined electrical circuit pattern or discrete features composed of discrete, electrically conducting metal pathways and non-conducting spaces therebetween is formed on a dielectric substrate by(1) depositing a continuous layer of an electrically conducting metal on a surface of the substrate,(2) contacting the metal layer with a mask head defining a system of ridges and valleys therein, the ridges corresponding to the pathways of the target electrical circuitry pattern or discrete features and the valleys corresponding to the spaces of the target pattern, the ridges in the mask head contacting the metal layer in sealing arrangement with the portions of the metal layer coming into contact with the ridges, and(3) contacting the metal layer with an etchant to remove the portions of the metal layer in the spaces and thereby form the target electrical circuitry or discrete features pattern.