Of Electrical Device (e.g., Semiconductor) Patents (Class 228/179.1)
  • Publication number: 20130092948
    Abstract: The semiconductor device having flip chip structure includes: an insulating substrate; a signal wiring electrode disposed on the insulating substrate; a power wiring electrode disposed on the insulating substrate or disposed so as to pass through the insulating substrate; a semiconductor chip disposed in flip chip configuration on the insulating substrate and comprising a semiconductor substrate, a source pad electrode and a gate pad electrode disposed on a surface of the semiconductor substrate, and a drain pad electrode disposed on a back side surface of the semiconductor substrate; agate connector disposed on the gate pad electrode; and a source connector disposed on the source pad electrode. The gate connector, the gate pad electrode and the signal wiring electrode are bonded, and the source connector, the source pad electrode and the power wiring electrode are bonded, by using solid phase diffusion bonding.
    Type: Application
    Filed: October 18, 2011
    Publication date: April 18, 2013
    Applicant: ROHM CO., LTD.
    Inventor: Takukazu OTSUKA
  • Publication number: 20130077275
    Abstract: Even in an electronic device where electrodes are coupled electrically using a solder, sections to which electrodes of an electronic component are coupled are switched by a method other than changing circuits of the electronic component or changing circuits of a wiring substrate. The electronic device includes: a wiring substrate having two or more first electrodes over one surface thereof; and an electronic component having, over one surface thereof, two or more second electrodes arranged corresponding to the two or more first electrodes, respectively. At least one of the first electrodes is a specific electrode divided into two or more divided portions, and the divided portions are coupled to different wirings, respectively. Further, at least one of the divided portions is coupled to a corresponding second electrode through a solder.
    Type: Application
    Filed: August 21, 2012
    Publication date: March 28, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Shuuichi KARIYAZAKI
  • Publication number: 20130077948
    Abstract: A silicon MEMS device can have at least one solder contact formed thereupon. The silicon MEMS device can be configured to be mounted to a circuit board via the solder contact(s). The silicon MEMS device can be configured to be electrically connected to the circuit board via the solder contact(s).
    Type: Application
    Filed: September 28, 2011
    Publication date: March 28, 2013
    Applicant: DigitalOptics Corporation MEMS
    Inventor: Roman C. Gutierrez
  • Publication number: 20130049204
    Abstract: A semiconductor device includes a substrate and a first sintered silver layer on the substrate. The semiconductor device includes a first semiconductor chip and a first diffusion soldered layer coupling the first semiconductor chip to the first sintered silver layer.
    Type: Application
    Filed: August 22, 2011
    Publication date: February 28, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Niels Oeschler, Kirill Trunov, Roland Speckels
  • Publication number: 20130043760
    Abstract: A plurality of conductor bars are positioned within slots of a laminated electric steel disc stack, and the ends of the conductor bars are brazed to end rings to manufacture a rotor. The method includes inserting the conductor bars into the slots of the disc stack, providing the end rings with slots for receiving the ends of the conductor bars; positioning spacers of braze material adjacent each end of each of the conductor bars to create a gap between the end rings and the steel disc stack; and applying heat to melt the braze material of the spacers whereby braze material is furnished by the spacers of braze material to braze the first and second ends of the conductor bars to the first and second end rings. Channels are provided in the face of the end rings facing the steel disc stack to drain away excess braze material.
    Type: Application
    Filed: August 15, 2011
    Publication date: February 21, 2013
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Richard J. Osborne, Qigui Wang, Yucong Wang
  • Patent number: 8356742
    Abstract: In a connecting material of the present invention, a Zn series alloy layer is formed on an outermost surface of an Al series alloy layer. In particular, in the connecting material, an Al content of the Al series alloy layer is 99 to 100 wt. % or a Zn content of the Zn series alloy layer is 90 to 100 wt. %. By using this connecting material, the formation of an Al oxide film on the surface of the connecting material at the time of the connection can be suppressed, and preferable wetness that cannot be obtained with the Zn—Al alloy can be obtained. Further, a high connection reliability can be achieved when an Al series alloy layer is left after the connection, since the soft Al thereof functions as a stress buffer material.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: January 22, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Osamu Ikeda, Masahide Okamoto
  • Publication number: 20130014801
    Abstract: A back contact solar module and an electrode soldering method therefor are disclosed. The back contact solar module includes a substrate, two solar cells formed on the substrate, and a curved solder part. The curved solder part is soldered onto an electrode solder pad of each solar cell. The curved solder part has a curved portion between the two solder pads. The curved portion curves parallel to the substrate. Therefore, the invention utilizes the elasticity in structure or the allowable deformation of the curved portion to release the internal stress induced by the soldering on the electrode pads or by a following lamination packaging, which solves the problem in the prior art that the internal residual stress in an electrode solder part harmfully affects the electrical connection between solar cells.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 17, 2013
    Inventors: Yi-Chia Chen, De-Chih Liu, Ming-Yuan Huang, Chiu-Hua Huang
  • Publication number: 20120318851
    Abstract: A chip bonding process includes the following steps. At least one chip is transferred onto a carrier, and a negative pressure environment is provided. Heat is provided to the at least one chip and/or the carrier, and a positive pressure is applied onto the at least one chip.
    Type: Application
    Filed: October 25, 2011
    Publication date: December 20, 2012
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Wei-Cheng LOU, Ming-Tang Chen, Ting-Yu Chou, Jung-Kun Wu, Chung-l Chiang
  • Patent number: 8333315
    Abstract: A method for connecting a conducting wire to an electric heating film is provided. The method includes: first, opening a groove on an electric heating film carrier; then, placing one end of a connecting wire in the groove; afterwards, pouring a conductive adhesive into the groove; and finally, heating the electric heating film carrier, so that the electric heating film carrier is just melted and the connecting wire and the conductive adhesive are merged into a whole; and cooling the electric heating film carrier, and solidifying the conductive adhesive. The electric heating film carrier is made of various dielectric materials such as glass, ceramics, enamel, mica, quartz, and microcrystalline glass. Two sides of the electric heating film carrier are coated with layered electrodes, and the layered electrodes are connected in series to the electric heating film. The groove is disposed in the middle of the layered electrode, and the groove is an annular groove. The connecting wire is a pure silver wire.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: December 18, 2012
    Inventor: Riliang Luo
  • Patent number: 8324522
    Abstract: Provided is an apparatus for performing a reflow process of a solder ball provided to a semiconductor chip. The reflow apparatus may include a coil, a support member and a moving member. The coil may receive a current from a power supply to heat the solder ball using an induced heating method. The support member may be disposed on the front or the rear of the coil and may support a printed circuit board on which a semiconductor chip is mounted. The moving member may move the printed circuit board so that the printed circuit object passes through an internal space surrounded by the coil.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: December 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Minill Kim, Kwang Yong Lee, Jonggi Lee, Ji-Seok Hong
  • Publication number: 20120292088
    Abstract: According to the disclosure, an electronic device comprising a circuit board and an electrical component is disclosed. The circuit board has a first surface and includes a solder pad array including solder pads. The solder pad array is disposed on a first surface of the circuit board, and the circuit board further has vias passing through the solder pads and the circuit board. The electrical component is disposed on the first surface and between two of the solder pads next to each other. The electrical component includes two contacts electrically connected to the two solder pads next to each other. A line passing through the centers of the two contacts forms an acute angle with a line passing through the centers of the two solder pads next to each other.
    Type: Application
    Filed: August 25, 2011
    Publication date: November 22, 2012
    Applicant: INVENTEC CORPORATION
    Inventor: Chuan-Hsin Lee
  • Patent number: 8308052
    Abstract: A method includes heating a package structure including a first work piece and a second work piece to melt a plurality of solder bumps between the first and the second work pieces; and after the step of heating, allowing the plurality of solder bumps to solidify. During the step of solidifying, a first side of the package structure is maintained at a first temperature higher than a melting temperature of the plurality of solder bumps by using a heating source. During the step of solidifying, a second side of the package structure is maintained at a second temperature lower than the melting temperature by using a cooling source, wherein the second side is opposite the first side.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: November 13, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Horng Chang, Yian-Liang Kuo, Chih-Hang Tung, Tsung-Fu Tsai
  • Patent number: 8309395
    Abstract: The invention relates to a method for fabricating a high-temperature compatible power semiconductor module in which a power semiconductor chip is bonded by means of a diffusion solder layer to a substrate and said substrate is bonded by means of silver sintered layer to a base plate, after which a bonding element is bonded to the top chip metallization. To prevent oxidation of the predefined bond area when producing the diffusion solder layer and the sintered silver layer 4? an anti-oxidation layer is applied to the top chip metallization at least in the region of the predefined bond area.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: November 13, 2012
    Assignee: Infineon Technologies AG
    Inventor: Reinhold Bayerer
  • Publication number: 20120282501
    Abstract: A flow battery electrode assembly including a first impermeable, substantially metal electrode consisting essentially of a metal and a second permeable electrode. The assembly also includes at least one electrically conductive spacer connecting the first impermeable, substantially metal electrode and the second permeable electrode such that the first impermeable, substantially metal electrode and the second permeable electrode are spaced apart from each other by an electrolyte flow path. At least one electrically conductive spacer includes a plurality of electrically conductive spacers which mechanically and electrically connect adjacent first impermeable, substantially metal and second permeable electrodes.
    Type: Application
    Filed: May 14, 2012
    Publication date: November 8, 2012
    Applicant: Primus Power Corporation
    Inventors: Kyle Haynes, Paul Kreiner, Jonathan L. Hall, Brad Kell, Rick Winter
  • Patent number: 8297488
    Abstract: A method for forming bumps 19 on electrodes 32 of a wiring board 31 includes the steps of: (a) supplying a fluid 14 containing conductive particles 16 and a gas bubble generating agent onto a first region 17 including the electrodes 32 on the wiring board 31; (b) disposing a substrate 40 having a wall surface 45 formed near the electrodes 32 for forming a meniscus 55 of the fluid 14, so that the substrate 40 faces the wiring board 31; and (c) heating the fluid 14 to generate gas bubbles 30 from the gas bubble generating agent contained in the fluid 14.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: October 30, 2012
    Assignee: Panasonic Corporation
    Inventors: Seiji Karashima, Yasushi Taniguchi, Seiichi Nakatani, Kenichi Hotehama, Takashi Kitae, Susumu Sawada
  • Publication number: 20120267422
    Abstract: A soldering assistance device is used for soldering a multi-pin electronic element with a row of pins on a PCB. The row of pins includes an outer pin at two ends thereof. The soldering assistance device includes a holding portion and a soldering portion connected to the holding portion. The soldering portion is adjacent to the outer pin. An interval between the soldering portion and the outer pin is less than an interval between each two adjacent pins of the row of pins. The soldering portion is made of a metal which is easy to solder. A soldering method using the soldering assistance device is also provided.
    Type: Application
    Filed: June 22, 2011
    Publication date: October 25, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: AI-YU PAN, JIN-YOU WANG, CHAO-RONG LAI
  • Publication number: 20120211855
    Abstract: A semiconductor apparatus includes: a first sheet-like member having a light receiving surface of an imaging device and a first connection terminal disposed thereon, the imaging device generating an image by receiving incident light from a light collecting section for collecting external light disposed thereon; a second sheet-like member having a second connection terminal to be connected to the first connection terminal provided thereon; a conductive bonding portion made of a conductive material and bonded with the first connection terminal; and a bonding wire connecting the conductive bonding portion and the second connection terminal, wherein the bonding wire is disposed along the plane of the first sheet-like member such that reflected light from the bonding wire does not impinge on the light receiving surface.
    Type: Application
    Filed: January 18, 2012
    Publication date: August 23, 2012
    Applicant: Sony Corporation
    Inventors: Toshiaki IWAFUCHI, Masahiko Shimizu
  • Publication number: 20120189901
    Abstract: The invention relates to a battery cell provided on its peripheral side surface, instead of on its bottom surface, with a welding zone for connection to a metal strip. The invention also relates to a method for linking multiple battery cells in parallel or in series into a battery module, with spot welding connections to the positive and negative terminals not on opposite ends to improve production flow. Over current protection device is incorporated to form a compact battery module with internal over current protection.
    Type: Application
    Filed: June 29, 2011
    Publication date: July 26, 2012
    Inventor: Chia-Ming Chuang
  • Patent number: 8220696
    Abstract: This invention provides a manufacturing method of printed wiring board which enables a plate-like substrate to be carried and processed without any contact to its product surface. End portions of plate-like copper clad laminates are overlapped vertically and then joined linearly by rotating an ultrasonic horn along the end portions. Consequently, copper foils can be metal-joined and a joining strength necessary for transportation with a roller is obtained. Because belt-like copper clad laminate is obtained by joining the plate-like copper clad laminates and after that, processed, thus, the belt-like copper clad laminate can be carried without any contact to its product surface as it is carried with the roller, and then processed.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: July 17, 2012
    Assignee: IBIDEN Co., Ltd.
    Inventor: Hideya Kawada
  • Publication number: 20120175404
    Abstract: A manufacturing equipment for manufacturing an LED light bar includes a reflow oven and a clamping device. The LED light bar includes a printed circuit board and a plurality of LEDs arranged on the printed circuit board. The reflow oven includes a hearth box and a transmitting belt extended through the hearth box. The hearth box includes a heating area and a cooling area in an interior thereof. The clamping device is mounted on the transmitting belt. The clamping device defines a receiving space for receiving the LED light bar therein. The clamping device is changed between a clamping state for maintaining the LEDs in positions and a releasing state whereby the LED light bar can be removed from the clamping device.
    Type: Application
    Filed: August 15, 2011
    Publication date: July 12, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIH-CHEN LAI
  • Publication number: 20120153008
    Abstract: A joined structure of the present invention including a first substrate having a wiring thereon, any one of a second substrate and an electronic part, and an anisotropic conductive film containing conductive particles, wherein the first substrate and any one of the second substrate and the electronic part are electrically joined via the anisotropic conductive film, and wherein the conductive particles pressure-bonded to the wiring of the first substrate protrude from both edges of the wiring in a width direction, and an interval of the wiring is 3.5 times or more larger than an average particle diameter of the conductive particles which are not pressure-bonded to the wiring.
    Type: Application
    Filed: February 29, 2012
    Publication date: June 21, 2012
    Applicant: Sony Chemical & Information Device Corporation
    Inventor: Toshiyuki SHUDO
  • Publication number: 20120118938
    Abstract: To permanently apply lead terminals to corresponding electrodes of electronic or electro-optic components, the following steps are carried out: a. providing a frame including at least one tensioned wire, b. providing a holding jig including at least one seat in which a respective one of the components can be removably and temporarily retained, c. applying the components to the seats with the respective electrodes aligned along a respective longitudinal direction; in this way a row of aligned components is obtained, each component having a corresponding electrode aligned to the subsequent one in the row, d. applying the holding jig to the frame and orienting the same so that the longitudinal direction corresponds to the direction of the tensioned wire, the tensioned wire being thereby brought substantially in contact with (all) the electrode(s) aligned to each other on a corresponding row of components, e.
    Type: Application
    Filed: December 13, 2011
    Publication date: May 17, 2012
    Applicant: MOSAID Technologies Incorporated
    Inventor: Giovanni DELROSSO
  • Publication number: 20120093185
    Abstract: This method for manufacturing a semiconductor laser apparatus includes steps of forming a first semiconductor laser device having a first electrode, forming a second semiconductor laser device having a second electrode, forming a first solder layer with a first melting point through a first barrier layer on a third electrode, forming a second solder layer with a second melting point through a second barrier layer on a fourth electrode, bonding the first electrode to the third electrode through a first reaction solder layer, a melting point of which rises to a third melting point higher than the second melting point by reacting the first electrode with the first solder layer, and bonding the second electrode to the fourth electrode by applying heat of a first heating temperature to melt the second solder layer with the second melting point after the step of bonding the first electrode to the third electrode.
    Type: Application
    Filed: October 4, 2011
    Publication date: April 19, 2012
    Applicants: SANYO Optec Design Co., Ltd., Sanyo Electric Co., Ltd.
    Inventors: Gen Shimizu, Shinichiro Akiyoshi
  • Patent number: 8156635
    Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: an insulation layer including a first metal layer formed on one side or both sides thereof; a second metal layer formed on one side of the first metal layer; and a third metal layer formed on one side of the second metal layer, wherein the second metal layer has a lower melting point than the first metal layer or the third metal layer. The carrier is advantageous in that a build up layer can be separated from a carrier by heating, so that a routing process is not required, with the result that the size of a substrate does not change when the build up layer is separated from the carrier, thereby reusing the carrier and maintaining the compatibility between the substrate and manufacturing facilities.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: April 17, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seong Min Cho, Keung Jin Sohn, Tae Kyun Bae, Hyun Jung Hong, Kyung Ah Lee, Chang Gun Oh
  • Patent number: 8157158
    Abstract: A solder joint comprising a solder capture pad on a substrate having a circuit; and a lead containing or a lead free solder selected from the group comprising Sn—Ag—Cu solder, Sn—Cu solder and Sn—Ag solder adhered to the solder capture pad; the solder selected from the group comprising between 0.1 and 6.0 per cent by weight Zn. A solder joint, comprising a solder capture pad on a substrate having a circuit; and a Sn—Cu lead free solder adhered to the solder capture pad, the solder comprising between 0.1 and 6.0% by weight Zn. Formation of voids at an interface between the solder and the solder capture pad is suppressed. A method for forming solder joints using the solders.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: April 17, 2012
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Gruber, Donald W. Henderson, Sung K. Kang, Da-Yuan Shih
  • Publication number: 20120087620
    Abstract: An optical communication system comprising first and second planar substrates and an alignment assembly. The first substrate of a semiconductor material, is located on a planar surface of a sub-mount and having a planar first edge. The second substrate of a different second material, is located on said planar surface of said sub-mount and having a planar second edge. The alignment assembly is located on said sub-mount, said alignment assembly including rigid standoff structures configured to fixedly vertically align said first and second edges above said sub-mount such that each optical output of one of said lasers is vertically aligned with the end of one of said light-guiding structures.
    Type: Application
    Filed: November 12, 2010
    Publication date: April 12, 2012
    Applicant: Alcatel-Lucent USA Inc.
    Inventors: Flavio Pardo, Mark Earnshaw
  • Publication number: 20120080508
    Abstract: Techniques for linear cell stringing are disclosed. In some embodiments, a plurality of sets of solar cells are linearly positioned, a plurality of tabbing ribbon segments are placed in contact with the plurality of sets of solar cells, and the plurality of sets of solar cells and corresponding plurality of tabbing ribbon segments are soldered together to form a plurality of solar cell strings. In some cases, the plurality of solar cell strings is substantially simultaneously formed in parallel.
    Type: Application
    Filed: September 27, 2011
    Publication date: April 5, 2012
    Applicant: BANYAN ENERGY, INC.
    Inventors: David Sheldon Schultz, John Hunter Mack, Kenneth Evan Rakestraw
  • Publication number: 20120055978
    Abstract: A method is provided for connecting at least two components, in which a sintering preform is used. This preform includes a carrier having a surface that has at least one structuring element containing hardened paste, wherein the hardened paste contains: (a) metal particles having a coating that contains at least one organic compound; and (b) at least one sintering aid selected from the group consisting of (b1) organic peroxides, (b2) inorganic peroxides, (b3) inorganic acids, (b4) salts of organic acids, wherein the organic acids have 1-4 carbon atoms, (b5) esters of organic acids, wherein the organic acids have 1-4 carbon atoms, and (b6) carbonyl complexes. The surface of the carrier having the hardened paste is not reactive to the constituents of the paste.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 8, 2012
    Applicant: HERAEUS MATERIALS TECHNOLOGY GMBH & CO. KG
    Inventors: Michael SCHÄFER, Wolfgang SCHMITT
  • Patent number: 8118211
    Abstract: A method for the low-temperature pressure sintering of at least one electronic unit to be contacted thermally, firmly connected mechanically, and located on a substrate, comprising the following steps: pressing the electronic unit using a mold enveloping matrix while sparing a connecting surface of the substrate for a heat sink connection, providing a heat sink plate, applying a sintering connecting layer onto the spared region of the connecting surface and/or onto to the region of the heat sink plate provided for contacting, and bonding of the heat sink plate to the substrate of the electronic unit in the region of the connecting surface using silver low-temperature pressure sintering technology.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: February 21, 2012
    Assignee: Danfoss Silicon Power GmbH
    Inventors: Ronald Eisele, Mathias Kock
  • Publication number: 20120019889
    Abstract: The present invention relates to an electrochromic device having at least one active area (CDEF), having, on a carrier substrate (3), a multilayer stack comprising a layer forming a lower electrode (4), various functional layers (7) at least one of which is an electrochromic layer, at least one (6, 7a) of these layers being electrically insulating, and an upper electrode (9), in which device: at least one partition (5) separating the surface of the lower electrode (4) into two isolated regions, namely a free region (4a) and an active region (4b) containing the active area (CDEF); and at least one partition (12) separating the surface of the upper electrode (9) into two regions electrically isolated from each other, namely a free region (9a) and an active region (9b) containing the active area (CDEF).
    Type: Application
    Filed: April 15, 2010
    Publication date: January 26, 2012
    Applicant: SAINT- GOBAIN GLASS FRANCE
    Inventors: Driss Lamine, Emmanuel Valentin, Samuel Dubrenat
  • Publication number: 20120018493
    Abstract: A method for manufacturing a high temperature electrolyzer <<HTE>> or a high temperature fuel cell <<SOFC>>, comprising a vertical stack of n elementary planar cells alternating with n+1 interconnection plates, each of the elementary cells consisting of an openworked planar porous anode and an openworked planar porous cathode respectively positioned on each of the faces of a planar dense electrolyte, and brazed joints being made by infiltration of a defined amount of brazing in the electrodes at contact points between the elementary cells and the interconnection plates.
    Type: Application
    Filed: January 6, 2010
    Publication date: January 26, 2012
    Applicant: Commissariat a l energie atomique et aux energies alternatives
    Inventors: Thierry Baffie, Julien Cigna
  • Publication number: 20120012645
    Abstract: Disclosed are an electronic component mounting system and an electronic component mounting method capable of reducing the space occupied by equipment and equipment cost and ensuring high connection reliability. An electronic component mounting system (1) includes a solder printing device (M1), a coating/inspection device (M2), a component mounting device (M3), a bonding material supply/substrate mounting device (M4), and a reflow device (M5). The electronic component mounting system (1) mounts an electronic component on a main substrate (4) and connects a module substrate (5) to the main substrate (4). A cream solder is printed on the main substrate (4) to mount an electronic component, a bonding material in which solder particles are contained in thermosetting resin is supplied to a first connection portion of the main substrate (4), and a second connection portion of the module substrate (5) is landed on the first connection portion through the bonding material.
    Type: Application
    Filed: March 24, 2010
    Publication date: January 19, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Koji Motomura, Hideki Eifuku, Tadahiko Sakai
  • Publication number: 20110308850
    Abstract: A notch positioning type soldering structure and a method for preventing a pin deviation can prevent a plurality of pins of an electronic component from being deviated when the pins are soldered onto a printed circuit board by a solder, and each of at least two solder pads includes at least one notch, and the solder pads are installed in an alignment direction on the printed circuit board, such that the notch positioning type soldering structure and the method for preventing a pin deviation can improve the efficiency of manufacturing processes and reduce the manufacturing cost.
    Type: Application
    Filed: July 22, 2010
    Publication date: December 22, 2011
    Applicant: ASKEY COMPUTER CORP.
    Inventors: Hsiang-Chih Ni, Ching-Feng Hsieh
  • Publication number: 20110308847
    Abstract: The creation of a circuit board which contains electrical interconnections between the circuit board traces and electronic devices mounted on the circuit board where the circuit board assembly can be operated at temperatures of 600° C. or greater. This invention allows for solder connections to be formed using solder paste or high-temperature.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 22, 2011
    Inventor: Randy Allen Normann
  • Publication number: 20110304086
    Abstract: A shadow frame and a method of manufacturing the shadow frame are disclosed. The shadow frame is utilized in photoelectrical semiconductor manufacturing processes and is utilized for fixing a glass substrate by combing with a support base used to carry the glass substrate. The shadow frame has a plurality of frame components and welding parts, and the frame components are adjoined at the welding parts to form the shadow frame. The provided shadow frame and its manufacturing method are capable of improving the utility rate of the substrate used to manufacture the shadow frame, avoiding a waste of the substrate, and thereby capable of reducing the manufacturing cost.
    Type: Application
    Filed: March 29, 2011
    Publication date: December 15, 2011
    Applicant: Global Material Science Co., Ltd.
    Inventors: FANG-YU LIU, Byung-jun Park, Jin-jong Su
  • Patent number: 8074867
    Abstract: A conductive ball mounting apparatus for mounting conductive balls by providing an array mask having through holes, into which conductive balls are to enter, above a mounting target placed on a stage, by arranging a ball reservoir having an opening for reserving a plurality of conductive balls, in the bottom, by moving the ball reservoir along the array mask, by dropping the conductive balls into the individual through holes of the array mask, adopts the following means. Firstly, the conductive ball mounting apparatus comprises moving means for moving the array mask and the stage relative to each other in horizontal directions. Secondly, the positions of the conductive balls in the through holes are arranged by finely moving at least one of the array mask and the stage relative to each other in the horizontal directions after the balls were dropped.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: December 13, 2011
    Assignee: Shibuya Kogyo Co., Ltd.
    Inventor: Kazuo Niizuma
  • Publication number: 20110293971
    Abstract: The present invention discloses a battery module including a casing capable of supporting a plurality of battery cells and having a circuit board holding structure, a circuit board held by the circuit board holding structure, a plurality of conducting buses disposed on the casing for electrically connecting the plurality of battery cells and the circuit board, and a plurality of battery cell sets, each of which including a battery holder and at least two battery cells, where any two of the plurality of battery cell sets are independent in structure and thereby can be affixed to the casing or detached from the casing respectively.
    Type: Application
    Filed: August 12, 2011
    Publication date: December 1, 2011
    Inventors: Pei-Jan Ho, Yuan-Sheng Chen, Ren-Ting Chuang, Yu-Wen Wu, Nan-Chun Wu, Chao-Feng Lee, Ching-Ping Yao
  • Publication number: 20110290862
    Abstract: A surface mount circulator. The novel circulator includes a substrate, a predetermined number of microstrip lines disposed on a first surface of the substrate, a ground layer and a predetermined number of electrical contacts disposed on the second surface of the substrate, and a mechanism for coupling each microstrip line to one of the electrical contacts. In an illustrative embodiment, the circulator uses edge wrap metallization to wrap a microstrip line down a side of the substrate to connect with a corresponding contact. A ball grid array can then be used to connect the signal contacts and ground at the second surface of the substrate with a circuit board. The circulator also includes a magnet on first surface of the substrate over a resonator circuit connecting the microstrip lines and a pole piece on the second surface of the substrate beneath the ground to provide magnetic bias to the substrate.
    Type: Application
    Filed: August 3, 2011
    Publication date: December 1, 2011
    Inventors: James A. Carr, Tamrat Akale
  • Publication number: 20110278350
    Abstract: An electrical assembly (300, 400) includes a power IC such as a MOSFET (112, 412) attached to a substrate module (114, 214). The MOSFET includes a top surface comprising first and second conductive device surfaces (A, B), associated with first and second device ports, and a bottom surface comprising a third conductive device surface C associated with a third device port. A first foil element is bonded to the first conductive device surface(s) A and to each of the first conductive substrate surfaces (A1, A2) and provides a continuous conductive pathway from each conductive surface (A) to each other conductive surface (A) and to each conductive surface (A1, A2). A second foil element is bonded to the second conductive device surface(s) B and to the second conductive substrate surface B1 and provides a continuous conductive pathway from each device conductive surface (B) to the substrate conductive surface (B1).
    Type: Application
    Filed: July 21, 2011
    Publication date: November 17, 2011
    Inventor: Keith V. Guinn
  • Publication number: 20110266672
    Abstract: An integrated-circuit attachment structure comprises an integrated circuit and a package assembly. The package assembly includes a package containing the integrated circuit. The package has pins at its corners and a grid at least primarily of solder halls on its bottom face.
    Type: Application
    Filed: January 30, 2009
    Publication date: November 3, 2011
    Inventor: Jeffrey Scott Sylvester
  • Publication number: 20110253767
    Abstract: A manufacturing method for an electronic device joining a first metallic bond part formed on a first electronic component and a second metallic bond part formed on a second electronic component includes a first process for placing the first metallic bond part directly against the second metallic bond part, applying pressure to the first electronic component and the second electronic component, joining the first metallic bond part to the second metallic bond part with solid-phase diffusion, and releasing the applied pressure, and a second process for heating the first electronic component and the second electronic component at a predetermined temperature such that the first metallic bond part and the second metallic bond part are joined together by melting at least one of the first metallic bond part and the second metallic bond part.
    Type: Application
    Filed: June 22, 2011
    Publication date: October 20, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Yoichiro Kurita
  • Patent number: 8033445
    Abstract: A simple technique to solder submicron sized, ohmic contacts to nanostructures has been disclosed. The technique has several advantages over standard electron beam lithography methods, which are complex, costly, and can contaminate samples. To demonstrate the soldering technique graphene, a single atomic layer of carbon, has been contacted, and low- and high-field electronic transport properties have been measured.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: October 11, 2011
    Assignee: The Regents of the University of California
    Inventors: Caglar O. Girit, Alexander K. Zettl
  • Patent number: 8016181
    Abstract: A method of producing an electro-optical device for electrically connecting a first terminal portion provided on an electro-optical panel to a second terminal portion of a substrate includes applying an anisotropic conductive adhesive containing conductive particles made of a low-melting-point material onto either the first terminal portion or the second terminal portion, and electrically connecting the first terminal portion to the second terminal portion by eutectic bonding by melting the conductive particles by application of heat in thermocompression bonding of the second terminal portion to the first terminal portion with the anisotropic conductive adhesive therebetween.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: September 13, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Munehide Saimen
  • Publication number: 20110210954
    Abstract: An electrolyte containment structure for an electrode jelly roll and electrolyte in a portable power source is described. The electrolyte containment structure comprises metal foil, such as metal foil sleeve, coupled to and partially surrounding a rigid frame. The rigid frame can protect the electrode jelly roll edges from crush events. To prevent shorts, the metal foil can be coated in plastic, which can insulate the metal foil from the electrode jelly roll. Further, the plastic can serve as a bonding and sealing agent. For instance, the metal foil can be coupled to the rigid frame using a thermal bonding method involving melting of the plastic. The rigid frame can provide a platform for connector pads and safety circuitry associated with the portable power source.
    Type: Application
    Filed: March 1, 2010
    Publication date: September 1, 2011
    Applicant: APPLE INC.
    Inventors: R. Sean Murphy, Thomas W. Wilson, JR.
  • Publication number: 20110194255
    Abstract: According to embodiments, there is provided an electronic component unit, including: a circuit board including: a heat generating element that generates a heat; and a bonding metal foil layer formed on a face thereof; a heat transfer board including: a board body having a thermal conductivity higher than that of the circuit board; an insulative layer formed on a first face of the board body; and a heat transfer metal foil layer formed to cover the insulative layer; and a heat sink, wherein the circuit board is assembled with the heat sink via the heat transfer board such that (1) the heat transfer metal foil layer is soldered to the bonding metal foil layer and (2) the second face of the board body is superimposed on the heat sink.
    Type: Application
    Filed: February 9, 2011
    Publication date: August 11, 2011
    Applicant: Honda Elesys Co., Ltd.
    Inventors: Seiji Yamashita, Tamotsu Teshima, Amane Murao, Hiroshi Ishizaki, Takashi Honda, Hitoshi Kuroyanagi, Tomoyuki Masubushi
  • Patent number: 7985622
    Abstract: A method of forming collapse chip connection bumps on a semiconductor substrate is provided. The method includes providing a semiconductor substrate having a plurality of bump vias on a top surface of the semiconductor substrate and electroplating the plurality of bump vias to form a plurality of via pads on the top surface of the semiconductor substrate. The method also includes disposing a plurality of solder microballs on the top surface of the semiconductor substrate, wherein each solder microball is placed on a corresponding via pad on the semiconductor substrate and reflowing the plurality of solder microballs to form the collapse chip connection bumps on the semiconductor substrate.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: July 26, 2011
    Assignee: Intel Corporation
    Inventors: Ravi Nalla, Islam Salama, Charan Gurumurthy, Hamid Azimi
  • Publication number: 20110132423
    Abstract: A photovoltaic solar cell module comprises a plurality of bifacial solar cells and electrical conductors. Each bifacial solar cell comprises a plurality of bus-bar contacts. A phosphorous silicon glass layer is formed on one side of the bifacial cell by phosphorous diffusion, and a boron silicon glass layer is formed on the other side of the bifacial cell by boron diffusion. The phosphorous diffusion and the boron diffusion are conducted by a face-to-face diffusion method. The combination of the two gettering methods substantially increases the minority carrier life time of the bifacial solar cell.
    Type: Application
    Filed: October 11, 2007
    Publication date: June 9, 2011
    Applicant: Gamma Solar
    Inventors: Toshio Joge, Rodolfo J. Magasrevy
  • Publication number: 20110122590
    Abstract: Disclosed is a low viscosity, low to no chloride containing epoxy resin formulation including a divinylbenzene dioxide as a component in the formulation; wherein the formulation is useful for the manufacture of capillary underfill compositions.
    Type: Application
    Filed: November 22, 2010
    Publication date: May 26, 2011
    Applicant: Dow Global Technologies Inc.
    Inventors: Mark B. WILSON, Stephanie L. Potisek
  • Publication number: 20110100692
    Abstract: Various circuit boards and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a solder mask to a first side of a first circuit board. The first side of the first circuit board includes a first conductor structure and a second conductor structure. A first opening is formed in the solder mask that extends to the first conductor structure. The first opening has a first area. A second opening is formed in the solder mask that extends to the second conductor structure and has a second area larger than the first area.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 5, 2011
    Inventors: Roden Topacio, Andrew Leung
  • Patent number: 7935430
    Abstract: A bonding structure and method of manufacturing the same are provided. The bonding structure of a substrate and a component include an electrode formed of metal powder and a resin component on the substrate. A low melting point solder that bonds the component to the electrode. The metal powder contains at least spherical metal powder and flake metal powder. The low melting point solder is infiltrated from the surface of the electrode into the electrode.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: May 3, 2011
    Assignee: Alps Electric Co., Ltd.
    Inventors: Hiroki Suzuki, Masato Uehara