Component Terminal To Substrate Surface (i.e., Nonpenetrating Terminal) Patents (Class 228/180.21)
  • Patent number: 9978719
    Abstract: A method includes applying solder paste to a portion of a circuit board, arranging a first contact pad of a first electronic component adjacent the layer of solder paste, the first electronic component comprising a dielectric layer, at least one semiconductor die embedded in the dielectric layer, the at least one first contact pad being electrically coupled to the semiconductor die and arranged on a lower side of the dielectric layer, and at least one second contact pad positioned on an upper side of the dielectric layer, and melting the solder paste to produce a molten solder that flows onto at least one of the first contact pad and the second contact pad of the first electronic component.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: May 22, 2018
    Assignee: Infineon Technologies Austria AG
    Inventor: Martin Standing
  • Patent number: 9960134
    Abstract: A semiconductor device includes a solder bump overlying and electrically connected to a pad region, and a metal cap layer formed on at least a portion of the solder bump. The metal cap layer has a melting temperature greater than the melting temperature of the solder bump.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: May 1, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Chen-Hua Yu, Shin-Puu Jeng, Chih-Hang Tung, Cheng-Chang Wei
  • Patent number: 9921377
    Abstract: A substrate comprises multiple interposers. Each interposer includes interposer elements, where an optical device is coupled to at least some of the interposer elements; two passages formed through the interposer, where each passage is registered with respect to the interposer elements; two blind holes formed in a surface of the interposer, where each blind hole is concentric with a different passage; two annular troughs formed in the surface, each concentric with a different passage, and an annular area separates the annular troughs from an outer diameter of the corresponding concentric passage; and two spherical registration elements, where each registration element is positioned on uncured adhesive on one of the annular areas, where the passages enable a vacuum to be drawn through such that the registration elements are pulled toward the surface of the interposer to self-align to the inner diameter of the blind holes.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: March 20, 2018
    Assignee: Hewlett Packard Enterprise Department LP
    Inventors: Paul K Rosenberg, Sagi V Mathai, Michael Renne Ty Tan
  • Patent number: 9902006
    Abstract: Apparatus for cleaning an electronic circuit board is disclosed. The electronic circuit board is provided with a substrate layer and a copper layer. A solder mask is applied to the electronic circuit board and a channel is formed in the solder mask. The channel includes an inlet and an outlet. A component is affixed to the electronic circuit board over the channel and cleaning fluid is passed through the channel to remove residual solder flux from between the component and the electronic circuit board.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: February 27, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: William R. Vuono, William D. Beair
  • Patent number: 9893030
    Abstract: Microelectronic assemblies and methods for making the same are disclosed herein. In one embodiment, a method of forming a microelectronic assembly comprises assembling first and second components to have first major surfaces of the first and second components facing one another and spaced apart from one another by a predetermined spacing, the first component having first and second oppositely-facing major surfaces, a first thickness extending in a first direction between the first and second major surfaces, and a plurality of first metal connection elements at the first major surface, the second component having a plurality of second metal connection elements at the first major surface of the second component; and plating a plurality of metal connector regions each connecting and extending continuously between a respective first connection element and a corresponding second connection element opposite the respective first connection element in the first direction.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: February 13, 2018
    Assignee: Invensas Corporation
    Inventors: Cyprian Emeka Uzoh, Belgacem Haba, Charles G. Woychik, Michael Newman, Terrence Caskey
  • Patent number: 9871023
    Abstract: A method of transferring semiconductor devices to a product substrate includes positioning a surface of the product substrate to face a first surface of a semiconductor wafer having the semiconductor devices thereon, and actuating a transfer mechanism to cause the transfer mechanism to engage a second surface of the semiconductor wafer. The second surface of the semiconductor wafer is opposite the first surface of the semiconductor wafer. Actuating the transfer mechanism includes causing a pin to thrust against a position on the second surface of the semiconductor wafer corresponding to a position of a particular semiconductor device located on the first surface of the semiconductor wafer, and retracting the pin to a rest position. The method further includes detaching the particular semiconductor device from the second surface of the semiconductor wafer, and attaching a particular semiconductor device to the product substrate.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: January 16, 2018
    Assignee: Rohinni, LLC
    Inventors: Andrew Huska, Cody Peterson, Clinton Adams, Sean Kupcow
  • Patent number: 9864242
    Abstract: A display device includes: a display panel including a display area and a non-display area; a at least one pad in the non-display area of the display panel; a driving chip connected to the at least one pad, the driving chip including a driving circuit and at least one bump therein, wherein the at least one bump has an inclined surface facing toward a central portion of the driving chip.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: January 9, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventor: Daegeun Lee
  • Patent number: 9842818
    Abstract: BGA packages with a spatially varied ball height, molds and techniques to form such packages. A template or mold with cavities may be pre-fabricated to hold solder paste material applied to the mold, for example with a solder paste printing process. The depth and/or diameter of the cavities may be predetermined as a function of spatial position within the mold working surface area. Mold cavity dimensions may be specified corresponding to package position to account for one or more pre-existing or expected spatial variations in the package, such as a package-level warpage measurement. Any number of different ball heights may be provided. The molds may be employed in a standardize process that need not be modified with each change in the mold.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Jimin Yao, Shawna M. Liff
  • Patent number: 9773750
    Abstract: Electrostatic transfer head array assemblies and methods of transferring and bonding an array of micro devices to a receiving substrate are described. In an embodiment, a method includes picking up an array of micro devices from a carrier substrate with an electrostatic transfer head assembly supporting an array of electrostatic transfer heads, contacting a receiving substrate with the array of micro devices, transferring energy from the electrostatic transfer head assembly to bond the array of micro devices to the receiving substrate, and releasing the array of micro devices onto the receiving substrate.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: September 26, 2017
    Assignee: Apple Inc.
    Inventors: Andreas Bibl, John A. Higginson, Hsin-Hua Hu, Hung-Fai Stephen Law
  • Patent number: 9748210
    Abstract: A method of transferring semiconductor devices to a product substrate includes positioning a surface of the product substrate to face a first surface of a semiconductor wafer having the semiconductor devices thereon, and actuating a transfer mechanism to cause the transfer mechanism to engage a second surface of the semiconductor wafer. The second surface of the semiconductor wafer is opposite the first surface of the semiconductor wafer. Actuating the transfer mechanism includes causing a pin to thrust against a position on the second surface of the semiconductor wafer corresponding to a position of a particular semiconductor device located on the first surface of the semiconductor wafer, and retracting the pin to a rest position. The method further includes detaching the particular semiconductor device from the second surface of the semiconductor wafer, and attaching a particular semiconductor device to the product substrate.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: August 29, 2017
    Assignee: Rohinni, LLC
    Inventors: Andrew Huska, Cody Peterson, Clinton Adams, Sean Kupcow
  • Patent number: 9739300
    Abstract: A component crimping apparatus includes: a substrate holding part that holds a substrate of a transparent material, a component previously attached to each electrode of electrodes juxtaposed in an edge of the substrate through a photo-curable adhesive member; a supporting part having a base part with an optical path and a transparent member on the base part and connected to the optical path, and supports, by the transparent member, a region under a targeted electrode in the substrate; a crimping tool arranged over the transparent member and presses the component to the substrate; a light irradiating part that irradiates the adhesive member attached to the targeted electrode with light through the optical path; and a light shielding member that covers a portion in which the transparent member is not installed in an opening part of the optical path in the base part.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: August 22, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Akira Yamada, Shinjiro Tsuji, Satoshi Adachi, Yasutaka Tsuboi, Toshihiko Tsujikawa
  • Patent number: 9695500
    Abstract: A mask frame assembly including a frame including a first opening, a first mask including second openings that each has an area smaller than the first opening and a first surface having portions of the first surface connected to the frame. The mask frame assembly includes second masks disposed on a second surface of the first mask extending across the first opening in a first direction and arranged in a second direction that is substantially perpendicular. The second masks include pattern parts having a shape corresponding to the second openings. The pattern parts each include pattern holes configured to allow a deposition material to pass through. The second masks include a rib part disposed between the pattern parts. The rib part includes dummy holes each having an area greater than each of the pattern holes. The first mask is configured to block the deposition material passing through the dummy holes.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: July 4, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Junhyeuk Ko, Sangshin Lee
  • Patent number: 9682533
    Abstract: Gallium peritectics have not been previously used to bond a metallic surface to a non-metallic surface. The invention provides a metallic gap filler which is a solid metal created by mixing a solid metal powder or film with a Ga-containing liquid metal that creates an electrical and mechanical connection between two dissimilar surfaces. The resulting gap filler conforms to the roughness of both surfaces, which improves adhesion. The methods disclosed do not require the application of temperatures that could damage either surface. An electrical and mechanical shim can be created from a flowable paste. A hardenable metallic paste for bonding a metallic surface to a non-metallic surface includes a Ga-containing liquid metal, optionally including one or more dissolved metals selected from the group consisting of In, Sn, Zn, and Bi; and a solid metal selected from the group consisting of Cu, Ag, Ni, Sn, and combinations thereof.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: June 20, 2017
    Assignee: HRL Laboratories, LLC
    Inventor: Adam F. Gross
  • Patent number: 9673737
    Abstract: A holding apparatus (100) for electrostatically holding a component (1), in particular a silicon wafer, includes at least one base body (10, 10A, 10B) which is composed of a first plate (11A) and a second plate (12), the first plate (11A) being arranged on an upper side (10A) of the base body (10, 10A, 10B) and the second plate are made of an electrically insulating material, a plurality of projecting, upper burls (13A) which are arranged on the upper side (10A) of the base body (10, 10A, 10B) and form a support surface for the component (1), and a first electrode which is arranged to receive a clamping voltage, wherein the first plate (11A) is made of an electrically conductive, silicon-including ceramic and forms the first electrode. A method for producing the holding apparatus (100) is also described.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: June 6, 2017
    Assignee: Berliner Glas KGaA Herbert Kubatz GmbH & Co.
    Inventor: Oliver Baldus
  • Patent number: 9620705
    Abstract: Methods and apparatus to provide a magnetic field sensor device including a magnetic sensor element, a die having wafer bumps, wherein the magnetic sensor element is positioned in relation to the die, and conductive leadfingers having respective portions electrically connected to the wafer bumps. In embodiments, the device includes a region about the magnetic sensor element that does not contain electrically conductive material for preventing eddy current flow.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: April 11, 2017
    Assignee: Allegro MicroSystems, LLC
    Inventors: Shaun D. Milano, Michael C. Doogue, William P. Taylor
  • Patent number: 9601438
    Abstract: According to one embodiment, there is disclosed a semiconductor device which has a wiring substrate, a semiconductor element mounted on the wiring substrate, a molding resin which seals the semiconductor element, and a shield layer provided on the molding resin, wherein the molding resin has a marking portion by laser irradiation on a surface, and the shield layer is provided on the molding resin having the marking portion.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: March 21, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Taizo Nomura
  • Patent number: 9561914
    Abstract: An apparatus for conveying electronic devices comprises a track for conveying a plurality of electronic devices in a row towards a pick-up position on the track where the electronic devices are removed by a pick-up device. A guiding portion located over the track has a first restraining mechanism formed in the guiding portion that is operative to restrain and secure a first electronic device at a first position next to the pick-up position and a second restraining mechanism formed in the guiding portion that is operative to restrain and secure a second electronic device at a second position away from the pick-up position which is immediately subsequent to the first position. The first and second electronic devices are configured to be released and conveyed towards the pick-up position when the first and second restraining mechanisms respectively are deactivated. A corresponding method is also provided.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: February 7, 2017
    Assignee: ASM TECHNOLOGY SINGAPORE PTE. LTD
    Inventors: Shing Kai Yip, Yu Sze Cheung, Chi Wah Cheng
  • Patent number: 9545044
    Abstract: An electronic component includes a wiring substrate having a first surface and a second surface, an electronic component body mounted on a first surface side of the wiring substrate, an external electrode formed on a second surface side of the wiring substrate which is opposite to the first surface side, the external electrode being electrically connected to the electronic component body, a heat generating member having a conductive property and having a higher resistivity than the external electrode, and a heat insulating layer disposed between the electronic component body and the heat generating member, the heat insulating layer having an insulating property and being formed of a material different from an other material of the wiring substrate.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: January 10, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Katsumi Takada, Kiyokazu Moriizumi, Masayuki Itoh
  • Patent number: 9511438
    Abstract: Provided is a solder bump forming method that enables micro-solder bumps to be formed without the possibility of occurrence of a bridge due to excess molten solder. An injection head 11 for supplying molten solder has a nozzle 16 brought into contact with a mask with openings that is disposed over a substrate 8. After completing a supply operation, the injection head 11 is forcedly cooled by heat transfer from a cooling unit 13 through a heater unit 12 whose operation has been stopped. Molten solder 15 in the cooled injection head 11 does not drool from the nozzle 16 when the injection head 11 moves up.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: December 6, 2016
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Issaku Sato, Akira Takaguchi, Isamu Sato, Takashi Nauchi
  • Patent number: 9502397
    Abstract: A method of making a semiconductor component package can include providing a substrate comprising conductive traces, soldering a surface mount device (SMD) to the substrate with solder, encapsulating the SMD on the substrate with a first mold compound over and around the SMD to form a component assembly, and mounting the component assembly to a temporary carrier with a first side of the component assembly oriented towards the temporary carrier. The method can further include mounting a semiconductor die comprising a conductive interconnect to the temporary carrier adjacent the component assembly, encapsulating the component assembly and the semiconductor die with a second mold compound to form a reconstituted panel, and exposing the conductive interconnect and the conductive traces at the first side and the second side of the component assembly with respect to the second mold compound.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: November 22, 2016
    Assignee: Deca Technologies, Inc.
    Inventor: Christopher M. Scanlan
  • Patent number: 9498837
    Abstract: A bond metal injection tool can include a fill head having a sealed chamber for containing a molten bond metal (e.g., solder) and a gas, and a nozzle for directing a flow of the molten bond metal into cavities in a major surface of a mold. A pressure control device can controllably apply pressure within the chamber to eject the bond metal from the nozzle into the cavities. The pressure control device may also controllably reduce a pressure within the chamber to inhibit the bond metal from being ejected from the nozzle, such as when the fill head is being moved onto the mold surface from a parking location or when the fill head is being moved off the mold surface onto a parking location.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: November 22, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John J. Garant, Robert G. Haas, Bouwe W. Leenstra, Phillip W. Palmatier
  • Patent number: 9475146
    Abstract: A soldering jig comprises a shaped hole that fits a corresponding battery terminal, such as a square battery terminal, and provides a cavity for insertion of a solder wire. An opposite side from the cavity for insertion of the solder wire provides a blind hole for insertion of one end of the solder wire and a template for bending and cutting the solder wire to a correct length. Once cut, the solder wire is inserted into the cavity and is resiliently retained until the solder wire and jig are inverted and placed onto a hot battery terminal. Under pressure and residual heat the hot battery terminal, the solder wire melts, soldering an interface.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: October 25, 2016
    Assignee: Farmer Mold & Machine Works, Inc.
    Inventor: John Goodman
  • Patent number: 9437554
    Abstract: Provided is a semiconductor device. A semiconductor chip is disposed on a substrate. A first magnetic substance, a second magnetic substance and a third magnetic substance which are spaced apart from one another are formed on the semiconductor chip. The first magnetic substance and the second magnetic substance can be adjacent an edge of the semiconductor chip. The third magnetic substance can be adjacent a center of the semiconductor chip. The third magnetic substance is between the first magnetic substance and the second magnetic substance.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: September 6, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Wook Ji, Hyoung-Yol Mun, Yeong-Lyeol Park, In-Kyum Lee
  • Patent number: 9406640
    Abstract: Provided is a flip chip bonder including: a base (12); a bonding stage (20); a plurality of vertical-position adjustment support mechanisms (30) attached to the base (12), and respectively configured to support, in a vertical direction, the bonding stage (20) at a plurality of supporting points being provided on a lower surface (22) of the bonding stage (20), and to adjust positions of the supporting points in the vertical direction; and a leaf spring mechanism (40) configured to connect the base (12) with the bonding stage (20). The leaf spring mechanism (40) restrains movement of the bonding stage (20) relative to the base (12) in an X axis along a surface (21) of the bonding stage (20) and a Y axis perpendicular to the X axis, and allows first twisting about the X axis and second twisting about the Y axis of the bonding stage (20) relative to the base (12), and movement of the bonding stage (20) relative to the base (12) in the vertical direction.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: August 2, 2016
    Assignee: SHINKAWA LTD.
    Inventor: Kohei Seyama
  • Patent number: 9402321
    Abstract: Even if the strength of a solder composition close to a SnBi eutectic composition was improved, it was brittle, so when it was used for small electronic devices such as mobile phones or notebook computers, the resistance to drop impacts when the small electronic equipment was dropped was low. Therefore, interface peeling often took place between the soldered surface and a printed circuit board, resulting in the devices being destroyed. As disclosed, when soldering using a solder paste containing a SnBi-based low-temperature solder, at least one type of solder composition selected from a Sn—Ag, a Sn—Cu, and a Sn—Ag—Cu solder composition is diffused into the solder paste by simultaneously supplying at least one type of preform selected from a Sn—Ag, a Sn—Cu, and a Sn—Ag—Cu solder composition, whereby resistance to drop impacts is improved.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: July 26, 2016
    Assignee: SENJU METAL INDUSTRY CO., LTD.
    Inventors: Masato Shimamura, Ken Tachibana, Takayuki Hori
  • Patent number: 9297971
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and this top surface is in turn electrically coupled to a front surface of an input/output (I/O) integrated circuit that faces the top surface. Furthermore, the front surface of the I/O integrated circuit is electrically coupled to a top surface of the optical integrated circuit, where the top surface of the optical integrated circuit faces the front surface of the I/O integrated circuit.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: March 29, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Hiren D. Thacker, Ashok V. Krishnamoorthy, Robert David Hopkins, II, Jon Lexau, Xuezhe Zheng, Ronald Ho, Ivan Shubin, John E. Cunningham
  • Patent number: 9281290
    Abstract: A bond head for thermal compression die bonding comprises a collet operative to support a die on a first side of the collet during die bonding and a bond head heater located on a second side of the collet opposite to the first side for heating the collet and the die. A die vacuum suction hole on the bond head heater applies a vacuum suction force to hold the collet, and a collet vacuum suction hole on the bond head heater applies a vacuum suction force to hold the die. At least one vacuum distribution channel that is formed on the second side of the collet is in fluid communication with the collet vacuum suction hole and distributes the vacuum suction force across a surface of the second side of the collet for securing the collet.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: March 8, 2016
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD
    Inventors: Kin Yik Hung, Pak Kin Leung, Cheuk Wah Tang, Chi Ping Hung, Gary Peter Widdowson
  • Patent number: 9278510
    Abstract: A method is for manufacturing a stiff, multilayered card body for a portable data carrier, has steps including: making available a layer of an opaque plastic, making available a carbon fiber layer of carbon fiber fabric, impregnating the carbon fiber layer with epoxy resin, fusing the layers to form a half-product, printing the upper side of the carbon fiber layer of the half-product with a graphic pattern in a screen printing process or an offset printing process, laminating a plastic layer onto the printed upper side, and detaching the card body from the half product by means of a separating tool guided relative to the half-product along a path describing the edge contour of the card body.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: March 8, 2016
    Assignee: GIESECKE & DEVRIENT GMBH
    Inventors: Maria del Mar Segura, Gemma Redondo
  • Patent number: 9273408
    Abstract: Solder bumps are provided on round wafers through the use of injection molded solder. Copper pillars or ball limiting metallurgy are formed over I/O pads within the channels of a patterned mask layer. Solder is injected over the pillars or BLM, filling the channels. Molten solder can be injected in cavities formed in round wafers without leakage using a carrier assembly that accommodates wafers that have been previously subjected to mask layer deposition and patterning. One such carrier assembly includes an elastomeric body portion having a round recess, the walls of the recess forming a tight seal with the round wafer. Other carrier assemblies employ adhesives applied around the peripheral edges of the wafers to ensure sealing between the carrier assemblies and wafers.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 1, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Bing Dang, Michael A. Gaynes, Paul A. Lauro, Jae-Woong Nah
  • Patent number: 9273993
    Abstract: An optical subassembly testing system includes a pedestal, a rotation device, a holder and a supporting device. The rotation device includes a rotation member, a connecting plate and a retractable pillar. The rotation member is arranged on the pedestal and rotates relative to the pedestal. The connecting plate includes a mounting portion and a protruding portion, the mounting portion is arranged on the rotation member, the protruding portion extends away from the mounting portion and is exposed outside of the rotation member, and the retractable pillar is fixed perpendicular to the pedestal on an end of the protruding portion. The holder is fixed on an end of the retractable pillar and clamps a fiber connector. The supporting device includes a plurality of receiving grooves surrounding the pedestal, the receiving grooves are configured for receiving transmitter optical subassemblies (TOSAs) to test by aligning the fiber connector with each TOSA in turn.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: March 1, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chang-Wei Kuo
  • Patent number: 9252138
    Abstract: An electronic packaging assembly having a semiconductor integrated circuit and a plurality of interconnect components is provided. The plurality of interconnect components is operatively coupled to the semiconductor integrated circuit. Further, one or more interconnect components include one or more support elements having a first surface and a second surface, and one or more spring elements having a first end and a second end, and wherein first ends of the one or more spring elements are coupled to the first surface or the second surface of a respective support element.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: February 2, 2016
    Assignee: General Electric Company
    Inventors: Gamal Refai-Ahmed, David Mulford Shaddock, Arun Virupaksha Gowda, John Anthony Vogel, Christian Giovanniello
  • Patent number: 9114594
    Abstract: A thin film of tin is plated directly on nickel coating a metal substrate followed by plating silver directly on the thin film of tin. The silver has good adhesion to the substrate even at high temperatures.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: August 25, 2015
    Inventors: Wan Zhang-Beglinger, Margit Clauss, Michael P. Toben
  • Publication number: 20150138742
    Abstract: A method of soldering can include: providing a first electronic component having a first buttoned soldering pad including a first soldering pad and one or more first button heads protruding from a first surface of the soldering pad; providing a second electronic component having a soldering pad; and soldering the first buttoned soldering pad to the soldering pad. The method includes introducing solder to spaces around the one or more first buttons of the first buttoned soldering pad. The method includes introducing a first solder to spaces around the one or more first buttons of the first buttoned soldering pad; introducing a second solder to spaces around one or more second buttons of a second buttoned soldering pad of the first electronic component; and forming spaces between the first and second solder that electronically insulate the first solder from the second solder.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 21, 2015
    Inventors: Henry Nguyen, Yuxin Zhou, Tay Gek-Teng
  • Publication number: 20150108204
    Abstract: An integrated circuit (IC) package stack with a first and second substrate interconnected by solder further includes solder resist openings (SRO) of mixed lateral dimension are spatially varied across an area of the substrates. In embodiments, SRO dimension is varied between at least two different diameters as a function of an estimated gap between the substrates that is dependent on location within the substrate area. In embodiments where deflection in at least one substrate reduces conformality between the substrates, a varying solder joint height is provided from a fixed volume of solder by reducing the lateral dimensioning of the SRO in regions of larger gap relative to SRO dimensions in regions of smaller gap. In embodiments, the first substrate may be any of an IC chip, package substrate, or interposer while the second substrate may be any of another IC chip, package substrate, interposer, or printed circuit board (PCB).
    Type: Application
    Filed: December 23, 2014
    Publication date: April 23, 2015
    Inventors: Tieyu Zheng, Sumit Kumar, Sridhar Nara, Renee D. Garcia, Manohar S. Konchady, Suresh B. Yeruva, Lynn H. Chen, Tyler N. Osborn, Sairam Agraharam
  • Patent number: 9010617
    Abstract: In a reflow process, a plurality of solder bumps between a first workpiece and a second workpiece is melted. During a solidification stage of the plurality of solder bumps, the plurality of solder bumps is cooled at a first cooling rate. After the solidification stage is finished, the plurality of solder bumps is cooled at a second cooling rate lower than the first cooling rate.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: April 21, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Wen-Yao Chang, Chien Rhone Wang, Kewei Zuo, Chung-Shi Liu
  • Patent number: 9010618
    Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein components of the microelectronic packages may have magnetic attachment structures comprising a magnetic component and a metal component. The magnetic attachment structure may be exposed to a magnetic field, which, through the vibration of the magnetic component, can heat the magnetic attachment structure, and which when placed in contact with a solder material can reflow the solder material and attach microelectronic components of the microelectronic package.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: April 21, 2015
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Rajasekaran Swaminathan, Ting Zhong
  • Patent number: 9004343
    Abstract: In a reflow soldering apparatus, air heated by heaters is blown by fans onto a printed circuit board. Temperature controllers that control temperature of the heaters supply operation amount thereof to a calculation unit that calculates consumed electric energy of soldering apparatus. Inverters that control revolution of fans supply a value of current to the calculation unit. A control unit supplies a coefficient of the consumed electric energy to the calculation unit. The calculation unit calculates a total amount of consumed electric energy of the reflow soldering apparatus based on the operation amount, value of current and coefficient of the consumed electric energy thus obtained. A display unit displays on an operation screen the total amount of consumed electric energy of the reflow soldering apparatus, which has been calculated by the calculation unit.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: April 14, 2015
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Hiroyuki Inoue, Tadayoshi Ohtashiro
  • Patent number: 8991682
    Abstract: A method for connecting a plurality of solar cells and an improved interconnect is disclosed. The method includes aligning an interconnect to a plurality of solar cells having solder pads, where the interconnect has a main body and tabs extending therefrom, and where each of the tabs has a downward depression, such that the tabs are positioned above the solder pads in between solar cells and pinning the interconnect against a work surface by pressing a hold down pin against the main body of the interconnect such that a lower surface of the interconnect tabs are maintained parallel to an upper surfaces of the solder pads, and such that the depression of each of the tabs flatly contacts the solder pads. The method can also include cantilevered tabs extending downwardly from the main body providing a controlled spring force between the tab lower surface and the solder pad upper surface.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: March 31, 2015
    Assignee: Sunpower Corporation
    Inventors: Ryan Linderman, Thomas Phu
  • Patent number: 8967452
    Abstract: A die is prepared for thermal compression bonding by first aligning electrical contacts on the die to bond pads on a substrate onto which the die is to be mounted. Those electrical contacts are held against the bond pads on the substrate with a bonding tool. Partially bonding the die onto the substrate by providing heat to a portion of the die to elevate a temperature there to above a melting point of solder in the electrical contacts so as to melt at least some of the solder. Then thermally compress the whole die and heat it to above the melting point of the solder of the electrical contacts so that the solder of the electrical contacts outside the portion of the die are also melted to bond the die to the substrate.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: March 3, 2015
    Assignee: ASM Technology Singapore Pte Ltd
    Inventors: Yiu Ming Cheung, Tsan Yin Peter Lo, Ming Li, Yick Hong Mak, Ka San Lam
  • Publication number: 20150048523
    Abstract: [Problem] Provided is a technique for bonding chips efficiently onto a wafer to establish an electrical connection and raise mechanical strength between the chips and the wafer or between the chips that are chips laminated onto each other in the state that resin and other undesired residues do not remain on a bond interface therebetween.
    Type: Application
    Filed: April 24, 2013
    Publication date: February 19, 2015
    Applicant: BONDTECH CO., LTD.
    Inventors: Tadatomo Suga, Akira Yamauchi
  • Patent number: 8944309
    Abstract: A solder joint may be used to attach components of an organic vapor jet printing device together with a fluid-tight seal that is capable of performance at high temperatures. The solder joint includes one or more metals that are deposited over opposing component surfaces, such as an inlet side of a nozzle plate and/or an outlet side of a mounting plate. The components are pressed together to form the solder joint. Two or more of the deposited metals may be capable of together forming a eutectic alloy, and the solder joint may be formed by heating the deposited metals to a temperature above the melting point of the eutectic alloy. A diffusion barrier layer and an adhesion layer may be included between the solder joint and each of the components.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: February 3, 2015
    Assignee: The Regents of The University of Michigan
    Inventors: Stephen R. Forrest, Gregory McGraw
  • Patent number: 8939347
    Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 27, 2015
    Assignee: Intel Corporation
    Inventors: Rajasekaran Swaminathan, Ravindranath V. Mahajan
  • Patent number: 8915418
    Abstract: The present invention ensures a good bonding state between the electrode terminals of electronic components and the electrodes of a substrate, and achieves an increase in productivity and a downsizing of the substrate. The present invention includes: an applying step of applying a metal fine powder paste on each of multiple electrodes that are provided on a substrate; a component placing step of placing multiple electronic components with different heights, on the multiple electrodes, respectively; an organic film placing step of placing an organic film on the multiple electronic components; an organic film compressing step of applying a first pressure to the electronic component side with a pressing member and equalizing the height of the organic film; and a bonding step of applying a second pressure to the electronic component side with a compressing member on heating for a predetermined time and sintering the metal fine powder paste.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: December 23, 2014
    Assignees: Tadatomo Suga, Masataka Mizukoshi, Alpha Design Co., Ltd.
    Inventors: Toshiyuki Shiratori, Toru Kawasaki, Tadatomo Suga, Masataka Mizukoshi
  • Patent number: 8899289
    Abstract: When joining a processing target substrate and a supporting substrate together by suction-holding the processing substrate and the supporting substrate respectively on a first holding unit and a second holding unit arranged to face each other and pressing the second holding unit toward the first holding unit while heating the substrates by heating mechanisms of the holding units, the present invention preheats at least the processing target substrate before suction-holding the processing target substrate on the first holding unit to suppress generation of particles when joining the processing target substrate and the supporting substrate together so as to properly perform the joining of the processing target substrate and the supporting substrate.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: December 2, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masatoshi Deguchi, Masatoshi Shiraishi, Shinji Okada
  • Publication number: 20140301042
    Abstract: An electronic device is attached to a first surface of a board which includes vias. A heat sink precursor for the electronic device is attached to the second surface of the electronic board. The heat sink precursor includes a cavity facing the vias. A wave of solder paste is applied to the second surface. The solder paste penetrates into the cavity of the heat sink precursor and flows by capillary action through the vias to weld a thermal radiator and/or electronic contact of the electronic device to the vias. The solder paste further remains in the cavity to form a corresponding heat sink.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 9, 2014
    Applicant: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Rosalba Cacciola, Giuseppe Luigi Malgioglio
  • Patent number: 8851356
    Abstract: Embodiments of the invention include flexible circuit board interconnections and methods regarding the same. In an embodiment, the invention includes a method of connecting a plurality of flexible circuit boards together comprising the steps applying a solder composition between an upper surface of a first flexible circuit board and a lower surface of a second flexible circuit board; holding the upper surface of the first flexible circuit board and the lower surface of the second flexible circuit board together; and reflowing the solder composition with a heat source to bond the first flexible circuit board and the second flexible circuit board together to form a flexible circuit board strip having a length longer than either of the first flexible circuit board or second flexible circuit board separately.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 7, 2014
    Assignee: Metrospec Technology, L.L.C.
    Inventors: Henry V. Holec, Wm. Todd Crandell, Eric Henry Holec
  • Patent number: 8833634
    Abstract: An object of the invention is to provide an electronic component mounting system which can execute component mounting work on a plurality of boards simultaneously, concurrently and efficiently so that high productivity and responsiveness to production of many items can be achieved consistently.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: September 16, 2014
    Assignee: Panasonic Corporation
    Inventor: Kazuhide Nagao
  • Publication number: 20140230989
    Abstract: The invention relates to a method for connecting a power semi-conductor chip having upper-sided potential surfaces to thick wires or strips, consisting of the following steps: Providing a metal moulded body corresponding to the shape of the upper-sided potential surfaces, applying a connecting layer to the upper-sided potential surfaces or to the metal moulded bodies, and applying the metal moulded bodies and adding a material fit, electrically conductive compound to the potential surfaces prior to the joining of the thick wire bonds to the non-added upper side of the moulded body.
    Type: Application
    Filed: September 10, 2012
    Publication date: August 21, 2014
    Applicant: DANFOSS SILICON POWER GMBH
    Inventors: Martin Becker, Ronald Eisele, Frank Osterwald, Jacek Rudzki
  • Patent number: 8807416
    Abstract: A reflow soldering system wherein a heating oven is provided with a contact heating unit which has a transport rail and a top heat transfer heater, and with a hot gas blowing heating unit, the transport rail and top heat transfer heater are respectively provided with heaters which heat the outer edge part of the printed circuit board, and the transport rail or top heat transfer heater moves in an up-down direction so that the transport rail and top heat transfer heater clamp and heat the outer edge part of the printed circuit board.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: August 19, 2014
    Assignee: Denso Corporation
    Inventors: Takuji Sukekawa, Hiroyuki Yamada, Noriyasu Inomata
  • Publication number: 20140217156
    Abstract: A joining method that allows joining processing to be carried out simultaneously at a plurality of portions without being influenced by a supply time restriction on a joining material, and a semiconductor device manufacturing method using the joining method are provided. A chip and a lead frame are tentatively assembled having a solid solder block interposed therebetween. The solder block is provided with protruding parts that protrude in one direction. The protruding parts are inserted into solder supply ports of the lead frame, whereby the chip and the lead frame are tentatively assembled. Subsequently, the chip and the lead frame are fed into a reflow oven, and the solder block is melted and thereafter solidified. Thus, the chip and the lead frame are joined to each other.
    Type: Application
    Filed: April 11, 2014
    Publication date: August 7, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Aya MUTO, Masayoshi Shinkai