Component Terminal To Substrate Surface (i.e., Nonpenetrating Terminal) Patents (Class 228/180.21)
-
Publication number: 20140202739Abstract: A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.Type: ApplicationFiled: March 21, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Taiji Sakai, Seiki Sakuyama
-
Patent number: 8777091Abstract: A light emitting member mounting method includes: causing a friction material to contact a substrate including at least an optical waveguide member mounted on a base and to contact a light emitting member that is to be mounted to the substrate and that is equipped with a light emitting component, so as to suppress relative movement between the substrate and the light emitting member using frictional force exerted on the substrate and the light emitting member, and positionally aligning the light emitting member to the substrate by employing light emitted from the light emitting component; and bonding the substrate and the light emitting member together by melting a bonding material interposed between the substrate and the light emitting member.Type: GrantFiled: February 12, 2013Date of Patent: July 15, 2014Assignee: Fujitsu LimitedInventors: Yoshiyuki Hiroshima, Naoki Nakamura, Akiko Matsui, Tetsuro Yamada, Takahiro Ooi, Kohei Choraku
-
Patent number: 8763884Abstract: The present invention relates to a joint (10) that includes a first member (11) to be jointed, a second member (12) to be jointed and a jointing layer (13) located between the first member (11) and the second member (12). The jointing layer (13) is made of Sn metal and a metallic material with a melting point higher than the melting point of the Sn metal. The present invention relates also to a method of joining this first member (11) to the second member (12).Type: GrantFiled: August 6, 2013Date of Patent: July 1, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Toshihide Takahashi, Tatsuoki Kono, Mitsuhiro Oki, Akiko Suzuki
-
Patent number: 8757474Abstract: A soldering method capable of alleviating positional displacement between substrates even though a step of removing flux can be omitted is provided. A temporary bonding agent 55 is applied onto multiple substrates 50a, 50b, and a heater 33 heats the substrates while the substrates are temporarily bonded with the temporary bonding agent 55 interposed therebetween, and before the solder 54 is melted or while the solder 54 is melted, the temporary bonding agent 55 is evaporated, and the substrates 50a, 50b are bonded with solder with the melted solder 54 interposed therebetween.Type: GrantFiled: June 24, 2011Date of Patent: June 24, 2014Assignee: Ayumi Industry Co., Ltd.Inventors: Hideyuki Abe, Kazuaki Mawatari
-
Patent number: 8746538Abstract: A joining method that allows joining processing to be carried out simultaneously at a plurality of portions without being influenced by a supply time restriction on a joining material, and a semiconductor device manufacturing method using the joining method are provided. A chip and a lead frame are tentatively assembled having a solid solder block interposed therebetween. The solder block is provided with protruding parts that protrude in one direction. The protruding parts are inserted into solder supply ports of the lead frame, whereby the chip and the lead frame are tentatively assembled. Subsequently, the chip and the lead frame are fed into a reflow oven, and the solder block is melted and thereafter solidified. Thus, the chip and the lead frame are joined to each other.Type: GrantFiled: October 19, 2012Date of Patent: June 10, 2014Assignee: Mitsubishi Electric CorporationInventors: Aya Muto, Masayoshi Shinkai
-
Patent number: 8740046Abstract: A soldering system includes a track, a laying device, a boiler, a shelter, a transmission roller, a position sensor, a thermal radiation heating device, and a driving device. At least one hole is formed on the shelter, and a shape and a dimension of at least one hole on the shelter corresponds to a shape and a dimension of a DIP component. The transmission roller rotates the shelter according to a transmission speed of the track. The position sensor detects a position of a circuit board relative to the boiler. The thermal radiation heating device heats an area on a second surface of the circuit board different from a first surface adjacent to the DIP component through the at least one hole on the shelter continuously, so as to increase a temperature of the second surface when the first surface of the circuit board is passing through the boiler.Type: GrantFiled: January 8, 2014Date of Patent: June 3, 2014Assignee: Wistron CorporationInventors: Hao-Chun Hsieh, Chia-Hsien Lee
-
Publication number: 20140144688Abstract: Provided are a circuit board, and a method of mounting an electronic component on the circuit board. The circuit board according to an exemplary embodiment of the present invention includes: a pad pattern including a basic pattern and one or more additional patterns connected to the basic pattern, in which the basic pattern includes a region in which a connection terminal of an electronic component is attached by solder, the one or more additional patterns include regions in which the connection terminal of the electronic component is not attached, and the basic pattern includes an exposed side or an exposed point capable of limiting a mounting position so as to prevent the electronic component from exceeding an alignment margin.Type: ApplicationFiled: March 15, 2013Publication date: May 29, 2014Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: CHUNG-WON CHOI, Seok Hwan Lee, Min-Soo Choi
-
Publication number: 20140138732Abstract: A light-emitting module that can prevent a short circuit of an LED element due to mounting is to be provided. According to one embodiment, a light-emitting module includes an LED element, a DPC substrate, and solder joining sections. The LED element is a face-down type. The DPC substrate includes a mounting surface on which the LED element is mounted. First and second wiring patterns including first and second land section are formed on the mounting surface. The LED element and the first and second land sections of the DPC substrate are joined by the first and second solder joining sections. At least the second land section is formed further on the inner side than the side surfaces of the LED element.Type: ApplicationFiled: February 28, 2013Publication date: May 22, 2014Applicant: Toshiba Lighting & Technology CorporationInventors: Akihiro SASAKI, Nobuhiko Betsuda
-
Patent number: 8728872Abstract: A method includes preparing a bonding surface of a heat dissipating member, applying flux to the bonding surface of the heat dissipating member, and removing excess flux from the bonding surface so that minimal flux is provided. The method also includes preparing a die surface of an electronic device package, applying flux to the die surface, and removing excess flux from the die surface so that minimal flux is provided. The method further includes positioning a preform solder component on the die surface, positioning the heat dissipating member over the die surface and the preform solder component such that the flux layer of the bonding surface is in contact with the preform solder component, and reflowing the solder component using a reflow oven. A heat spreader is also described for use in the process.Type: GrantFiled: August 18, 2011Date of Patent: May 20, 2014Assignee: DY 4 Systems, Inc.Inventors: Ivan Straznicky, Peter Robert Lawrence Kaiser, Steven Drennan, Marc-Jason Renaud, Georges Francis Marquis
-
Publication number: 20140124566Abstract: A flip chip assembly apparatus includes at least one warpage-suppressor assembly. Each warpage-suppressor assembly can include a side heater, a deformable material pad, and an actuator assembly for moving the side heater and the deformable material pad. Each side heater provides additional heat to peripheral solder balls during bonding of two substrates, thereby facilitating the reflow of the peripheral solder balls. Each deformable material pad contacts, and presses down on, a surface of one of the two substrates under bonding. The deformable material pad(s) can prevent or minimize warpage of the contacted substrate.Type: ApplicationFiled: January 7, 2014Publication date: May 8, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter J. Brofman, Jae-Woong Nah, Katsuyuki Sakuma
-
Patent number: 8690041Abstract: A method of soldering a DIP component on a circuit board includes piercing the DIP component through the circuit board, laying fluxer on the circuit board, passing a first surface of the circuit board through a boiler so that molten tin from the boiler flows between the DIP component and the circuit board through the first surface of the circuit board, and heating a second surface of the circuit board different from the first surface so as to increase temperature of the second surface by a thermal radiation heating device to when the first surface of the circuit board passes through the boiler.Type: GrantFiled: December 13, 2011Date of Patent: April 8, 2014Assignee: Wistron CorporationInventors: Hao-Chun Hsieh, Chia-Hsien Lee
-
Publication number: 20140076621Abstract: The described embodiments relate generally to printed circuit boards (PCBs) including a capacitor and more specifically to designs for mechanically isolating the capacitor from the PCB to reduce an acoustic noise produced when the capacitor imparts a piezoelectric force on the PCB. Conductive features can be mechanically and electrically coupled to electrodes located on two ends of the capacitor. The conductive features can be placed in corners where the amplitude of vibrations created by the piezoelectric forces is relatively small. The conductive features can then be soldered to a land pattern on the PCB to form a mechanical and electrical connection while reducing an amount of vibrational energy transferred from the capacitor to the PCB.Type: ApplicationFiled: August 1, 2013Publication date: March 20, 2014Applicant: Apple Inc.Inventors: Shawn X. ARNOLD, Jeffrey M. THOMA, Connor R. DUKE, Yanchu XU, Nelson J. KOTTKE
-
Patent number: 8671561Abstract: A substrate manufacturing apparatus 100 has a substrate delivery path 120 through which a multi-unit substrate 110 is delivered and a mask delivery path 140 through which an individual mask 130 is delivered. The substrate delivery path 120 has a pad detecting device 160 for detecting a position of a pad 112 formed on a surface of the substrate 110. The mask delivery path 140 has a mask hole detecting device 220 for detecting a position of a conductive ball inserting hole 132 of the individual mask 130. A moving position of an adsorbing head 212 is adjusted in such a manner that the position of the conductive ball inserting hole 132 is coincident with that of the pad 112 of the substrate 110 based on pad position information of the pad detecting device 160 and mask hole position information of the mask hole detecting device 220.Type: GrantFiled: May 23, 2008Date of Patent: March 18, 2014Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kiyoaki Iida, Kazuo Tanaka, Hideaki Sakaguchi, Mitsutoshi Higashi
-
Patent number: 8651363Abstract: A practical bonding technique is provided for solid-phase room-temperature bonding not requiring a profile irregularity of the order of several nanometers, in which a high-vacuum energy wave treatment and continuous high-vacuum bonding are not required. Since an adhering substance layer is thin immediately after a surface activating treatment using an energy wave, a bonding interface is spread by crushing the adhering substance layer to perform bonding, so that a new surface appears on a bonding surface, and objects to be bonded are bonded together. In order to crush the adhering substance layer more easily, a bonding metal of a bonding portion of the object to be bonded requires a low hardness. According to the results of various experiments conducted by the present inventors, it was found that the hardness of the bonding portion which is a Vickers hardness of 200 Hv or less is particularly effective for room-temperature bonding.Type: GrantFiled: November 16, 2011Date of Patent: February 18, 2014Assignees: Bondtech, Inc., Tadatomo SUGAInventors: Tadatomo Suga, Masuaki Okada
-
Patent number: 8646676Abstract: An object of the invention is to provide an electronic component mounting system and an electronic component mounting method which can execute component mounting work on a plurality of boards simultaneously, concurrently and efficiently so that high productivity and responsiveness to production of many items can be achieved consistently.Type: GrantFiled: September 29, 2009Date of Patent: February 11, 2014Assignee: Panasonic CorporationInventor: Kazuhide Nagao
-
Patent number: 8640943Abstract: Productivity is to be improved in assembling a semiconductor integrated circuit device. A matrix substrate is provided and semiconductor chips are disposed on a first heating stage, then the matrix substrate is disposed above the semiconductor chips on the first heating stage, subsequently the semiconductor chips and the matrix substrate are bonded to each other temporarily by thermocompression bonding while heating the chips directly by the first heating stage, thereafter the temporarily bonded matrix substrate is disposed on a second heating stage adjacent to the first heating stage, and then on the second heating stage the semiconductor chips are thermocompression-bonded to the matrix substrate while being heated directly by the second heating stage.Type: GrantFiled: September 10, 2012Date of Patent: February 4, 2014Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Yukio Tani
-
Patent number: 8636198Abstract: A method for connecting a plurality of solar cells and an improved interconnect is disclosed. The method includes aligning an interconnect to a plurality of solar cells having solder pads, where the interconnect has a main body and tabs extending therefrom, and where each of the tabs has a downward depression, such that the tabs are positioned above the solder pads in between solar cells and pinning the interconnect against a work surface by pressing a hold down pin against the main body of the interconnect such that a lower surface of the interconnect tabs are maintained parallel to an upper surfaces of the solder pads, and such that the depression of each of the tabs flatly contacts the solder pads. The method can also include cantilevered tabs extending downwardly from the main body providing a controlled spring force between the tab lower surface and the solder pad upper surface.Type: GrantFiled: March 13, 2013Date of Patent: January 28, 2014Assignee: SunPower CorporationInventors: Ryan Linderman, Thomas Phu
-
Publication number: 20130323526Abstract: A substrate pad for soldering at least one self-aligning component thereon, wherein at least one edge of a body of the substrate pad is shaped to conform to a corresponding edge of a component pad, and the at least one edge of the body of the substrate pad further include a plurality of pad fingers leading away from the substrate pad. Related apparatus and methods are also described.Type: ApplicationFiled: May 29, 2013Publication date: December 5, 2013Inventors: Slava HASIN, Ron Helfan
-
Patent number: 8561879Abstract: Devices and methods for assembling co-planar electrical contacts in a connector are provided herein. In one aspect, an exemplary method of assembly comprises depositing solder in a connector plug enclosure, positioning electrical contacts on the solder deposits, advancing the hotbar toward the enclosure contacting each of the electrical contacts so as to planarize a top surface of each of the electrical contacts with the enclosure and melting the solder with the heated hotbar to solder the electrical contacts to the enclosure. In one aspect, an exemplary hotbar device includes a magnet for releasably coupling the electrical contacts to the hotbar. In another aspect, the hotbar includes metallic portions for heating the electrical contacts and insulated ceramic portions for contacting the enclosure. In another aspect, an electrically conductive hotbar includes side portions that extend away from the bottom heating surface facilitating more uniform current flow through the hotbar.Type: GrantFiled: January 9, 2012Date of Patent: October 22, 2013Assignee: Apple Inc.Inventors: Eric S. Jol, Mathias W. Schmidt, Edward Siahaan, Albert J. Golko
-
Publication number: 20130270230Abstract: A die is prepared for thermal compression bonding by first aligning electrical contacts on the die to bond pads on a substrate onto which the die is to be mounted. Those electrical contacts are held against the bond pads on the substrate with a bonding tool. Partially bonding the die onto the substrate by providing heat to a portion of the die to elevate a temperature there to above a melting point of solder in the electrical contacts so as to melt at least some of the solder. Then thermally compress the whole die and heat it to above the melting point of the solder of the electrical contacts so that the solder of the electrical contacts outside the portion of the die are also melted to bond the die to the substrate.Type: ApplicationFiled: April 17, 2012Publication date: October 17, 2013Inventors: Yiu Ming CHEUNG, Tsan Yin Peter LO, Ming LI, Yick Hong MAK, Ka San LAM
-
Patent number: 8549737Abstract: The present invention relates to a compliant leaded interposer for resiliently attaching and electrically connecting a ball grid array package to a circuit board. The interposer may include a substrate, a plurality of pads, and a plurality of pins. The plurality of pads may be positioned substantially on the top surface of the substrate and arranged in a predetermined pattern substantially corresponding to the solder ball pattern on the ball grid array package. The plurality of pins may be positioned substantially perpendicular to the substrate and may extend through the substrate and the plurality of pads. The interposer may be configured to attach the ball grid array package to the circuit board such that each of the solder balls on the ball grid array package contacts at least a portion the plurality of pins and at least a portion of the plurality of pads and such that the each of the plurality of pins also connects to a contact on the circuit board.Type: GrantFiled: March 22, 2010Date of Patent: October 8, 2013Assignee: General Dynamics Advanced Information Systems, Inc.Inventor: Deepak K. Pai
-
Publication number: 20130258632Abstract: A joining sheet includes a solder layer which contains solder particles, a thermoplastic resin, and an active agent capable of activating the solder particles and a thermosetting resin-containing layer which is laminated on at least one surface in a thickness direction of the solder layer and contains a thermosetting resin.Type: ApplicationFiled: March 14, 2013Publication date: October 3, 2013Applicant: NITTO DENKO CORPORATIONInventors: Hirofumi EBE, Yoshihiro FURUKAWA
-
Publication number: 20130240610Abstract: A solder paste transfer process is provided and includes defining multiple arrangements of solder pad locations on a surface, applying solder paste onto multiple transfer tools coupled to a fixture in a pre-defined configuration reflective of the multiple arrangements, disposing the fixture such that the multiple transfer tools are disposed in an inverted orientation proximate to the surface and reflowing the solder paste to flow from the multiple transfer tools to the solder pad locations.Type: ApplicationFiled: March 14, 2012Publication date: September 19, 2013Applicant: RAYTHEON COMPANYInventors: William D. Beair, Michael R. Williams, Eric Gilley
-
Publication number: 20130221075Abstract: This invention relates to a substrate with via and pad structure(s) to reduce solder wicking. Each via and pad structure connects a component to conductive layers associated with the substrate. The substrate includes one or more plated vias, solder mask(s) surrounding the plated vias, and a conductive pad with a conductive trace connected to each plated via. The conductive pad extends beyond the terminal sides to increase solder formation and the solder mask reduces solder formation at the terminal end of the component. The via and pad structure is suitable for a variety of components and high component density. The invention also provides a computer implemented method for calculating the maximum distance of a conductive pad extending beyond the terminal side of a component.Type: ApplicationFiled: February 5, 2013Publication date: August 29, 2013Applicant: Flextronics AP, LLCInventor: Flextronics AP, LLC
-
Patent number: 8492673Abstract: Avoiding contaminant generation within a hard disk drive due to increased temperatures during a solder reflow process is described. Energy from a beam of energy that is directed toward a plurality of polyimide regions is received. Each of the plurality of polyimide regions are disposed adjacent to at least one solder pad. The plurality of polyimide regions and the at least one solder pad comprises a first component of a hard disk drive. Then, a portion of the energy is reflected away from the plurality of polyimide regions to prevent an absorption of the portion by the plurality of polyimide regions and a burning of the plurality of polyimide regions.Type: GrantFiled: December 23, 2008Date of Patent: July 23, 2013Assignee: HGST Netherlands B.V.Inventors: Edgar Rothenberg, Jr-Yi Shen
-
Patent number: 8490856Abstract: A joint apparatus of the present invention includes: a pre-thermal processing unit including a first thermal processing plate mounting and thermally processing a superposed substrate where substrates are superposed on each other with joint portions of the substrates in contact with each other, and a first pressure reducing mechanism; a joint unit including a second thermal processing plate mounting and thermally processing the superposed substrate processed in the pre-thermal processing unit, a pressurizing mechanism pressing the superposed substrate on the second thermal processing plate toward the second thermal processing plate side, and a second pressure reducing mechanism; and a post-thermal processing unit including a third thermal processing plate mounting and thermally processing the superposed substrate processed in the joint unit, and a third pressure reducing mechanism, wherein each of the pre-thermal processing unit and the post-thermal processing unit is hermetically connected to the joint unit.Type: GrantFiled: December 27, 2010Date of Patent: July 23, 2013Assignee: Tokyo Electron LimitedInventor: Osamu Hirakawa
-
Publication number: 20130153278Abstract: Disclosed herein is a ball grid array (BGA) package including: a printed circuit board (PCB) in which a device is mounted via solder balls, wherein the PCB includes a plurality of pad patterns each including the solder balls and having the same shape. A uniform amount of solder balls is included in the pad patterns having the same shape, and thus the BGA package according to the present invention can prevent a short or open from occurring due to a conventional problem of an excessive or small amount of solder balls.Type: ApplicationFiled: December 19, 2012Publication date: June 20, 2013Applicant: Samsung Electro-Mechanics Co., Ltd.Inventor: Samsung Electro-Mechanics Co., Ltd.
-
Patent number: 8434665Abstract: Disclosed are an electronic component mounting system and an electronic component mounting method capable of reducing the space occupied by equipment and equipment cost and ensuring high connection reliability. An electronic component mounting system (1) includes a solder printing device (M1), a coating/inspection device (M2), a component mounting device (M3), a bonding material supply/substrate mounting device (M4), and a reflow device (M5). The electronic component mounting system (1) mounts an electronic component on a main substrate (4) and connects a module substrate (5) to the main substrate (4). A cream solder is printed on the main substrate (4) to mount an electronic component, a bonding material in which solder particles are contained in thermosetting resin is supplied to a first connection portion of the main substrate (4), and a second connection portion of the module substrate (5) is landed on the first connection portion through the bonding material.Type: GrantFiled: March 24, 2010Date of Patent: May 7, 2013Assignee: Panasonic CorporationInventors: Koji Motomura, Hideki Eifuku, Tadahiko Sakai
-
Patent number: 8434668Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein components of the microelectronic packages may have magnetic attachment structures comprising a magnetic component and a metal component. The magnetic attachment structure may be exposed to a magnetic field, which, through the vibration of the magnetic component, can heat the magnetic attachment structure, and which when placed in contact with a solder material can reflow the solder material and attach microelectronic components of the microelectronic package.Type: GrantFiled: May 12, 2010Date of Patent: May 7, 2013Assignee: Intel CorporationInventors: Aleksandar Aleksov, Rajasekaran Swaminathan, Ting Zhong
-
Patent number: 8434666Abstract: A flux composition is provided, comprising, as an initial component: a carboxylic acid; and, a fluxing agent represented by formula I: wherein R1, R2, R3 and R4 are independently selected from a hydrogen, a substituted C1-80 alkyl group, an unsubstituted C1-80 alkyl group, a substituted C7-80 arylalkyl group and an unsubstituted C7-80 arylalkyl group; and wherein zero to three of R1, R2, R3 and R4 is(are) a hydrogen. Also provided is a method of soldering an electrical contact using the flux composition.Type: GrantFiled: September 30, 2011Date of Patent: May 7, 2013Assignee: Rohm and Haas Electronic Materials LLCInventors: Kim S. Ho, Michael K. Gallagher, Avin V. Dhoble, Mark R. Winkle, Xiang-Qian Liu, David Fleming
-
Patent number: 8434667Abstract: A flux composition is provided, comprising, as initial components: a carboxylic acid; and, a polyamine fluxing agent represented by formula I: with the proviso that when the polyamine fluxing agent represented by formula I is according to formula Ia: then zero to three of R1, R2, R3 and R4 is(are) a hydrogen. Also provided is a method of soldering an electrical contact using the flux composition.Type: GrantFiled: September 30, 2011Date of Patent: May 7, 2013Assignee: Rohm and Haas Electronic Materials LLCInventors: Mark R. Winkle, Avin V. Dhoble, Kim S. Ho, Michael K. Gallagher, Xiang-Qian Liu, David Fleming
-
Patent number: 8430294Abstract: A flux composition is provided, comprising, as initial components: a carboxylic acid; and, an amine fluxing agent represented by formula I: Also provided is a method of soldering an electrical contact using the flux composition.Type: GrantFiled: September 30, 2011Date of Patent: April 30, 2013Assignee: Rohm and Haas Electronic Materials LLCInventors: Kim S. Ho, Mark R. Winkle, Avin V. Dhoble, Michael K. Gallagher, Xiang-Qian Liu, Asghar A. Peera, Glenn N. Robinson, Ian A. Tomlinson, David Fleming
-
Patent number: 8430295Abstract: A curable flux composition is provided, comprising, as initial components: a resin component having at least two oxirane groups per molecule; a carboxylic acid; a fluxing agent represented by formula I: wherein R1, R2, R3 and R4 are independently selected from a hydrogen, a substituted C1-80 alkyl group, an unsubstituted C1-80 alkyl group, a substituted C7-80 arylalkyl group and an unsubstituted C7-80 arylalkyl group; and wherein zero to three of R1, R2, R3 and R4 is(are) a hydrogen; and, optionally, a curing agent. Also provided is a method of soldering an electrical contact using the curable flux composition.Type: GrantFiled: September 30, 2011Date of Patent: April 30, 2013Assignee: Rohm and Haas Electronic Materials LLCInventors: Michael K. Gallagher, Kim S. Ho, Avin V. Dhoble, Mark R. Winkle, Xiang-Qian Liu, David Fleming
-
Patent number: 8430293Abstract: A curable flux composition is provided, comprising, as initial components: a resin component having at least two oxirane groups per molecule; a carboxylic acid; and, an amine fluxing agent represented by formula I: and, optionally, a curing agent. Also provided is a method of soldering an electrical contact using the curable flux composition.Type: GrantFiled: September 30, 2011Date of Patent: April 30, 2013Assignee: Rohm and Haas Electronic Materials LLCInventors: Avin V. Dhoble, Mark R. Winkle, Michael K. Gallagher, Kim S. Ho, Xiang-Qian Liu, Asghar A. Peera, Glenn N. Robinson, Ian A. Tomlinson, David Fleming
-
Patent number: 8424748Abstract: An interconnection technology may use molded solder to define solder balls. A mask layer may be patterned to form cavities and solder paste deposited in the cavities. Upon heating, solder balls are formed. The cavity is defined by spaced walls to keep the solder ball from bridging during a bonding process. In some embodiments, the solder bumps connected to the solder balls may have facing surfaces which are larger than the facing surfaces of the solder ball.Type: GrantFiled: December 21, 2009Date of Patent: April 23, 2013Assignee: Intel CorporationInventor: Chuan Hu
-
Patent number: 8381964Abstract: A Sn—Ag bonding and a method thereof are revealed. By means of a bonding layer formed by tin and silver between wafers, the stress released by diffusion and bonding between tin(Sn) and silver(Ag) is larger than the stress released by diffusion and bonding of conventional gold-silver bonding. Moreover, a Sn—Ag bonding method of the present invention forms Sn—Ag bonding at low temperature and releases more stress so as to reduce thermal stress generated during wafer bonding effectively. And after wafer bonding, the high temperature processes can be performed.Type: GrantFiled: April 16, 2012Date of Patent: February 26, 2013Assignee: National Central UniversityInventors: Cheng-Yi Liu, Ming-Chung Kuo
-
Patent number: 8381966Abstract: A first substrate mounted to a bonder head and a second substrate mounted to a base plate are held at different elevated temperatures at the time of bonding that provide a substantially matched thermal expansion between the second substrate and the first substrate relative to room temperature. Further, the temperature of the solder material portions and the second substrate is raised at least up to the melting temperature after contact. The distance between the first substrate and the second substrate can be modulated to enhance the integrity of solder joints. Once the distance is at an optimum, the bonder head is detached, and the bonded structure is allowed to cool to form a bonded flip chip structure. Alternately, the bonder head can control the cooling rate of solder joints by being attached to the chip during cooling step.Type: GrantFiled: February 28, 2011Date of Patent: February 26, 2013Assignee: International Business Machines CorporationInventors: Rajneesh Kumar, Jae-Woong Nah, Eric D. Perfecto
-
Patent number: 8376207Abstract: A portion of compliant material includes four walls defining a slot. The slot has a relatively large cross-section end in fluid communication with a solder reservoir, and also has a relatively small cross-section end opposed to the relatively large cross-section end. The slot has a generally elongate rectangular shape when viewed in plan, with a length perpendicular to a scan direction, a width, parallel to the scan direction, associated with the relatively large cross section end, and a width, parallel to the scan direction, associated with the relatively small cross section end. The slot is configured in the portion of compliant material such that the relatively small cross-section end of the slot normally remains substantially closed, but locally opens sufficiently to dispense solder from the reservoir when under fluid pressure and locally unsupported by a workpiece. Methods of operation and fabrication are also disclosed.Type: GrantFiled: February 7, 2012Date of Patent: February 19, 2013Assignee: International Business Machines CorporationInventors: Stephen L. Buchwalter, Peter A. Gruber, Paul A. Lauro, Jae-Woong Nah
-
Patent number: 8371497Abstract: A flip chip packaging method to attach a die to a package substrate, the method including dipping the die into solder paste; placing the die onto the package substrate; and reflowing the solder paste to attach the die to the package substrate. Other embodiments are described and claimed.Type: GrantFiled: June 11, 2009Date of Patent: February 12, 2013Assignee: QUALCOMM IncorporatedInventor: Christopher James Healy
-
Patent number: 8347494Abstract: A mounting method for mounting an electronic component on a printed circuit board, the mounting method includes fixing a lower surface of a magnet panel to a magnetic body included in the electronic component by a magnetic force, seizing the electronic component by attracting a part of an upper surface of the magnet panel to an attaching unit, determining a position of the attracting unit to place the electronic component at a predetermined position with respect to the printed circuit board and releasing the attracting unit from the upper surface of the magnet panel.Type: GrantFiled: September 30, 2009Date of Patent: January 8, 2013Assignee: Fujitsu LimitedInventors: Yusaku Fujiishi, Hiroshi Shimamori
-
Publication number: 20130001274Abstract: To improve reliability of a semiconductor device, in a flip-chip bonding step, a solder material that is attached to a tip end surface of a projecting electrode in advance and a solder material that is applied in advance over a terminal (bonding lead) are heated and thereby integrated and electrically connected to each other. The terminal includes a wide part (a first portion) with a first width W1 and a narrow part (a second portion) with a second width W2. When the solder material is heated, the thickness of the solder material arranged over the narrow part becomes smaller than the thickness of the solder material arranged in the wide part. Then, in the flip-chip bonding step, a projecting electrode is arranged over the narrow part and bonded onto the narrow part. Thus, the amount of protrusion of the solder material can be reduced.Type: ApplicationFiled: June 24, 2012Publication date: January 3, 2013Inventors: Jumpei KONNO, Takafumi Nishita, Nobuhiro Kinoshita, Kazunori Hasegawa, Michiaki Sugiyama
-
Publication number: 20120318852Abstract: A method of preventing EMI for a fastening hole in a circuit board includes the steps of providing a circuit board which includes a plurality of fastening holes extending through opposite first and second surfaces thereof and a plurality of solder pads disposed on the second surface, each fastening hole being surrounded by the solder pads; disposing an electronic component on the first surface; positioning the circuit board on a fixture such that the solder pads are not covered by the fixture; and wave soldering the circuit board so that the electronic component is fixed to the circuit board and the solder pads are attached with solder materials.Type: ApplicationFiled: June 15, 2012Publication date: December 20, 2012Inventors: Wen-Bing ZHOU, Youg-Jun LIAO, Qiang WANG, Hung-Che CHEN
-
Patent number: 8333009Abstract: An aligning device for electronic components and a bonding device using the aligning device. The aligning device includes a chamber, a flexible bellows within the chamber, two block used to hold an electronic component, a driving unit configured to move either of the two blocks relative to each other and located in an airtight chamber and an image port having a window through which one of the electronic components can be observed.Type: GrantFiled: June 11, 2008Date of Patent: December 18, 2012Assignee: Murata Manufacturing Co., Ltd.Inventors: Atsuhiko Hirata, Shigeki Fukunaga, Shigeki Yamane, Mitsuhiro Namura, Arata Suzuki, Tomonari Watanabe
-
Publication number: 20120305632Abstract: A method is provided for the forming of a metallic solder joint without a liquid flux to create a solder joint that has minimal voids and can be reflowed multiple times without void propagation. This process can be done for any solder alloy, and is most specifically used in the application of first level thermal interface in a IC or micro processor or BGA microprocessor.Type: ApplicationFiled: May 30, 2012Publication date: December 6, 2012Inventors: Jordan Peter Ross, Amanda M. Hartnett
-
Patent number: 8296939Abstract: Even pressure is applied to a mounting target, even in a case where electronic components having different heights from each other are attempted to be mounted to a substrate, or in a case where an electronic component is attempted to be mounted to a substrate whose rear surface is provided with another electronic component. A mounting device 100 includes a lower pressurizing section 102 as a first pressurizing section and an upper pressurizing section 104 as a second pressurizing section, and pressurizes a substrate, a plurality of electronic components, and the like, sandwiched between the lower pressurizing section 102 and the upper pressurizing section 104, thereby mounting the substrate to the plurality of electronic components. The lower pressurizing section 102 or the upper pressurizing section 104 includes a dilatancy fluid 116.Type: GrantFiled: December 10, 2009Date of Patent: October 30, 2012Assignee: Sony Chemical & Information Device CorporationInventor: Kazutaka Furuta
-
Patent number: 8292159Abstract: Productivity is to be improved in assembling a semiconductor integrated circuit device. A matrix substrate is provided and semiconductor chips are disposed on a first heating stage, then the matrix substrate is disposed above the semiconductor chips on the first heating stage, subsequently the semiconductor chips and the matrix substrate are bonded to each other temporarily by thermocompression bonding while heating the chips directly by the first heating stage, thereafter the temporarily bonded matrix substrate is disposed on a second heating stage adjacent to the first heating stage, and then on the second heating stage the semiconductor chips are thermocompression-bonded to the matrix substrate while being heated directly by the second heating stage.Type: GrantFiled: November 14, 2011Date of Patent: October 23, 2012Assignees: Renesas Eletronics Corporation, Renesas Eastern Japan Semiconductor, Inc.Inventors: Hiroshi Maki, Yukio Tani
-
Patent number: 8286853Abstract: A bonding apparatus includes a thermal treating unit and a bonding unit that are integrally bonded together. The thermal treating unit includes a first thermal treating plate for supporting and thermally processing a superimposed substrate. The bonding unit includes a second thermal treating plate for supporting and thermally processing the superimposed substrate processed in thermal treating unit, and a pressing mechanism for pressing the superimposed substrate against the second thermal treating plate. The first thermal treating plate includes a cooling mechanism for cooling the superimposed substrate placed on the first heating plate. Each unit can depressurize the internal atmosphere to a specified degree of vacuum. The thermal treating unit has a plurality of carrying mechanisms for conveying the wafers between the two units.Type: GrantFiled: October 18, 2011Date of Patent: October 16, 2012Assignee: Tokyo Electron LimitedInventors: Naoki Akiyama, Masahiko Sugiyama, Michikazu Nakamura
-
Publication number: 20120208319Abstract: A method of manufacturing a semiconductor package includes embedding a semiconductor chip in an encapsulant. First contact pads are formed on a first main face of the semiconductor package and second contact pads are formed on a second main face of the semiconductor package opposite the first main face. A diameter d in micrometers of an exposed contact pad area of the second contact pads satisfies d?(8/25)x+142 ?m, where x is a pitch of the second contact pads in micrometers.Type: ApplicationFiled: April 23, 2012Publication date: August 16, 2012Applicant: Infineon Technologies AGInventors: Thorsten Meyer, Rainer Leuschner, Gerald Ofner, Reinhard Hess, Recai Sezi
-
Patent number: 8240545Abstract: Methods for minimizing component shift during soldering are described. One such method includes forming a pedestal pad having a preselected shape on a substrate, forming at least one intervening layer on the substrate, the at least one intervening layer including a layer including a solidifying accelerant, and a layer including a solder, the solder layer having a preselected shape about the same as the preselected shape of the pedestal pad, positioning the component on the at least one intervening layer, and heating the solder to a predetermined process temperature, wherein the pedestal pad is configured to remain a solid during the heating the solder to the predetermined process temperature, and wherein the solidifying accelerant is configured to accelerate a solidification of the solder after the heating the solder to the predetermined process temperature.Type: GrantFiled: August 11, 2011Date of Patent: August 14, 2012Assignee: Western Digital (Fremont), LLCInventors: Lei Wang, Jih-Chiou Hser
-
Publication number: 20120186864Abstract: A wiring board and a method for manufacturing the wiring board reinforced by means of a resin is provided. Embodiments of the wiring board allow for reliable attachment of a connection member, like a socket, to a terminal member. For example, a base of terminal pins is put on pin grid array (PGA) terminal pads, and a bonding material paste including solder and an electric insulation material made of a resin is placed on each of the PGA terminal pads. The bonding material paste is then heated to fuse the solder and soften the electric insulation material. Subsequently, the bonding material paste is cooled to solidify the solder and bond each of the bases to a corresponding PGA terminal pad and form an electric insulation surface layer on an exposed surface of each of solder junctions to which the respective bases are bonded.Type: ApplicationFiled: January 19, 2012Publication date: July 26, 2012Applicant: NGK SPARK PLUG CO., INC.Inventors: Masahiro INOUE, Hajime SAIKI, Atsuhiko SUGIMOTO