Component Terminal To Substrate Surface (i.e., Nonpenetrating Terminal) Patents (Class 228/180.21)
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Publication number: 20120176759Abstract: An electronic device includes a wiring board including a first electrode and a second electrode, a semiconductor device mounted on the wiring board and including a first terminal and a second terminal, an interposer provided between the wiring board and the semiconductor device, the interposer including a conductive pad and a sheet supporting the conductive pad, the conductive pad having a first surface on a side of the wiring board and a second surface on a side of the semiconductor device, a first solder connecting the first electrode positioned outside of an area in which the interposer is disposed with the first terminal positioned outside of the area, a second solder connecting the second electrode positioned inside of the area with the first surface of the conductive pad, and a third solder connecting the second terminal positioned inside of the area with the second surface of the conductive pad.Type: ApplicationFiled: December 20, 2011Publication date: July 12, 2012Applicant: FUJITSU LIMITEDInventors: Teru NAKANISHI, Nobuyuki Hayashi, Masaru Morita, Yasuhiro Yoneda
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Patent number: 8210422Abstract: Electronic assemblies with solder containment brackets are provided. A solder containment bracket may have a planar base and a vertically extending wall. The wall may protrude upwards from the base to form an enclosed region. The base may have a hole that corresponds to the shape of the enclosed region. The wall may have an opening. A wire may be inserted into the opening. The wire may be soldered to the solder containment bracket to form a solder joint that electrically connects the wire to the bracket. The solder joint formed within the enclosed region may have a size that is defined by the bracket wall. The solder containment bracket may be soldered to a solder pad on a printed circuit board by reflowing a layer of solder paste.Type: GrantFiled: September 30, 2009Date of Patent: July 3, 2012Assignee: Apple Inc.Inventor: Stephen P. Zadesky
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Patent number: 8209858Abstract: An arrangement for mounting a multiplicity of components (9, 10), particularly with irregular surface topography, on a support (7) using an assembly tool which has a tool substructure (5) and a tool superstructure (6), where the tool substructure (5) is designed to receive the support and the components which are to be mounted thereon, and the tool superstructure (6) has, in addition to an arrangement (11, 12) for transmitting assembly forces, an arrangement for compensating for tilts between the components and the support and/or an arrangement for compensating for irregular surface topologies.Type: GrantFiled: January 26, 2007Date of Patent: July 3, 2012Assignee: Infineon Technologies AGInventors: Roland Speckels, Karsten Guth
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Patent number: 8210424Abstract: Methods and apparatus are provided for solder bonding entities to solid materials. One or more through apertures are formed in a solid material. Solder paste is introduced into each through aperture. Respective entities having solderable surface features are disposed in overlying alignment with the through apertures. The arrangement is heated causing molten solder paste to wet the solderable surface features and the solid material. Cooling results in the electrical and mechanical bonding of the entities to the solid material. Devices having substantially planar form factors and without lead wires can be electrically and mechanically secured to a supporting conductive stratum.Type: GrantFiled: September 16, 2010Date of Patent: July 3, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventor: Karl S Weibezahn
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Patent number: 8191757Abstract: In the manufacture of products such as printed wiring boards or chip scale packaging and ball grid arrays, incorporating one or more elements selected from among Ni, Co, Cr, Mn, Zr, Fe and Si into a lead-free soldering process to reduce joint embrittlement. In varied embodiments this is accomplished by spraying onto a solder sphere or preform surface, by spraying onto a device substrate surface, or by incorporating into the device substrate alloy.Type: GrantFiled: February 25, 2008Date of Patent: June 5, 2012Assignee: Fry's Metals, Inc.Inventors: Brian G. Lewis, Bawa Singh, John Laughlin, Ranjit Pandher
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Patent number: 8191758Abstract: In one embodiment, a first substrate having first solder bumps and a second substrate having second solder bumps are stacked while temporarily tacking the solder bumps to each other, and then a stack is disposed inside a furnace. The gas in the furnace is exhausted to be in a reduced pressure atmosphere, and then a carboxylic acid gas is introduced into the furnace. While increasing a temperature inside the furnace where the carboxylic acid gas is introduced, the gas in the furnace is exhausted to be in a reduced pressure atmosphere at a temperature in a range from a reduction temperature of oxide films by the carboxylic acid gas to lower than a melting temperature of the solder bumps. By increasing the temperature inside the furnace up to a temperature in a range of the melting temperature of the solder bumps and higher, the first solder bumps and the second solder bumps are melted and joined.Type: GrantFiled: June 15, 2010Date of Patent: June 5, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Kanako Sawada, Hideo Aoki, Naoyuki Komuta, Koji Ogiso
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Patent number: 8186568Abstract: A process for assembling two parts of an integrated electronic circuit has two successive steps. During a first step, the two circuit parts are made into a single unit by molecular bonding, realized on respective application surfaces of the two parts. During a second step, electrical connections are formed from connection portions already present in the application surfaces of the two circuit parts. The connections formed extend across the bonding interface, and are compatible with a high reliability and a high level of integration of the circuit.Type: GrantFiled: February 21, 2008Date of Patent: May 29, 2012Assignee: STMicroelectronics (Crolles 2) SASInventors: Philippe Coronel, Perceval Coudrain, Pascale Mazoyer
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Patent number: 8179690Abstract: A cut-edge positioning type soldering structure and a method for preventing a pin deviation can prevent a plurality of pins of an electronic component from being deviated when the pins are soldered onto a printed circuit board by a solder, and each of at least two solder pads includes at least two cut edges, and the solder pads are installed in an alignment direction on the printed circuit board, such that the cut-edge positioning type soldering structure and the method for preventing a pin deviation can improve the efficiency of manufacturing processes and reduce the manufacturing cost.Type: GrantFiled: July 22, 2010Date of Patent: May 15, 2012Assignee: Askey Computer Corp.Inventors: Hsiang-Chih Ni, Ching-Feng Hsieh
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Patent number: 8178156Abstract: A surface treatment process for a circuit board is provided. The circuit board includes a substrate, a first circuit layer disposed on an upper surface of the substrate, and a second circuit layer disposed on a lower surface of the substrate. The first circuit layer is electrically connected to the second circuit layer. In the surface treatment process for the circuit board, a first oxidation protection layer and a second oxidation protection layer are respectively formed on a portion of the first circuit layer and a portion of the second circuit layer by immersion. Afterwards, the first circuit layer exposed by the first oxidation protection layer is subjected to black oxidation to form a black oxide layer. The thickness of the first oxidation protection layer is thinner than or equal to the thickness of the black oxide layer.Type: GrantFiled: January 12, 2009Date of Patent: May 15, 2012Assignee: Advanced Semiconductor Engineering, Inc.Inventor: Chien-Hao Wang
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Patent number: 8136714Abstract: A portion of compliant material includes four walls defining a slot. The slot has a relatively large cross-section end in fluid communication with a solder reservoir, and also has a relatively small cross-section end opposed to the relatively large cross-section end. The slot has a generally elongate rectangular shape when viewed in plan, with a length perpendicular to a scan direction, a width, parallel to the scan direction, associated with the relatively large cross section end, and a width, parallel to the scan direction, associated with the relatively small cross section end. The slot is configured in the portion of compliant material such that the relatively small cross-section end of the slot normally remains substantially closed, but locally opens sufficiently to dispense solder from the reservoir when under fluid pressure and locally unsupported by a workpiece. Methods of operation and fabrication are also disclosed.Type: GrantFiled: April 18, 2011Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: Stephen L. Buchwalter, Peter A. Gruber, Paul A. Lauro, Jae-Woong Nah
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Patent number: 8117982Abstract: A method and apparatus for the formation of coplanar electrical interconnectors. Solder material is deposited onto a wafer, substrate, or other component of an electrical package using a complaint mold such that the terminal ends of the solder material being deposited, i.e., the ends opposite to those forming an attachment to the wafer, substrate, or other component of an electrical package are coplanar with one another. A complaint mold is used having one or more conduits for receiving solder material and having a compliant side and a planar side. The compliant side of the mold is positioned adjacent to the wafer, substrate, or other component of an electrical package allowing solder material to be deposited onto the surface thereof such that the planar side of the compliant mold provides coplanar interconnectors. An Injection Molded Solder (IMS) head can be used as the means for filling the conduits of the compliant mold of the present invention.Type: GrantFiled: August 20, 2009Date of Patent: February 21, 2012Assignee: International Business Machines CorporationInventors: Peter A. Gruber, John Ulrich Knickerbocker
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Patent number: 8091764Abstract: A practical bonding technique is provided for solid-phase room-temperature bonding which does not require a profile irregularity of the order of several nanometers, in which a high-vacuum energy wave treatment and continuous high-vacuum bonding are not required. Since an adhering substance layer is thin immediately after a surface activating treatment using an energy wave, a bonding interface is spread by crushing the adhering substance layer to perform bonding, so that a new surface appears on a bonding surface, and objects to be bonded are bonded together. In order to crush the adhering substance layer more easily, a bonding metal of a bonding portion of the object to be bonded needs to have a low hardness. According to the results of various experiments conducted by the present inventors, it was found that the hardness of the bonding portion which is a Vickers hardness of 200 Hv or less is particularly effective for room-temperature bonding.Type: GrantFiled: June 21, 2010Date of Patent: January 10, 2012Assignees: Bondtech, Inc.Inventors: Tadatomo Suga, Masuaki Okada
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Patent number: 8087163Abstract: The invention relates to a method for manufacturing a contact arrangement (10) between a microelectronic component (11) and a carrier substrate (12) and to an assembly unit (24) manufactured by this method, whereby thermal energy required in the connecting areas is achieved by exposing the back of the component to laser energy, a mechanical connecting contact (23) is formed between opposing connecting surfaces (17, 18) of the component and the carrier substrate, and at least one electrically conducting connecting contact (22) is formed between terminal faces (13, 15) of the carrier substrate and of the component arranged at an angle to one another by t least partially melting solder material, whereby the assembly unit manufactured by this method has at least one contact arrangement.Type: GrantFiled: November 17, 2006Date of Patent: January 3, 2012Assignee: Pac Tech—Packaging Technologies GmbHInventor: Ghassem Azdasht
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Patent number: 8074868Abstract: Productivity is to be improved in assembling a semiconductor integrated circuit device. A matrix substrate is provided and semiconductor chips are disposed on a first heating stage, then the matrix substrate is disposed above the semiconductor chips on the first heating stage, subsequently the semiconductor chips and the matrix substrate are bonded to each other temporarily by thermocompression bonding while heating the chips directly by the first heating stage, thereafter the temporarily bonded matrix substrate is disposed on a second heating stage adjacent to the first heating stage, and then on the second heating stage the semiconductor chips are thermocompression-bonded to the matrix substrate while being heated directly by the second heating stage.Type: GrantFiled: November 30, 2010Date of Patent: December 13, 2011Assignees: Renesas Electronics Corporation, Renesas Eastern Japan Semiconductor, Inc.Inventors: Hiroshi Maki, Yukio Tani
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Patent number: 8070046Abstract: An amine flux composition is provided, comprising, as an initial component: an amine fluxing agent represented by formula I: wherein R1, R2, R3 and R4 are independently selected from a hydrogen, a substituted C1-80 alkyl group, an unsubstituted C1-80 alkyl group, a substituted C7-80 arylalkyl group and an unsubstituted C7-80 arylalkyl group; wherein R7 and R8 are independently selected from a C1-20 alkyl group, a substituted C1-20 alkyl group, a C6-20 aryl group and a substituted C6-20 aryl group or wherein R7 and R8, together with the carbon to which they are attached, form a C3-20 cycloalkyl ring optionally substituted with a C1-6 alkyl group; wherein R10 and R11 are independently selected from a C1-20 alkyl group, a substituted C1-20 alkyl group, a C6-20 aryl group and a substituted C6-20 aryl group or wherein R10 and R11, together with the carbon to which they are attached, form a C3-20 cycloalkyl ring optionally substituted with a C1-6 alkyl group; and, wherein R9 is selected from a hydrogen, a C1-30Type: GrantFiled: December 2, 2010Date of Patent: December 6, 2011Assignee: Rohm and Haas Electronic Materials LLCInventors: David D. Fleming, Mike K. Gallagher, Kim Sang Ho, Xiang-Qian Liu, Mark R. Winkle, Asghar Akber Peera, Glenn N. Robinson, Ian Tomlinson
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Patent number: 8070044Abstract: A polyamine flux composition is provided, comprising, as an initial component: a polyamine fluxing agent represented by formula I: wherein R1, R2, R3 and R4 are independently selected from a hydrogen, a substituted C1-80 alkyl group, an unsubstituted C1-80 alkyl group, a substituted C7-80 arylalkyl group and an unsubstituted C7-80 arylalkyl group; wherein R7 comprises at least two tertiary carbons and is selected from an unsubstituted C5-80 alkyl group, a substituted C5-80 alkyl group, an unsubstituted C12-80 arylalkyl group and a substituted C12-80 arylalkyl group; and, wherein the two nitrogens shown in formula I are each separately bound to one of the at least two tertiary carbons of R7; with the proviso that when the polyamine fluxing agent of formula I is represented by formula Ia: then zero to three of R1, R2, R3 and R4 is(are) hydrogen. Also provided is a method of soldering an electrical contact using the polyamine flux composition.Type: GrantFiled: December 2, 2010Date of Patent: December 6, 2011Assignee: Rohm and Haas Electronic Materials LLCInventors: David D. Fleming, Mike K. Gallagher, Kim Sang Ho, Xiang-Qian Liu, Mark R. Winkle
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Patent number: 8070043Abstract: A curable flux composition is provided, comprising, as initial components: a resin component having at least two oxirane groups per molecule; a fluxing agent represented by formula I: wherein R1, R2, R3 and R4 are independently selected from a hydrogen, a substituted C1-80 alkyl group, an unsubstituted C1-80 alkyl group, a substituted C7-80 arylalkyl group and an unsubstituted C7-80 arylalkyl group; and wherein zero to three of R1, R2, R3 and R4 is(are) hydrogen; and, optionally, a curing agent. Also provided is a method of soldering an electrical contact using the curable flux composition.Type: GrantFiled: December 2, 2010Date of Patent: December 6, 2011Assignee: Rohm and Haas Electronic Materials LLCInventors: David D. Fleming, Mike K. Gallagher, Kim Sang Ho, Xiang-Qian Liu, Mark R. Winkle
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Patent number: 8070045Abstract: A curable amine flux composition is provided, comprising, as initial components: a resin component having at least two oxirane groups per molecule; an amine fluxing agent represented by formula I: wherein R1, R2, R3 and R4 are independently selected from a hydrogen, a substituted C1-80 alkyl group, an unsubstituted C1-80 alkyl group, a substituted C7-80 arylalkyl group and an unsubstituted C7-80 arylalkyl group; wherein R7 and R8 are independently selected from a C1-20 alkyl group, a substituted C1-20 alkyl group, a C6-20 aryl group and a substituted C6-20 aryl group or wherein R7 and R8, together with the carbon to which they are attached, form a C3-20 cycloalkyl ring optionally substituted with a C1-6 alkyl group; wherein R10 and R11 are independently selected from a C1-20 alkyl group, a substituted C1-20 alkyl group, a C6-20 aryl group and a substituted C6-20 aryl group or wherein R10 and R11, together with the carbon to which they are attached, form a C3-20 cycloalkyl ring optionally substituted withType: GrantFiled: December 2, 2010Date of Patent: December 6, 2011Assignee: Rohm and Haas Electronic Materials LLCInventors: David D. Fleming, Mike K. Gallagher, Kim Sang Ho, Xiang-Qian Liu, Mark R. Winkle, Asghar Akber Peera, Glenn N. Robinson, Ian Tomlinson
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Patent number: 8070047Abstract: A flux composition is provided, comprising, as an initial component: a fluxing agent represented by formula I: wherein R1, R2, R3 and R4 are independently selected from a hydrogen, a substituted C1-80 alkyl group, an unsubstituted C1-80 alkyl group, a substituted C7-80 arylalkyl group and an unsubstituted C7-80 arylalkyl group; and wherein zero to three of R1, R2, R3 and R4 is(are) hydrogen. Also provided is a method of soldering an electrical contact using the flux composition.Type: GrantFiled: December 2, 2010Date of Patent: December 6, 2011Assignee: Rohm and Haas Electronic Materials LLCInventors: David D. Fleming, Mike K. Gallagher, Kim Sang Ho, Xiang-Qian Liu, Mark R. Winkle
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Publication number: 20110272452Abstract: An apparatus for dispensing solder onto a substrate for mounting a semiconductor chip on the substrate comprises a dispensing body and first and second dispensing channels extending through the dispensing body. Each dispensing channel is operative to receive a separate solder wire to feed the solder wire to an end of the dispensing body facing the substrate. The dispensing channels are further operative to introduce the solder wires in a solid state simultaneously from the end of the dispensing body to be melted upon contact with the substrate which is heated.Type: ApplicationFiled: May 4, 2010Publication date: November 10, 2011Inventors: Kui Kam Lam, Pingliang Tu, Chun Hung Samuel Ip
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Patent number: 8046911Abstract: A method for mounting an electronic component on a substrate includes: forming an Au bump (24) on a surface of an electrode (20) of a substrate (10); placing an Sn-based solder sheet (26) on the Au bump; subjecting the Sn-based solder sheet and the Au bump to reflow soldering, to thus form an Au—Sn eutectic alloy (28); smoothing the eutectic alloy; and bonding an electronic component (30) on a surface of the smoothed eutectic alloy.Type: GrantFiled: October 25, 2007Date of Patent: November 1, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventor: Kei Murayama
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Patent number: 8047421Abstract: An arrangement for the equipping of electronic packages with elliptical C4 connects possessing optimal orientation for enhanced reliability. Furthermore, disclosed is a method providing elliptical C4 connects which possesses optimal orientation for enhanced reliability, as implemented in connection with their installation in electronic packages. Employed are essentially elliptical solder pads or elliptical C4 pad configurations at various preferably corner locations on a semiconductor chip.Type: GrantFiled: August 26, 2010Date of Patent: November 1, 2011Assignee: International Business Machines CoporationInventors: Sri M. Sri-Jayantha, Lorenzo Valdevit
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Patent number: 8042724Abstract: A method is provided for making an electrical connection with a microelectronic component arranged on or embedded within a surface of a circuit board layer or a substrate. The microelectronic component has an electrical contact face that is accessible on a surface of the microelectronic component. An electrically conducting bump is applied to the electrical contact face of the microelectronic component. A metal foil or metal coat is applied via a coating of an insulating binder to the surface of the circuit board under an action of pressure and/or heat so that the electrically conducting bump penetrates the coating of the insulating binder to make the electrical connection between the metal foil or metal coat and the electrical contact face.Type: GrantFiled: August 6, 2007Date of Patent: October 25, 2011Assignees: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V., Technische Universitaet BerlinInventors: Andreas Ostmann, Alexander Neumann, Dionysios Manessis, Rainer Patzelt
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Patent number: 8028403Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates then may be pressed together to mechanically bond the two or more substrates via the adhesive films. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.Type: GrantFiled: February 13, 2009Date of Patent: October 4, 2011Assignee: General Dynamics Advanced Information Systems, Inc.Inventors: Deepak K. Pai, Ronald R. Denny
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Patent number: 8011561Abstract: A method of mounting electronic components on a PCB, includes following steps. The PCB is placed with a first side of the PCB facing upwards. A plurality of solder is applied on bonding pads of the first side. A plurality of electronic components is stuck on the bonding pads of the first side. The PCB is turned over with a second side of the PCB facing upwards and the first side of the PCB facing downwards. A plurality of solder is applied on bonding pads of the second side. A plurality of electronic components is stuck on the bonding pads of the second side. The PCB is placed in a reflow oven to weld the electronic components on the first side and the second side of the PCB.Type: GrantFiled: April 2, 2010Date of Patent: September 6, 2011Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Ji Ma, Li-Bing Lu, Hui Luo, Qi Huang
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Patent number: 8001683Abstract: This invention provides a solder ball loading apparatus which enables fine solder balls to be loaded on pads while void is blocked from being caught into bump upon reflow. Inactive gas is supplied and the inactive gas is sucked from a loading cylinder located above a ball arrangement mask so as to gather solder balls. The gathered solder balls are rolled on the ball arrangement mask by moving the loading cylinder horizontally and the solder balls are dropped onto connecting pads on a multilayer printed wiring board through openings in the ball arrangement mask. Oxidation of the solder balls and mixture of voids upon reflow are prevented by loading the solder balls in the atmosphere of inactive gas.Type: GrantFiled: January 31, 2008Date of Patent: August 23, 2011Assignee: Ibiden Co., Ltd.Inventors: Yoichiro Kawamura, Katsuhiko Tanno
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Patent number: 7995353Abstract: A circuit board includes four positioning pads placed on a surface of the circuit board, four positioning holes corresponding to the positioning pads, respectively, and a solder mask placed on the surface around the periphery of the positioning pads. An arc-shaped recess is defined at a side of each positioning pad near the corresponding positioning hole and the space between the edges of the positioning pad and the positioning hole ranges from 0.2 mm to 0.5 mm.Type: GrantFiled: August 12, 2008Date of Patent: August 9, 2011Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Chang-Te Liao
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Publication number: 20110180311Abstract: A solder material with favorable mechanical properties and high corrosion resistance is provided. The solder material is not apt to be melted in a re-heating process after the soldering process is performed. The solder material includes first solder powder, Cu powder, and a flux. The first solder powder contains Cu, Si, Ti, and Sn. Here, Cu accounts for 7 wt %˜9 wt %, Si accounts for 0.001 wt %˜0.05 wt %, Ti accounts for 0.001 wt %˜0.05 wt %, and the rest is Sn. The Cu powder is coated by Ag. The flux is mixed with the first solder powder and the Cu powder.Type: ApplicationFiled: January 19, 2011Publication date: July 28, 2011Applicant: NIHON DEMPA KOGYO CO., LTD.Inventors: TOSHIMASA TSUDA, MITSUO HORI
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Patent number: 7980446Abstract: A portion of compliant material includes four walls defining a slot. The slot has a relatively large cross-section end in fluid communication with a solder reservoir, and also has a relatively small cross-section end opposed to the relatively large cross-section end. The slot has a generally elongate rectangular shape when viewed in plan, with a length perpendicular to a scan direction, a width, parallel to the scan direction, associated with the relatively large cross section end, and a width, parallel to the scan direction, associated with the relatively small cross section end. The slot is configured in the portion of compliant material such that the relatively small cross-section end of the slot normally remains substantially closed, but locally opens sufficiently to dispense solder from the reservoir when under fluid pressure and locally unsupported by a workpiece. Methods of operation and fabrication are also disclosed.Type: GrantFiled: March 6, 2009Date of Patent: July 19, 2011Assignee: International Businss Machines CorporationInventors: Stephen L. Buchwalter, Peter A. Gruber, Paul A. Lauro, Jae-Woong Nah
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Patent number: 7967184Abstract: A semiconductor package having a low profile is disclosed. In embodiments, a surface mounted component may be mounted directly to the core of the semiconductor package substrate, so that there is no conductive layer, plating layers or solder paste between the component and the substrate core. The surface mounted component may be any type of component which may be surface mounted on a substrate according to an SMT process, including for example passive components and various packaged semiconductors.Type: GrantFiled: November 16, 2005Date of Patent: June 28, 2011Assignee: SanDisk CorporationInventors: Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Chin-Tien Chiu, Jack Chang Chien, Shrikar Bhagath, Cheemen Yu, Hem Takiar
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Patent number: 7958628Abstract: A vacuum bonding tool method for pick-and-place and bonding semiconductor chips onto a substrate or onto a previously mounted die to form a die stack includes a shank and a suction part. The shank has a vacuum conduit extending from a first end to a second end of the shank. The shank is adapted for cooperative engagement with the suction part at the second end, and the shank has a plate at the second end to support the suction part. The suction part has a surface for contacting a semiconductor chip during pick-and place operation. According to the invention, the suction part is made of an elastically deformable conductive or non-conductive material. In various embodiments, the chip contacting surface of the elastically deformable suction part flat overall, or is concave, of has a flat central region and concave regions.Type: GrantFiled: December 10, 2009Date of Patent: June 14, 2011Assignee: STATS ChipPAC, Ltd.Inventors: Hee-Bong Lee, Hyun-Joon Oh
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Publication number: 20110132451Abstract: A soldered connection between an outer surface of a semiconductor device, connected to a substrate by means of an adhesive layer, and a connector in the form of a strip. In order that tensile forces acting on the connector do not cause the semiconductor device to become detached from the substrate or the adhesive layer, it is proposed that a supporting location extends from the outer surface of the semiconductor device, which supporting location is formed of solderable material and makes contact with the outer surface by way of a contact surface A, in or on which the connector is soldered while maintaining a distance a from the outer surface where a?10?; and/or that the distance b between the edge of the contact surface between the supporting surface and the outer surface and the entry of the connector into the supporting location or the beginning of contact therebetween is b?50?.Type: ApplicationFiled: July 16, 2009Publication date: June 9, 2011Applicant: SCHOTT SOLAR AGInventors: Hilmar Von Campe, Bernd Meidel, Georg Gries, Christoph Will, Jurgen Rossa
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Patent number: 7954690Abstract: An inkjet print head for which an ink flow path formation member, arranged on a printing element board, is prevented from being peeled off or being damaged, and the printing element board in an appropriate state can be mounted on a support member. According to the present invention, an ink flow path formation member is arranged on one face of a printing element board, and a peripheral area extending outward from the ink flow path formation member is prepared. Since pressure is applied to the peripheral area using a mounting tool, to bond the first terminals of the printing element board to the electrode terminals of the support member, damage to the ink flow path formation member, caused by the mounting tool, can be prevented.Type: GrantFiled: June 10, 2008Date of Patent: June 7, 2011Assignee: Canon Kabushiki KaishaInventors: Osamu Sato, Shuzo Iwanaga
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Publication number: 20110127080Abstract: The present invention provides an electronic assembly 400 and a method for its manufacture 800, 900, 1000 1200, 1400, 1500, 1700. The assembly 400 uses no solder. Components 406, or component packages 402, 802, 804, 806 with I/O leads 412 are placed 800 onto a planar substrate 808. The assembly is encapsulated 900 with electrically insulating material 908 with vias 420, 1002 formed or drilled 1000 through the substrate 808 to the components' leads 412. Then the assembly is plated 1200 and the encapsulation and drilling process 1500 repeated to build up desired layers 422, 1502, 1702.Type: ApplicationFiled: February 2, 2011Publication date: June 2, 2011Applicant: OCCAM PORTFOLIO LLCInventor: Joseph C. Fjelstad
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Publication number: 20110121059Abstract: An electrical bond connection system between a first electrical contact surface and a second electrical contact surface having at least one first electrical conductor, which is bonded to at least one of the contact surfaces via at least one first bond connection. At least one additional second electrical conductor (9) is bonded to the first electrical conductor (8) via at least one second bond connection (10, 13), the two bond connections (10) being offset from one another. The present invention also relates to a method for manufacturing an electrical bond connection system existing between a first electrical contact surface and a second electrical contact surface.Type: ApplicationFiled: April 3, 2009Publication date: May 26, 2011Inventors: Manfred Reinold, Immanuel Mueller
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Patent number: 7943844Abstract: A thermoelectric module and method of manufacture thereof, capable of preventing short-circuits between electrodes due to solder without causing increases in size or cost. A thermoelectric module is configured with lower electrodes formed on the inside surface of a lower substrate, placed in opposition to an upper substrate, on the inside surface of which are formed upper electrodes; the end faces of thermoelectric elements are soldered to the lower electrodes and upper electrodes. Each of the electrodes is configured from three layers, which are a copper layer, a nickel layer formed on one face of the copper layer, and a gold layer formed on one face of the nickel layer; a visor portion, protruding outward, is formed in the nickel layer, so that when positioning the thermoelectric elements above the electrodes and soldering the electrodes to the thermoelectric elements, the flowing of solder 18a from the side portions of electrodes to the insulating substrate is prevented.Type: GrantFiled: February 10, 2006Date of Patent: May 17, 2011Assignee: Yamaha CorporationInventor: Hidetoshi Yasutake
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Patent number: 7934632Abstract: An apparatus for manufacturing a semiconductor package includes an index rail transferring a lead frame in forward and backward directions, the lead frame having a first surface and a second surface that is opposite to the first surface, a loader portion connected to an end portion of the index rail and supplying the lead frame to the index rail, a frame driving portion connected to the opposite end portion of the end portion of the index rail and rotating the lead frame around a normal to the first surface, and a wire bonding portion electrically connecting the lead frame and a semiconductor chip attached to the lead frame supplied to the index rail using a wire bond.Type: GrantFiled: February 26, 2009Date of Patent: May 3, 2011Assignee: STS Semiconductor & Telecommunications Co., Ltd.Inventor: Sun Ha Hwang
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Patent number: 7926696Abstract: A composition for controlling a temperature elevation of an electronic component when soldering the electronic component on a substrate, includes a first resin for providing the composition with adhesion to the electronic component, a curing agent for curing the first resin by heat treatment for soldering, and a second resin for facilitating removal of the composition from the electronic component.Type: GrantFiled: July 6, 2010Date of Patent: April 19, 2011Assignee: Fujitsu LimitedInventor: Seiki Sakuyama
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Patent number: 7920936Abstract: A three dimensional object creation system for printing a three dimensional object comprised of layers stacked vertically with respect to each other includes a series of printheads for printing the layers, the series of printheads simultaneously printing at least two layers of different vertical positions within the stack; and a semiconductor memory for storing data defining at least one layer. The series of printheads are arranged in groups of one or more printheads per group, each group being fixedly positioned downstream of a preceding group with respect to the three dimensional object. Each group of printheads is adapted to print a layer at a predetermined vertical position within the stack.Type: GrantFiled: March 9, 2010Date of Patent: April 5, 2011Assignee: Silverbrook Research Pty LtdInventor: Kia Silverbrook
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Patent number: 7909666Abstract: There are provided the steps of preparing a contact (10, 20), which is formed from a metallic sheet including a base portion (11, 21), an elastic deformation portion (12, 22), and a contact portion (13, 23), and in which a recess (15, 25) is formed on a bottom surface of the base portion and a plurality of through-holes (16, 26, 27) are formed to be arranged above the recess and in parallel to the bottom surface of the base portion to extend through the base portion, and holding solder on the through-holes formed on the contact. A desired, solder-attached contact (10a, 20a) is fabricated by the manufacturing method. Further, the solder is a solder ball (90) and the step of holding solder includes the step of preparing the solder ball and the step of press fitting the solder ball into the through-hole.Type: GrantFiled: October 30, 2007Date of Patent: March 22, 2011Assignee: Yamaichi Electronics Co., Ltd.Inventor: Yuji Nakamura
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Patent number: 7900349Abstract: An electronic device with a reworkable electronic component, a method of manufacturing the electronic device, and a method of reworking the electronic component are disclosed. The electronic device includes a first cavity provided in a board body. A first metal pattern is provided on the board body and adjacent to the first cavity. A first electronic component is provided in the first cavity. A first connection pattern is provided adjacent to an upper edge portion of the first electronic component and extends to the first metal pattern so that the first metal pattern is electrically connected to the first electronic component.Type: GrantFiled: December 4, 2007Date of Patent: March 8, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Seong-Chan Han, Dong-Woo Shin, Young-Soo Lee, Hyo-Jae Bang, Hun Han
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Patent number: 7861912Abstract: Productivity is to be improved in assembling a semiconductor integrated circuit device. A matrix substrate is provided and semiconductor chips are disposed on a first heating stage, then the matrix substrate is disposed above the semiconductor chips on the first heating stage, subsequently the semiconductor chips and the matrix substrate are bonded to each other temporarily by thermocompression bonding while heating the chips directly by the first heating stage, thereafter the temporarily bonded matrix substrate is disposed on a second heating stage adjacent to the first heating stage, and then on the second heating stage the semiconductor chips are thermocompression-bonded to the matrix substrate while being heated directly by the second heating stage.Type: GrantFiled: July 14, 2010Date of Patent: January 4, 2011Assignee: Renesas Electronics CorporationInventors: Hiroshi Maki, Yukio Tani
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Patent number: 7854365Abstract: A method is provided for bonding a die comprising a solder layer which has a melting point Tm. A bond head is heated to a bond head setting temperature T1, which is higher than Tm, and a substrate is heated to a substrate setting temperature T2, which is lower than Tm. The bond head then picks up the die and heats the die towards temperature T1 so as to melt the solder layer. The solder layer of the die is pressed onto the substrate so as to bond the die to the substrate, and thereafter the bond head is separated from the die so that the solder layer is cooled towards T2 and solidifies.Type: GrantFiled: October 27, 2008Date of Patent: December 21, 2010Assignee: ASM Assembly Automation LtdInventors: Ming Li, Ying Ding, Ping Liang Tu, King Ming Lo, Kwok Kee Chung
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Patent number: 7845074Abstract: The method for manufacturing an electronic parts module includes an adhesive layer forming process forming an adhesive layer including solder particles on the circuit forming surface in range covering at least the first land part and the second land part; a passive element mounting process positioning a terminal of the passive element on the first land part and sticking the passive element to the base wiring layer through the adhesive layer; an active element mounting process, after the passive element mounting process, positioning a terminal of the active element on the second land part and sticking the active element to the base wiring layer through the adhesive layer; a pressing process solidifying the adhesive layer and melting the solder particles by laminating and thermally pressing a thermosetting sheet onto the circuit forming surface so as to form the resin sealing layer.Type: GrantFiled: April 15, 2009Date of Patent: December 7, 2010Assignee: Panasonic CorporationInventors: Koji Motomura, Hideki Eifuku, Tadahiko Sakai
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Patent number: 7845543Abstract: An apparatus for bonding dice onto one or more substrates placed on a base comprises a first bond head and a second bond head. Each bond head incorporates a bonding tool which is configured for holding a die and both bond heads are driven by at least one linear motion actuator towards the substrate. The first and second bond heads are mounted on a stand and each comprises a locking mechanism which is operative to lock the bond head to the stand, and a compliant mechanism that is actuable to exert a bonding force on the bonding tool to bond each die to the substrate after the bond head has been locked to the stand.Type: GrantFiled: November 17, 2009Date of Patent: December 7, 2010Assignee: ASM Assembly Automation LtdInventors: Chung Sheung Yung, Ping Kong Choy, Hon Yu Ng
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Patent number: 7841508Abstract: A method providing elliptical C4 connects which possesses optimal orientation for enhanced reliability, as implemented in connection with their installation in electronic packages. Employed are essentially elliptical solder pads or elliptical C4 pad configurations at various preferably corner locations on a semiconductor chip.Type: GrantFiled: March 5, 2007Date of Patent: November 30, 2010Assignee: International Business Machines CorporationInventors: Sri M. Sri-Jayantha, Lorenzo Valdevit
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Patent number: 7841081Abstract: The manufacturing method for an electronic parts module includes forming an adhesive layer including solder particles on the circuit forming surface in range covering at least the first and the second land parts, positioning a terminal of the active element on the second land part, sticking the active element to the base wiring layer through the adhesive layer by heating and pressing the active element onto the base wiring layer with a thermally pressing tool, and releasing the heating and pressing with the thermally pressing tool while the adhesive layer is semi-solidified, thereafter positioning a terminal of the passive element on the first land part and sticking the passive element to the base wiring layer through the adhesive layer, and solidifying the adhesive layer and melting the solder particles by laminating and thermally pressing a thermosetting sheet onto the circuit forming surface to form the resin sealing layer.Type: GrantFiled: April 15, 2009Date of Patent: November 30, 2010Assignee: Panasonic CorporationInventors: Koji Motomura, Hideki Eifuku, Tadahiko Sakai
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Patent number: 7837301Abstract: When the driving printed wires from the drive IC are passed between the terminal lands and connected to respective terminal lands, and the printed wires of a number greater than the number of printed wires that can be passed between the terminal lands are required, the driving printed wires from the drive IC are led on the outer side of the columns of the plurality of terminal lands and connected to respective terminal lands.Type: GrantFiled: June 28, 2006Date of Patent: November 23, 2010Assignee: Brother Kogyo Kabushiki KaishaInventor: Tomoyuki Kubo
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Patent number: 7832618Abstract: Disclosed are methodologies for producing lead type electrical components. Components are placed in a lead frame with termination paste applied to selected portions of the component. Upon firing of the assembled lead frame and electrical components, the electrical components are concurrently terminated, and provided with strongly secured leads.Type: GrantFiled: January 10, 2008Date of Patent: November 16, 2010Assignee: AVX CorporationInventors: John L. Galvagni, Thomas J. Brown
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Patent number: 7810701Abstract: A connection electrode that is formed of solder on an electronic component side and a tip portion of an elastic contact each other at a contact portion. Regarding the elastic contact, a resistive layer is formed in the tip portion, and the tip portion is placed in a clearance of an induction coil. When a predetermined high-frequency current is passed through the induction coil, electromagnetic induction causes the resistive layer to generate heat. Solder that forms the connection electrode is melt, and flows onto the tip portion of the elastic contact. Thus, the tip portion of the elastic contact and the connection electrode can be strongly bonded together at the contact portion that is a single point therebetween.Type: GrantFiled: March 25, 2009Date of Patent: October 12, 2010Assignee: Alps Electric Co., Ltd.Inventors: Shinichi Nagano, Shin Yoshida