With Light Activation Patents (Class 257/113)
  • Patent number: 7705367
    Abstract: A pinned photodiode sensor with gate-controlled SCR switch includes a pinned photodiode and a gate-controlled SCR switch. The SCR switch includes a P-type substrate, an N? doped region, and an N+ doped region formed on the substrate; a P+ doped region formed on the N? doped region; an oxide layer formed on the P substrate, the N? doped region, the N+ doped region, and the P+ doped region; and a gate formed above the P substrate and the N? doped region. The gate includes a P+ doped region and an N+ doped region. During an exposure procedure, a depletion region will not reach the interface between the oxide layer and the substrate, thereby preventing dark current leakage.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: April 27, 2010
    Assignee: PixArt Imaging Inc.
    Inventors: Chien-Chang Huang, Chih-Cheng Hsieh, Ching-Wei Chen
  • Patent number: 7693360
    Abstract: On the back surface of a transparent plate having a light extracting part for outputting lights to the outside, an electrode for wiring, and an electrode for an electromagnetic shield, an optical device is flip-chip mounted right under the light extracting part, an a driver IC is flip-chip mounted at a desired position with metal bumps. When currents driving the optical device flow from the driver IC according to an electric logical signal from the outside, an optical signal is emitted from the optical device, and is output to the outside through the light extracting part. The light extracting part may be provided with a light coupling material or an optical axis converter.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: April 6, 2010
    Assignee: NEC Corporation
    Inventors: Takanori Shimizu, Takara Sugimoto, Jun-ichi Sasaki, Kazuhiko Kurata
  • Publication number: 20100078673
    Abstract: A semiconductor component in which the active junctions extend perpendicularly to the surface of a semiconductor chip substantially across the entire thickness thereof. The contacts with the regions to be connected are provided by conductive fingers substantially crossing the entire region with which a contact is desired to be established.
    Type: Application
    Filed: December 7, 2009
    Publication date: April 1, 2010
    Applicant: STMicroelectronics S.A.
    Inventor: Jean-Luc Morand
  • Patent number: 7687875
    Abstract: An image sensor includes a semiconductor layer, and first and second photoelectric converting units including first and second impurity regions in the semiconductor layer that are spaced apart from each other and that are at about an equal depth in the semiconductor layer, each of the impurity regions including an upper region and a lower region. A width of the lower region of the first impurity region may be larger than a width of the lower region of the second impurity region, and widths of upper regions of the first and second impurity regions are equal.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: March 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yun-ki Lee
  • Patent number: 7626193
    Abstract: A single-photon detector is disclosed that provides reduced afterpulsing without some of the disadvantages for doing so in the prior art. An embodiment of the present invention provides a stimulus pulse to the active area of an avalanche photodetector to stimulate charges that are trapped in energy trap states to detrap. In some embodiments of the present invention, the stimulus pulse is a thermal pulse.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: December 1, 2009
    Assignee: Princeton Lightwave, Inc.
    Inventors: Mark Allen Itzler, Rafael Ben-Michael, Sabbir Sajjad Rangwala
  • Patent number: 7605440
    Abstract: A pixel having a well-isolated charge storage region or floating diffusion region may be obtained by providing a separate P-well around the storage region or floating diffusion region. In one embodiment, a separate P-well entirely encases the storage region and is in contact with the storage region. This P-well provides an electrical barrier for preventing electrons that are generated elsewhere in the pixel from contaminating the storage region. In another embodiment, a first separate P-well encases and is in contact with the storage region and a second separate P-well encases and is in contact with the floating diffusion region.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: October 20, 2009
    Assignee: Aptina Imaging Corporation
    Inventor: Parker Altice
  • Patent number: 7592654
    Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: September 22, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: Sandeep R. Bahl, Fredrick P. LaMaster, David W. Bigelow
  • Patent number: 7582917
    Abstract: A monolithically integrated light-activated thyristor in an n-p-n-p-n-p sequence consists of a four-layered thyristor structure and an embedded back-biased PN junction structure as a turn-off switching diode. The turn-off switching diode is formed through structured doping processes and/or depositions on a single semiconductor wafer so that it is integrated monolithically without any external device or semiconductor materials. The thyristor can be switching on and off optically by two discrete light beams illuminated on separated openings of electrodes on the top surface of a semiconductor body. The carrier injection of the turning on process is achieved by illuminating the bulk of the thyristor with a high level light through the first aperture over the cathode to create high density charge carriers serving as the gate current injection and to electrically short the emitter and drift layer.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: September 1, 2009
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventor: Yeuan-Ming Sheu
  • Patent number: 7554170
    Abstract: A photosensor includes a plurality of photosensitive regions including a first photosensitive region connected to a first voltage reference, and at least one additional photosensitive region. A signal collector is connected to the first photosensitive region. At least one switching device is for switching the at least one additional photosensitive region between the first voltage reference and a second voltage reference that is less than the first voltage reference, and for reversibly connecting the at least one additional photosensitive region to the signal collector so that the photosensor is variably responsive to different light levels.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: June 30, 2009
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Jeffrey Raynor
  • Patent number: 7525131
    Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: April 28, 2009
    Assignees: National University Corporation Shizuoka University, Hamamatsu Photonics K.K.
    Inventors: Masatomo Sumiya, Shunro Fuke, Tokuaki Nihashi, Minoru Hagino
  • Patent number: 7492988
    Abstract: Planar AWG circuits and systems are disclosed that use air trench bends to increase planar circuit compactness.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: February 17, 2009
    Inventors: Gregory P. Nordin, Yongbin Lin, Seunghyun Kim
  • Patent number: 7423298
    Abstract: Two operation channels CH1 and CH2 of a bidirectional photothyristor chip 31 are disposed away from each other so as not to intersect with each other. In between a P-gate diffusion region 23 on the left-hand side and a P-gate diffusion region 23? on the right-hand side on an N-type silicon substrate, and in between the CH1 and the CH2, a channel isolation region 29 comprised of an oxygen doped semi-insulating polycrystalline silicon film 35a doped with phosphorus is formed. Consequently, a silicon interface state (Qss) in the vicinity of the channel isolation region 29 on the surface of the N-type silicon substrate increases, so that holes or minority carriers in the N-type silicon substrate are made to disappear in the region. This makes it possible to prevent such commutation failure that when a voltage of the inverted phase is applied to the CH2 side at the point of time when the CH1 is turned off, the CH2 is turned on without incidence of light, and this allows a commutation characteristic to be enhanced.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: September 9, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuru Mariyama, Satoshi Nakajima
  • Patent number: 7397066
    Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: July 8, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Steven D. Oliver
  • Patent number: 7397067
    Abstract: Some embodiments provide a microdisplay integrated circuit (IC), a substantially transparent protective cover coupled to the microdisplay IC, and a base coupled to the microdisplay IC. Thermal expansion characteristics of the base may be substantially similar to thermal expansion characteristics of the protective cover. According to some embodiments, at least one set of imaging elements is fabricated on an upper surface of a semiconductor substrate, and a base is affixed to a lower surface of the semiconductor substrate to generate substantially negligible mechanical stress between the semiconductor substrate and the base.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: July 8, 2008
    Assignee: Intel Corporation
    Inventors: Michael O'Connor, Thomas W. Springett, Paul C. Ward-Dolkas
  • Patent number: 7378687
    Abstract: In order to provide a photothyristor having high breakdown voltage and less-varying light sensitivity by improving the sensitivity and the breakdown voltage of the device while maintaining the device small, the device includes a silicon substrate, a transistor portion including an anode region, a gate region and a cathode region and placed on a first main surface of the silicon substrate, a light-receiving portion for receiving light from the outside, and an electrode for establishing an ohmic contact between the anode region and the cathode region. The light receiving portion includes an oxygen-doped polysilicon film overlaid on the silicon substrate through a transparent insulating film and is disposed to surround the transistor portion. The electrode is placed above the transistor portion and has a double-structure consisting of a center portion and an outer portion surrounding the center portion, and the center portion and the outer portion are electrically connected.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Satoshi Nakajima, Seigo Okada
  • Patent number: 7339204
    Abstract: A contact is formed within an active region of a substrate at the edge of a die, preferably within the first metallization level in the active region of the substrate. An opening having sloped sidewalls is then etched into the back side of the substrate, exposing a portion of the active region contact. An interconnect is formed on the opening sidewall to connect the active region contact with a die contact pad on the backside surface of the substrate. The active region contact preferably spans a boundary between two die, with the opening preferably etched across the boundary to permit inter-connects on opposing sidewalls of the opening to each contact the active region contact within different die, connecting the active region contact to die contact pads on different dice. The dice are then separated along the boundary, through the active region contact which becomes two separate active region contacts.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: March 4, 2008
    Assignee: STMicroelectronics, Inc.
    Inventor: Danielle A. Thomas
  • Patent number: 7329942
    Abstract: An array-type modularized light-emitting diode structure and a method for packaging the structure. The array-type modularized light-emitting diode structure includes a lower substrate and an upper substrate fixed on the lower substrate. A material with high heat conductivity is selected as the material of the upper substrate. The upper substrate is formed with multiple arrayed dents and through holes on the bottom of each dent. A material with high heat conductivity is selected as the material of the lower substrate. The surface of the lower substrate is formed with a predetermined circuit layout card. The bottom face of the upper substrate is placed on the upper face of the lower substrate with the through holes of the dents respectively corresponding to the contact electrodes of the circuit layout card of the lower substrate. Multiple light-emitting diode crystallites are respectively fixed on the bottoms of the dents.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: February 12, 2008
    Inventors: Ching-Fu Tsou, I-Ju Chen, Yeh-Chin Chao
  • Patent number: 7320930
    Abstract: Wafer scale and substrate processing device singulation methods, and devices made by the methods, for singulation of discrete devices from a processed wafer or laminated structures, involves formation of separation scribes or saw cuts at multiple elevations in intersecting scribe streets or lines so that a separation cut in one direction is at a different depth than a separation cut in a different and intersecting direction. Separation or fracture of the wafer or laminated structure along one of the separation cuts does not transfer to the separation line of the intersecting separation cut due to the difference in depth of the intersecting cuts or scribes, and due to the difference in elevation of the bottom surfaces of the cuts or scribes within the scribe streets, resulting in cleaner edges on the separated devices.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: January 22, 2008
    Assignee: HANA Microdisplay Technologies, Inc.
    Inventor: Dean Eshleman
  • Patent number: 7238968
    Abstract: The present invention presents a semiconductor device (10) which is adapted to a solar cell, and in which a semiconductor element (1) is produced by forming one flat surface (2) on a spherical or substantially spherical silicon single crystal (1a, 1b). A diffusion layer (3) and a substantially spherical pn junction (4) are formed on this semiconductor element (1), and a diffusion-mask thin film (5) and a positive electrode (6a) are formed on the flat surface (2). A negative electrode 6b is formed at the apex on the opposite side to the positive electrode (6a), and an antireflection film (7) is formed on the surface side of the diffusion layer (3).
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: July 3, 2007
    Inventor: Josuke Nakata
  • Patent number: 7224002
    Abstract: Disclosed herein is an improved thyristor-based memory cell. In one embodiment, the cell is formed in a floating substrate using Silicon-On-Insulator (SOI) technology. The cell preferably incorporates a lateral thyristor formed entirely in the floating substrate, and which is gated by a second word line. The cathode of the thyristor also comprises a source of an access transistor, whose drain is connected to the bit line of the device, and which is gated by a first word line. A trapping layer is built into the floating substrate, and when writing to the cell, pulses are added to cause holes to be trapped on the trapping layer for a logic state ‘1’ and to cause electrons to be trapped on the trapping layer for a logic state ‘0.’ Trapping of charges on the trapping layer adds extra margin to the stored data states, prevents their degradation, and renders the cell non-volatile.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: May 29, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Arup Bhattacharyya
  • Patent number: 7214971
    Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: May 8, 2007
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Minoru Niigaki, Kazutoshi Nakajima
  • Patent number: 7202511
    Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: April 10, 2007
    Assignee: DRS Sensors & Targeting Systems, Inc.
    Inventors: Maryn G. Stapelbroek, Henry H. Hogue, Arvind I. D'Souza
  • Patent number: 7187020
    Abstract: A solid-state imaging device of a three-transistor pixel configuration having no selection transistor has a problem of a non-selection hot carrier white point, which is specific to this apparatus. A bias current during a non-reading period of pixels is made to flow to a pixel associated with an immediately previous selection pixel, for example, the immediately previous selection pixel itself. As a result, dark current only for one line occurs in each pixel, and the dark current for one line itself can be reduced markedly. Consequently, defective pixels due to non-selection hot carrier white points can be virtually eliminated.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: March 6, 2007
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 7183582
    Abstract: In a circuit to drive driven elements such, as electro-optical elements, an electro-optical device has an element layer, a wire-forming layer, and an electronic component layer in order to suppress variation in characteristics of active elements. The element layer has a plurality of organic EL elements, each of which is arranged in a different position in a plane. The electronic component layer has pixel-driving IC chips. The respective pixel-driving IC chips include a plurality of pixel circuits, each of which drives each organic EL element corresponding to the pixel circuit. The wire-forming layer is positioned between the element layer and the electronic component layer. The wire-forming layer has wires to connect the respective pixel circuits included in the pixel-driving IC chips with the organic EL elements corresponding to the pixel circuits.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: February 27, 2007
    Assignee: Seiko Epson Coporation
    Inventor: Yoichi Imamura
  • Patent number: 7180110
    Abstract: The organic photoelectric conversion element according to the invention has enhanced the light-absorbing property by incorporating two or more kinds of electron donating organic materials 4a and 4b in the photoelectric conversion region 14. With such measure, it has become possible to efficiently absorb the incident light and enhance the photoelectric conversion characteristic. In addition, a light-to-light conversion material 7 is incorporated in the photoelectric conversion region, too. With this measure, even the light of such a wavelength that an electron donating organic material cannot inherently absorb comes to be absorbed since the light-to-light conversion material 7 converts the wavelength, thus enabling the light to be utilized for carrier generation. Accordingly, an organic photoelectric conversion element with a high conversion efficiency can be obtained.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: February 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takahiro Komatsu, Kei Sakanoue
  • Patent number: 7157747
    Abstract: A channel isolation region 42 is formed over the entire width of an N-type silicon substrate 41, and photothyristors, in each of which an anode diffusion region 43, a P-gate diffusion region 44, a cathode diffusion region 45 are formed parallel to the channel isolation region 42 over almost the entire width of the N-type silicon substrate 41, are formed in a left-hand portion 40a and in a right-hand portion 40b and are wired inversely parallel. Thus, the inter-channel movement of residual holes during commutation is restrained by the channel isolation region 42, by which commutation failure is suppressed to improve a commutation characteristic. Further, an operating current large enough for controlling a load current of approx. 0.2 A is obtained although a chip is divided by the channel isolation region 42. Therefore, using this bidirectional photothyristor chip makes it possible to implement an inexpensive SSR with a main thyristor eliminated.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: January 2, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuru Mariyama, Masaru Kubo
  • Patent number: 7141826
    Abstract: Disclosed is a multi-wavelength light receiving element. The multi-wavelength light receiving element includes a first type substrate. A first intrinsic layer is positioned on the first type substrate. A heavily-doped second-type buried layer is positioned on the first intrinsic layer. A second intrinsic layer is positioned on the heavily-doped second-type buried layer. A plurality of heavily-doped first-type fingers are shallowly embedded in the second intrinsic layer. A first type has a doped state that is opposite to a second type.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: November 28, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joo Yul Ko, Shin Jae Kang, Kyoung Soo Kwon
  • Patent number: 7122840
    Abstract: An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosensor and the light emitting element are isolated by the shallow trench isolation structure. An opening is formed in the shallow trench isolation structure to expose part of the substrate. An opaque shield is formed in the opening to prevent photons from the light emitting element from striking the photosensor.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: October 17, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung, Yean-Kuen Fang
  • Patent number: 7115925
    Abstract: An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively operative to transfer a signal from the photosensitive element to the floating diffusion. The floating diffusion is formed from an n-type implant with a dosage in the range of 5e13 to 5e14 ions/cm2. Finally, an amplification transistor is controlled by the floating diffusion.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: October 3, 2006
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7102185
    Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Eastman Kodak Company
    Inventors: David N. Nichols, David L. Losee, Christopher Parks
  • Patent number: 7070207
    Abstract: The present invention provides a device for optical communication comprising: a substrate for mounting an IC chip having a light emitting element and a light receiving element mounted at predetermined positions; and a multilayered printed circuit board having an optical waveguide formed at a predetermined position, which is low in connection loss among the mounted optical components and which has excellent connection reliability. The device for optical communication according to the present invention comprises the substrate for mounting an IC chip and the multilayered printed circuit board, wherein the substrate for mounting an IC chip includes conductor circuits, interlaminar insulating layers and via-holes for connecting the conductor circuits, with the interlaminar insulating layers interposed therebetween, to each other, and a light receiving element and a light emitting element are mounted on the substrate for mounting an IC chip.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: July 4, 2006
    Assignee: Ibiden Co., Ltd.
    Inventor: Motoo Asai
  • Patent number: 7057214
    Abstract: Semiconductor switches, such as thyristors, may be light activated by introducing the light into the switch via a groove having a sloped surface to receive the triggering light. The use of a sloped surface increases the surface path length between points of different electrical potential in the groove and, therefore, reduces the likelihood of electrical breakdown on the groove wall. In one particular embodiment, a light-activated thyristor includes a semiconductor anode layer, an n-base layer, a p-base layer and a semiconductor cathode layer disposed parallel to a thyristor plane. A thyristor axis lies perpendicular to the thyristor plane. A groove having a light refracting side wall extends into the thyristor from the anode layer. A portion of the light refracting side wall is disposed non-parallel to the thyristor plane and to the thyristor axis, and extends in the n-drift layer.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: June 6, 2006
    Assignee: Optiswitch Technology Corporation
    Inventors: David M. Giorgi, Tajchai Navapanich
  • Patent number: 7002188
    Abstract: A laser-activated semiconductor switching device includes a semiconductor assembly including a multi-layer semiconductor structure having a first principal surface, and a laser assembly. The laser assembly includes at least one laser device and is directly connected to said first principal surface. The first principal surface includes a window area from which a metallization layer and an emitter layer of the semiconductor assembly are masked, such that laser light emitted from the laser assembly impinges through the window area directly onto a base layer of said semiconductor assembly to initiate current conduction by said switching device.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: February 21, 2006
    Assignees: The Titan Corporation, The United States of America as represented by the Secretary of the Navy
    Inventors: Douglas M. Weidenheimer, David Giorgi, John Sethian
  • Patent number: 6995407
    Abstract: A photonic digital-to-analog converter employing a plurality of heterojunction thyristor devices that are configured to convert a digital word encoded by a parallel digital optical signal (e.g., a plurality of synchronous optical bits) to an output analog electrical signal whose magnitude corresponds to the digital word. Each heterojunction thyristor device is configured to convert an optical bit in the digital word to a corresponding digital electrical signal. The voltage levels (e.g., magnitudes) of the ON state of the digital electrical signals produced by the heterojunction thyristor devices may be supplied by voltage divider networks coupled between the cathode terminal of the devices and ground potential or voltage reference sources coupled to the input terminals of the heterojunction thyristor devices. In this manner, electrical signals whose magnitude corresponds to contribution of each optical bit in the digital word are produced.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: February 7, 2006
    Assignees: The University of Connecticut, Opel, Inc.
    Inventors: Geoff W. Taylor, Jianhong Cai
  • Patent number: 6933529
    Abstract: An active matrix type organic light emitting diode device and a thin film transistor thereof are disclosed in the present invention. The driving thin film transistor for an active matrix type organic light emitting diode (AMOLED) device having first and second electrodes spaced apart from each other and an organic light emitting layer disposed between the first and second electrodes includes a gate electrode on a substrate, a semiconductor layer over the gate electrode, and source and drain electrodes on the semiconductor layer, wherein the source and drain electrodes are spaced apart from each other and respectively overlap portions of the gate electrode, and an overlapping area between the gate electrode and the source electrode is larger than an overlapping area between the gate electrode and the drain electrode.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: August 23, 2005
    Assignee: LG. Philips LCD Co., Ltd.
    Inventors: Juhn-Suk Yoo, Jae-Yong Park
  • Patent number: 6909161
    Abstract: A photodiode has an optical absorption layer composed of a depleted first semiconductor optical absorption layer with a layer width WD and a p-type neutral second semiconductor optical absorption layer with a layer width WA. The ratio between WA and WD is set such that the total carrier transit time ?tot becomes minimum in the optical absorption layer. The photodiode can further include a depleted semiconductor optical transmission layer with a bandgap greater than that of the first semiconductor optical absorption layer, between the first semiconductor optical absorption layer and an n-type semiconductor electrode layer.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: June 21, 2005
    Assignee: NTT Electronics Corporation
    Inventors: Tadao Ishibashi, Yukihiro Hirota, Yoshifumi Muramoto
  • Patent number: 6897487
    Abstract: An optical coupling device includes: a light emitter provided on an input lead frame; a photoreceptor provided on an output lead frame; a load driving semiconductor element provided on a front surface of the output lead frame, and connected to the photoreceptor via the output lead frame; and a sealing resin section as a package for protecting the light emitter, the photoreceptor and the load driving semiconductor element, wherein a thermoelectric conversion element is provided in the package.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: May 24, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroshi Yamaguchi
  • Patent number: 6870191
    Abstract: A high external quantum efficiency is stably secured in a semiconductor light emitting device. At least one recess and/or protruding portion is created on the surface portion of a substrate for scattering or diffracting light generated in a light emitting region. The recess and/or protruding portion has a shape that prevents crystal defects from occurring in semiconductor layers.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: March 22, 2005
    Assignee: Nichia Corporation
    Inventors: Isamu Niki, Motokazu Yamada, Masahiko Sano, Shuji Shioji
  • Patent number: 6853014
    Abstract: An optoelectronic circuit employing a heterojunction thyristor device that is configured as an optically-controlled (or electrically-controlled) sampling/switching device. First and second channel regions are disposed between the anode terminal and the cathode terminal of the device, and an electrical input terminal and an electrical output terminal are coupled to opposite ends of the first channel region. At least one control signal is supplied to the device. When the control signal corresponds to a predetermined ON condition, sufficient charge is stored in the second channel region to cause the heterojunction thyristor device to operate in an ON state whereby current flows between the anode terminal and the cathode terminal and the electrical input terminal is electrically coupled to the electrical output terminal.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: February 8, 2005
    Assignees: The University of Connecticut, Opel, Inc.
    Inventors: Geoff W. Taylor, Jianhong Cai
  • Patent number: 6809355
    Abstract: A solid-state imaging device having a gate structure including an oxide film and a nitride film includes upper layer films (for example, a planarization film, an insulating film, and a protective film) allowing ultraviolet rays having a wavelength of 400 nm or less to pass therethrough; and a metal made shield film or an organic film capable of absorbing the ultraviolet rays formed in such a manner as to cover a region of the gate structure (for example, an output gate and a reset gate), excluding a light receiving portion and a transfer portion, of the solid-state imaging device. With this configuration, it is possible to prevent the shift of a threshold voltage Vth, and hence to enhance the reliability of the transfer or reset of electric charges.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: October 26, 2004
    Assignee: Sony Corporation
    Inventor: Kazushi Wada
  • Patent number: 6770911
    Abstract: Large area silicon carbide devices, such as light-activated silicon carbide thyristors, having only two terminals are provided. The silicon carbide devices are selectively connected in parallel by a connecting plate. Silicon carbide thyristors are also provided having a portion of the gate region of the silicon carbide thyristors exposed so as to allow light of an energy greater than about 3.25 eV to activate the gate of the thyristor. The silicon carbide thyristors may be symmetric or asymmetrical. A plurality of the silicon carbide thyristors may be formed on a wafer, a portion of a wafer or multiple wafers. Bad cells may be determined and the good cells selectively connected by a connecting plate.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: August 3, 2004
    Assignee: Cree, Inc.
    Inventors: Anant Agarwal, Sei-Hyung Ryu, John W. Palmour
  • Publication number: 20040079961
    Abstract: A photonic digital-to-analog converter employing a plurality of heterojunction thyristor devices that are configured to convert a digital word encoded by a parallel digital optical signal (e.g., a plurality of synchronous optical bits) to an output analog electrical signal whose magnitude corresponds to the digital word. Each heterojunction thyristor device is configured to convert an optical bit in the digital word to a corresponding digital electrical signal. The voltage levels (e.g., magnitudes) of the ON state of the digital electrical signals produced by the heterojunction thyristor devices may be supplied by voltage divider networks coupled between the cathode terminal of the devices and ground potential or voltage reference sources coupled to the input terminals of the heterojunction thyristor devices. In this manner, electrical signals whose magnitude corresponds to contribution of each optical bit in the digital word are produced.
    Type: Application
    Filed: December 19, 2002
    Publication date: April 29, 2004
    Applicants: The University of Connecticut, OPEL, Inc.
    Inventors: Geoff W. Taylor, Jianhong Cai
  • Patent number: 6720582
    Abstract: A laser diode module in which a laser diode and an optical fiber are optically coupled with each other efficiently irrespective of an ambient temperature change within the laser diode module. The laser diode module includes a laser diode, an optical system, an optical system mounting member supporting at least a portion of the optical system, a laser diode mounting member, and a bottom plate supporting the laser diode, the optical system, the optical system mounting member, and the laser diode mounting member. The optical system receives and transmits a beam emitted from the laser diode through a lens portion to an optical fiber. The optical system mounting member is attached to the laser diode mounting member. The laser diode module preferably includes a thermo module having a first plate member attached to the laser diode mounting member.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: April 13, 2004
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Jun Miyokawa, Yuichiro Irie, Etsuji Katayama, Kaoru Sekiguchi, Kiyokazu Tateno
  • Publication number: 20040061126
    Abstract: An object of the present invention is to provide an electronic circuit device capable of reducing the occurrence of electromagnetic waves accompanying the propagation of a signal. The electronic circuit device comprises a plurality of transparent substrates, on which an optical sensor and an optical shutter are formed. An optical signal is inputted from the external into the electronic circuit device, and the optical signal is directly irradiated on the optical sensor disposed on the transparent substrate, or the optical signal is transmitted through the transparent substrate and inputted into an optical sensor on the other substrate. The optical sensor converts the optical signal into an electric signal, and the circuit disposed on the substrate is operated. The optical shutter is controlled by the output of the circuit, the light is inputted from the external into this optical shutter, and whether the light has been transmitted or not is determined, thereby taking out the signal.
    Type: Application
    Filed: August 28, 2003
    Publication date: April 1, 2004
    Applicants: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Shigeki Imai, Tomoyuki Nagai, Shunpei Yamazaki, Jun Koyama
  • Patent number: 6614055
    Abstract: A surface light-emitting element having improved external light emission efficiency and a self-scanning light-emitting device using this surface light-emitting element are provided. To improve external light-emission efficiency, the light-emitting center is shifted to an area where there is no light shielding layer thereon. When the surface light-emitting element is a surface light-emitting thyristor of the PNPN structure, it is necessary to have such a construction that part of the injected current is prevented from flowing toward the gate electrode to improve external light emission efficiency. The self-scanning light-emitting device of this invention is accomplished by using this type of surface light-emitting element.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: September 2, 2003
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventors: Yukihisa Kusuda, Seiij Ohno, Shunsuke Ohtsuka
  • Publication number: 20030071274
    Abstract: A light-emitting thyristor matrix array in which the area of a chip may be decreased is provided. A plurality of three-terminal light-emitting thyristors are arrayed in one line in parallel with the long side of the chip, a plurality of bonding pads are arrayed in one line in parallel with the long side of the chip. Thereby, the area of the chip becomes smaller.
    Type: Application
    Filed: September 21, 2001
    Publication date: April 17, 2003
    Inventors: Seiji Ohno, Yukihisa Kusuda
  • Publication number: 20030047748
    Abstract: Large area silicon carbide devices, such as light-activated silicon carbide thyristors, having only two terminals are provided. The silicon carbide devices are selectively connected in parallel by a connecting plate. Silicon carbide thyristors are also provided having a portion of the gate region of the silicon carbide thyristors exposed so as to allow light of an energy greater than about 3.25 eV to activate the gate of the thyristor. The silicon carbide thyristors may be symmetric or asymmetrical. A plurality of the silicon carbide thyristors may be formed on a wafer, a portion of a wafer or multiple wafers. Bad cells may be determined and the good cells selectively connected by a connecting plate.
    Type: Application
    Filed: September 12, 2001
    Publication date: March 13, 2003
    Inventors: Anant Agarwal, Sei-Hyung Ryu, John W. Palmour
  • Patent number: 6514785
    Abstract: A method of forming an image sensor is disclosed. A partially processed semiconductor wafer is provide, containing p-type and/or n-type regions which are bounded by isolation regions and with gate oxide layers grown on the surfaces upon which gate electrode structures are disposed, some of said gate electrode structures will serve as gate electrodes of image sensor transistors. Ions are implanted to form source/drain structures about the said gate electrode structures. To form photodiodes ions are implanted in two steps overlapping a source/drain region. A deeper implant provides a low charge carrier density region and a shallow implant provides a high charge carrier density region near the surface. A blanket transparent insulating layer is deposited.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: February 4, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: An-Min Chiang, Chi-Hsiang Lee, Wei-Kun Yeh, Hua-Yu Yang
  • Patent number: 6498356
    Abstract: There is disclosed an LED array chip which can minimize LED optical property deterioration by addition of a surface protective film, and mainly side effects such as light quantity decrease and light quantity dispersion increase among light emitting bits. In the LED array chip comprising a plurality of LED light emitting elements arrayed in a row, a surface insulating film formed by the same material as a material of an inner-layer insulating film for forming a window to connect a wiring pattern in an internal electric circuit constitution and for establishing electric insulation between circuits and by the same thin film forming process as a process of the inner-layer insulating layer is formed in an thickness of 0.5 &mgr;m or less on the entire surface of a final surface layer excluding a wire bonding pad and including a light emitting portion surface.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: December 24, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiyuki Sekiya, Mitsuo Shiraishi, Ryuta Mine, Junji Ishikawa
  • Patent number: 6426236
    Abstract: Disclosed is an electroabsorption-type optical modulator, which has: a semiconductor substrate; and a semiconductor buffer layer, a semiconductor optical absorption layer and a semiconductor cladding layer which are layered in this order on the semiconductor substrate; wherein the absorption of a light wave supplied to an end of the semiconductor optical absorption layer is controlled by changing an intensity of electric field applied to the semiconductor optical absorption layer; and the semiconductor optical absorption layer has a region with absorption-edge wavelength shorter than that of the other region of the semiconductor optical absorption layer and a voltage corresponding an external electrical signal is simultaneously applied to both the regions of the semiconductor optical absorption layer, so that, to an incident light, a refractive index of the semiconductor optical absorption layer is decreased and an absorption coefficient of the semiconductor optical absorption layer is increased when an inten
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: July 30, 2002
    Assignee: NEC Corporation
    Inventors: Masashige Ishizaka, Hiroyuki Yamazaki