With Light Activation Patents (Class 257/113)
  • Patent number: 6410970
    Abstract: A semiconductor device that has a p-n junction with a photosensitive region partially having a diffusion region and a non-diffused region when the p-n junction is subjected to a reverse bias voltage. When an incident light (e.g. a laser) is directed at the surface of the photosensitive region, hole-electron pairs are generated in the partial diffusion region within the photosensitive region. As a result, the current through the photosensitive region changes in a substantially linear fashion with the intensity of the incident light. The semiconductor device can be configured in a circuit to provide substantially linear power amplification.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: June 25, 2002
    Assignee: Ophir RF, Inc.
    Inventor: Larry M. Tichauer
  • Patent number: 6392615
    Abstract: In a drive apparatus of a self-scanning type light emission element array, a first bit light emission thyristor is surely set into an ON state, thereby stabilizing shift of a light emitting operation from the first bit light emission thyristor. In the light emission element array drive apparatus which drives a light emission element array having plural light emission thyristors arranged in array and plural shift thyristors arranged in array (each gate of shift thyristors is connected to each gate of light emission thyristors), the apparatus comprises: a generation unit for generating a shift signal to sequentially shift ON states of the shift thyristors; and a generation unit for generating a start signal to start drive of the light emission element array, wherein a gate voltage of the first light emission thyristor is supplied according to the start signal without setting the first shift thyristor into an ON state according to the shift signal.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: May 21, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mitsuo Shiraishi, Toshiyuki Sekiya
  • Patent number: 6359324
    Abstract: A semiconductor device that has a p-n junction with a photosensitive region partially having a diffusion region and a non-diffused region when the p-n junction is subjected to a reverse bias voltage. When an incident light (e.g. a laser) is directed at the surface of the photosensitive region, hole-electron pairs are generated in the partial diffusion region within the photosensitive region. As a result, the current through the photosensitive region changes in a substantially linear fashion with the intensity of the incident light. The semiconductor device can be configured in a circuit to provide substantially linear power amplification. The semiconductor device can be configured by itself or with a complimentary device to form push-pull operations.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: March 19, 2002
    Assignee: Ophir RF, Inc.
    Inventor: Larry M. Tichauer
  • Patent number: 6294822
    Abstract: The present invention discloses a small spherical solar cell SS (spherical semiconductor) and the manufacturing method for the same, comprising: a spherical core 1; a reflective film 2 formed on the surface of core 1; a semiconductor thin film layer (p type polycrystalline silicon thin film 4a, n+ diffusion layer 7) which is approximately spherical and is formed on the surface of reflective film 2; a n+p junction 8 which is formed on semiconductor thin film layer; passivation film 9; and a surface protective film 10 of titanium dioxide; a pair of electrodes 11a, 11b connected to both sides of n+p junction 8. Other than spherical solar cell SS, the following are also disclosed: a spherical crystal manufacturing device; 2 types of spherical solar cells; 2 types of spherical photocatalytic elements; a spherical light emitting element which emits visible blue light; 2 types of spherical semiconductor device materials.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: September 25, 2001
    Inventor: Josuke Nakata
  • Publication number: 20010020705
    Abstract: A semiconductor light emitting device has a blue LED and a green LED which each have a protection circuit connected in parallel thereto. The protection circuit has two Zener diodes that are connected in series in opposite directions to each other. When an AC voltage below a breakdown voltage of the protection circuit is applied to the semiconductor light emitting device and when the voltage is in forward direction, a current passes through the blue and green LEDs to emit lights. A current is intercepted by the protection circuit when the voltage is in reverse direction. When an high AC voltage above a breakdown voltage of the protection circuit is applied, a current passes through the protection circuit whether the current in forward direction or in reverse direction, so that the green and blue LEDs are protected. Even when the semiconductor light emitting devices are connected to one another in a matrix form and subject to dynamic driving, a leakage current is intercepted by the protection circuits.
    Type: Application
    Filed: March 1, 2001
    Publication date: September 13, 2001
    Inventor: Masataka Miyata
  • Patent number: 6218682
    Abstract: In an optically controlled thyristor having a four layer thyristor structure with respective first, second, third and fourth layers, the first and third layers have a first doping type, and the second and fourth layers have a second doping type different from the first doping type. A first shorting structure, formed from a semiconductor material of opposite doping from the first layer, is electrically coupled to the second layer by an electrically conducting, optically opaque layer. A first conductive layer connects between the first layer and the shorting structure and is adapted to transmit light into the first shorting structure. The first semiconductor layer of an optically controlled thyristor may have an aperture therethrough to permit light to enter the second layer from a first conductive layer side without propagating within the first layer.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: April 17, 2001
    Assignee: OptiSwitch Technology Corporation
    Inventors: Oved S. F. Zucker, David M. Giorgi
  • Patent number: 6154477
    Abstract: A laser activated semiconductor switching device has a semiconductor structure housed in a semiconductor structure housing, and a laser array assembly directly connected to the semiconductor structure housing. The laser array assembly houses a plurality of laser diodes and diode control circuitry which energizes the laser diodes to emit light directly onto a surface of the semiconductor structure, which can be the cathode or anode surface, to cause the semiconductor structure to generate current carriers which enable passage of current through the semiconductor structure. The device can further include a second laser array assembly which is connected to the side of the semiconductor structure housing opposite to that on which the first laser array assembly is connected, and is configured to operate in a manner similar to the first laser array assembly.
    Type: Grant
    Filed: May 12, 1998
    Date of Patent: November 28, 2000
    Assignee: Berkeley Research Associates, Inc.
    Inventors: Douglas M. Weidenheimer, Sol Schneider, Jeffry Golden
  • Patent number: 6144045
    Abstract: High power thyristor-type devices comprising a first layer of p-type doped semiconductor alloy aluminum gallium nitride, a second layer of n-type doped aluminum gallium nitride with lower aluminum content than the first layer, a third layer of p-type doped aluminum gallium nitride with a higher aluminum content than the second layer, and a fourth layer of aluminum gallium nitride of n-type doping. The difference in hole and electron energies (band offsets) across the interface between aluminum gallium nitride and gallium nitride are such that hole and electron transfer are enhanced from aluminum gallium nitride to gallium nitride, or hole and electron transfer are suppressed from gallium nitride to aluminum gallium nitride. Aluminum content in layers 1 and 2 is chosen such that hole transfer in the forward biased conduction state of the device is enhanced, and suppressed in the reverse biased blocking state of the device.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: November 7, 2000
    Assignee: California Institute of Technology
    Inventors: Zvonimir Z. Bandic, Eric C. Piquette, Thomas C. McGill
  • Patent number: 6069026
    Abstract: This invention relates to the fabrication and assembly of semiconductor chips, substrates, and modules, and more particularly to methods and apparatus for achieving flexible, low-cost manufacturing. Commercial and military systems today are placing increasing demands on flexible application and reliable operation, as well as on simplified manufacturing.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: May 30, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert E. Terrill, Judith Sultenfuss Archer
  • Patent number: 6051884
    Abstract: The invention provides a method for producing wiring and contacts in an integrated circuit including the steps of forming insulated gate components on a semiconductor substrate; applying a photo-reducible dielectric layer to cover the substrate; etching holes and forming contacts; photo-reducing the dielectric to increase its conductivity; covering the resulting structure with an interconnect layer; etching the interconnect layer to define wiring in electrical contact with the contacts; and oxidizing the dielectric to reduce its conductivity.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: April 18, 2000
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Constantin Papadas
  • Patent number: 6025610
    Abstract: A solid relay having a light emitter and a photodetector and a method of producing the same are disclosed. A planer thyristor, photodiode, phototransistor or similar photodetector is formed on an Si substrate or wafer. The surface of the photodetector is covered with an SiO.sub.2, PSG (Phospher-Silicate Glass) or similar transparent insulation film. An ITO (Indium Tin Oxide) or similar transparent film, an organic thin film and a metal electrode are sequentially formed on the transparent insulation film, constituting a light emitter. The laminate is separated from the wafer in the form of a chip by dicing. The chip is bonded to a lead frame, connected to the leads of a lead frame by wire bonding, and then sealed with epoxy resin or similar resin.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: February 15, 2000
    Assignee: NEC Corporation
    Inventors: Teruo Kusaka, Mitsuma Ooishi
  • Patent number: 5883403
    Abstract: In a semiconductor device, such as a diode and thyristor, having at least one pn junction between a pair of main surfaces, a first main electrode formed on the surface of one of the main surfaces and a second main electrode formed on the surface of the other one of the main surfaces, a semiconductor lattice defect is formed such that its lattice defect density increases gradually in the direction from the first main electrode to the second main electrode. Since the distribution of the carrier density in the conduction state can be flattened, the reverse recovery charge can be reduced substantially without causing the ON-state voltage to increase.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: March 16, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Katsumi Ishikawa, Katsuaki Saito, Yutaka Sato, Atsuo Watanabe, Shuji Katoh, Naohiro Momma
  • Patent number: 5847416
    Abstract: A light travelling from a light transmission window (8) to a light receiving part (2) is transmitted first through a first light guide (11) of linear single core construction and next through a second light guide (12) which is bent and of multicore construction. Single core construction achieves a high light mixing effect, and accordingly the first light guide (11) makes a distribution of light intensity uniform. On the other hand, multicore construction has little light mixing effect, and raises little variation in distribution of incident light intensity. In other words, the second light guide (12) transmits the light to the light receiving part (2) without breaking the uniform distribution of light intensity achieved by the first light guide (11).
    Type: Grant
    Filed: May 21, 1996
    Date of Patent: December 8, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Ohta, Katumi Satoh
  • Patent number: 5814841
    Abstract: A self scanning light-emitting array is disclosed. A coupled array of light-emitting elements is constituted so that a light-emitting element in a minimal conducting state influences the next light-emitting element so that its threshold level is changed. When each element is driven by a common clock pulse, the change in threshold level is shifted in the longitudinal direction, so that a minimal conducting state is transferred in a clock period of the clock pulse.
    Type: Grant
    Filed: April 21, 1995
    Date of Patent: September 29, 1998
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventors: Yukihisa Kusuda, Kiyoshi Tone, Ken Yamashita, Shuhei Tanaka
  • Patent number: 5811841
    Abstract: A high voltage high current semiconductor switching device in which the tendency to incur premature electrical breakdown through carrier channels formed slightly below the surface of the semiconductor material is avoided. This avoidance occurs through use of a current dispersing electrically insulating element added at one extremity of the switching device structure. The added current dispersing element may be in the form of a thin oxide layer added at the anode end of the device in the case of a silicon embodiment of the invention. Tunneling conduction is believed to occur in this silicon dioxide layer and such conduction has the effect of dispersing the current through the silicon over a cross-sectional area sufficiently large to prevent the current filamentation, localized heating, thermal runaway and self destruction sequence often encountered in previous arrangements of higher energy semiconductor switches.
    Type: Grant
    Filed: April 3, 1997
    Date of Patent: September 22, 1998
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Biswa N. Ganguly, Brian A. Hibbeln
  • Patent number: 5804841
    Abstract: An optical trigger thyristor having a light receiving portion 8 constructed of an n-type base layer front surface portion 5, a p-type semiconductor region 6, and a p-type front surface layer 7. The p-type front surface layer 7 is disposed so that it connects the front surfaces of the p-type semiconductor region 6 and a p-type base layer 3 and covers the exposed surface of the n-type base layer front surface portion 5. As a result, the n-type base layer front surface portion, which tends to be easily contaminated, is covered by the p-type front surface layer. Thus, contamination of the n-type base layer front surface is prevented. Consequently, the concentration of impurities in the front surface portion of the n-type base layer does not vary. Thus, there is high arc sensitivity without deterioration of the voltage blocking characteristic.
    Type: Grant
    Filed: May 16, 1996
    Date of Patent: September 8, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsumi Satoh, Kenji Ohta
  • Patent number: 5793063
    Abstract: An optically-triggered silicon controlled rectifier (SCR) (21) having a number of semiconductor layers (23, 24, 31) diffused into an N type substrate (22). Specifically, the SCR is formed by diffusing a first P+ layer (23) into an upper surface of the substrate. Then, an N+ layer (24) is diffused into a portion of an upper surface of the first P+ layer. An oxide layer (25) which is permeable to optical radiation is formed on the first P+ layer. A conductive cathode terminal (26) is then deposited on the N+ layer. Therefore, a trench (30) is etched in the lower surface of the substrate. The trench is defined by a depth and a surface. A second P+ layer (31) is diffused into the surface of the trench. The depth of the trench substantially defines a spacing between the first and second P+ layers. The chip is soldered onto a pedestal (33) formed on a lead frame (34). The solder is deposited in the trench and contacts the second P+ layer to form an anode terminal (36).
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: August 11, 1998
    Assignee: Siemens Microelectronics, Inc.
    Inventor: David Whitney
  • Patent number: 5780877
    Abstract: A break-over photodiode, designed as a light-sensitive thyristor, can be stacked using a series connection with a plurality of break-over photodiodes, such stacking representing a high-voltage break-over diode. The break-over photodiode can be triggered by lateral illumination in an edge zone, and includes a gate-layer resistivity under the emitter which is greater in an edge zone of the break-over photodiode than in the central zone of the break-over photodiode. The light sensitivity of the laterally illuminatable break-over photodiode is increased by a greater gate-layer resistivity in the edge zone as compared to the central zone.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: July 14, 1998
    Assignee: Robert Bosch GmbH
    Inventors: Bernd Bireckoven, Dirk Hoheisel, Ning Qu
  • Patent number: 5747835
    Abstract: A serial arrangement of photosensitive components of the planar-type has a first main surface on which a first photosensitive junction appears at the surface and a second main surface. The components are piled so that the second main surface of a component contacts the first main surface of the adjacent component. The second main surface of each component has a notch at its periphery along a lateral length corresponding at least to the distance between the photosensistive junction and the periphery.
    Type: Grant
    Filed: September 11, 1995
    Date of Patent: May 5, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Robert Pezzani
  • Patent number: 5710463
    Abstract: A high-voltage breakover diode is proposed, which takes on the function of an ignition voltage distributor of an internal combustion engine having solid-state highvoltage distribution. The high-voltage breakover diode comprises a cascade of breakover diode chips, a polyimide layer having recesses in the region of the cathode connection being provided between the individual breakover diode chips produced using planar technology, in each case on the top of the breakover diode chips, and the mechanical and electrical connection of the individual breakover diode chips being effected by means of a conductive adhesive (FIG. 3).
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: January 20, 1998
    Assignee: Robert Bosch GmbH
    Inventors: Manfred Vogel, Johann Konrad, Werner Herden, Richard Spitz, Herbert Goebel
  • Patent number: 5677552
    Abstract: The invention provides an optical functioning device which emits and receives light, and a driver circuit for controlling the device with light. In the device, elements, in which semiconductor multilayer-film reflecting mirrors are provided at both the upper and lower ends of a pnpn structure of semiconductors and which have light-emitting and light-receiving functions to act as optical resonators, are integrated two-dimensionally each with electrodes which are provided for the and the transistors act as phototransistors into which light is introduced.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: October 14, 1997
    Assignee: NEC Corporation
    Inventor: Ichiro Ogura
  • Patent number: 5663580
    Abstract: A semiconductor device comprises a semiconductor layer of SiC having an active area through which the device is adapted to be triggered by light incident thereon and means for generating and emitting light with an energy exceeding the bandgap, being the energy difference between the conduction band and the valence band, of the SiC-layer of the active area. The generating means is directly integrated in the device by being placed so as to cover substantial portions of the active area, and being made of a Group 3B-nitride having a larger bandgap that of the SiC of the SiC-layer.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: September 2, 1997
    Assignee: ABB Research Ltd.
    Inventors: Christopher Harris, Mietek Bakowski
  • Patent number: 5652439
    Abstract: The invention relates generally to optoelectronic pnpn devices and more particularly to a layer structure suitable for fast electrical complete turn-off of such devices and to a method for efficient and fast operation of such devices and differential pairs of such devices. The devices have four layers and three junctions, and the invention provides for complete depletion of both center layers. The differential pair of pnpn devices also provides a very sensitive optical receiver which combines a very high cycle frequency with a very high optical sensitivity.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: July 29, 1997
    Assignee: IMEC
    Inventors: Maarten Kuijk, Paul Heremans, Roger Vounckx, Gustaaf Borghs
  • Patent number: 5637886
    Abstract: When an abrupt voltage noise is applied across an anode electrode (A) and a cathode electrode (K), displacement currents (I.sub.10 to I.sub.30) which are responsive to junction capacitances (C.sub.10 to C.sub.30) of respective unit thyristors (ST.sub.1, ST.sub.2, MT) are generated. The displacement currents (I.sub.10 to I.sub.30) flow into a compensation electrode (C) through paths in a P base layer (2) having resistances (R.sub.10 to R.sub.30), and further flow to an external power source through the cathode electrode (K) which is short-circuited with the compensation electrode (C). The paths of the three displacement currents (I.sub.10 to I.sub.30) are separated from each other by resistances (R.sub.12, R.sub.23). Therefore, a forward bias voltage of a junction (D.sub.10) caused by the displacement current (I.sub.10) is attenuated by the displacement current (I.sub.20), while a forward bias voltage of a junction (D.sub.20) caused by the displacement current (I.sub.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: June 10, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsumi Satoh, Kenichi Honda, Kazuhiko Niwayama
  • Patent number: 5497010
    Abstract: The high-voltage semiconductor device includes a single chip having a plurality of semiconductor elements connected in series with each other which includes an insulating substrate (2); a monocrystalline semiconductor carrier (1) of a first conductivity type applied to the insulating substrate (2); at least two terminals (5,6) located on opposite sides of the chip; strip-like areas (3) of a second conductivity type formed in the monocrystalline semiconductor carrier (1), the strip-like areas (3) each extending across the semiconductor carrier (1) at right angles to a longitudinal direction between the at least two terminals, forming pn junctions in the semiconductor carrier (1), being spaced from each other in the longitudinal direction over the single chip and penetrating an entire thickness of the semiconductor carrier; at least one doped region (7) in the strip-like areas (3) forming an at least four layered component in the single chip; and a light responsive device for reducing a switching voltage of the
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: March 5, 1996
    Assignee: Robert Bosch GmbH
    Inventors: Manfred Vogel, Werner Herden, Volkmar Denner, Anton Mindl
  • Patent number: 5468976
    Abstract: A semiconductor rectifying module has a metal base, a dielectric heat conducting spacer arranged on the metal base and rectifying elements of anode and cathode groups arranged with their cathodes and anodes on the spacer, the rectifying elements being composed of a semiconductor with at least two layers having alternating conductivity types, each of the rectifying elements being surrounded by its side surface by a side layer of a first type conductivity semiconductor material while an original material is a second type conductivity semiconductor material, and being provided with an upper closed separating groove with an external part bordering at least the side layer.
    Type: Grant
    Filed: August 9, 1994
    Date of Patent: November 21, 1995
    Inventors: Yury Evseev, Lubomir Rachinsky, Natalia Tetervova, Kazimir Seleninov, Evgeniy Dermenzhi, Olga Nasekan, Eva Druyanova, Roman Ribak
  • Patent number: 5455434
    Abstract: A thyristor includes a semiconductor body with a surface. The semiconductor body has an inner zone of a first conduction type; a cathode-side base zone of a second conduction type opposite the first type, the base zone having a recess formed therein; a layer of the second conduction type being disposed on the surface of the semiconductor body, being disposed in the cathode-side base zone, being thinner than the cathode-side base zone, and being joined to the cathode-side base zone; and an additional zone of the second conduction type being disposed in the recess, being joined to the layer, being thicker than the layer, and being spaced apart from the cathode-side base zone.
    Type: Grant
    Filed: August 8, 1994
    Date of Patent: October 3, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventor: Frank Pfirsch
  • Patent number: 5446295
    Abstract: An optically triggered silicon controlled rectifier (SCR) circuit (20) has a number of semiconductor layers diffused into an N- substrate (21). The layers form an SCR (50) having a P+ anode region (25), a P+ gate region (24), and an N+ cathode region (27). An adjustable base-shunt resistance, in the form of a P- channel depletion mode MOSFET (Q3), connects between the SCR gate region and the cathode region. The MOSFET includes a MOSFET gate region (35), a P+ drain region (24), a P-- channel (26), and a P+ source region (23). The substrate also accommodates a PN photodiode (22, D1) which connects to the MOSFET gate region for switching the MOSFET on and off in response to incident optical radiation (L) thereon. The SCR gate region also comprises photosensitive material. When sufficient optical radiation illuminates the photodiode and the SCR gate region, the MOSFET is turned off and the SCR is triggered, permitting anode-to-cathode current to flow.
    Type: Grant
    Filed: August 23, 1993
    Date of Patent: August 29, 1995
    Assignee: Siemens Components, Inc.
    Inventor: David Whitney
  • Patent number: 5345094
    Abstract: Disclosed is a semiconductor device comprising an output Triode AC switch with a vertical structure, which is provided in a silicon substrate and has a gate, a first output terminal and a second output terminal, and an input/driving photo Triode AC switch, which is provided in the substrate and has a light-receiving portion, a first terminal connected to the gate and a second terminal connected to the second output terminal. The output Triode AC switch with a vertical structure is turned on when light is input to the photo Triode AC switch.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: September 6, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunori Usui, Shinjiro Yano
  • Patent number: 5245203
    Abstract: A photoelectric converter of semiconductor transistor comprises two semiconductor regions of same electroconductive type and a semiconductor region of opposite electroconductive type to that of the two semiconductor regions. The semiconductor region of opposite electroconductive type is irradiated with a light. An amplified power is output from at least one of the two semiconductor regions of same electroconductive type. The semiconductor region of the opposite electroconductive type comprises a semiconductor region that accumulates a charge generated by light input and a semiconductor region acting as a control electrode region for the semiconductor transistor.
    Type: Grant
    Filed: March 31, 1992
    Date of Patent: September 14, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masakazu Morishita, Shin Kikuchi
  • Patent number: 5243205
    Abstract: In a photothyristor, a main thyristor consisting of a P emitter layer, an N base layer, a P gate base layer and an N emitter layer is formed on a semiconductor substrate. Also a pilot thyristor surrounded with the main thyristor and consisting of a P emitter layer, an N base layer, a P gate base layer and an N emitter layer is formed. In the P gate base layer, a trigger light irradiation surface including the inner surface of a recess is formed on the center of the pilot thyristor. In the N base layer, a crystal defect layer is formed under the trigger light irradiation surface by the irradiation with a radiant ray. A breakdown voltage to protect the thyristor from overvoltage is controlled by the crystal defect layer.
    Type: Grant
    Filed: June 18, 1992
    Date of Patent: September 7, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiko Kitagawa, Tetsujiro Tsunoda, Akihiko Osawa
  • Patent number: 5160838
    Abstract: A binary data processor uses a plurality of pairs of light beams for performing "AND", "OR" and "NOT" logic operations. The apparatus includes a plurality of pairs of light beams which singly diffract at apertures and which interface by pairs. Other waves, such as sound waves, may be utilized.
    Type: Grant
    Filed: September 11, 1990
    Date of Patent: November 3, 1992
    Inventor: Tai-Her Yang