With Specified Housing Or External Terminal Patents (Class 257/150)
  • Patent number: 5554863
    Abstract: A gate turn-off thyristor including: an n-type emitter semiconductor layer divided into a plurality of n-type areas; a p-type base semiconductor layer which cooperates with the n-type emitter semiconductor layer to form a first main circular surface; an n-type base semiconductor layer; and a p-type emitter semiconductor layer cooperating with the n-type base semiconductor layer to form a second main circular surface. An outer diameter of the p-type emitter semiconductor layer is smaller than that of the n-type emitter semiconductor layer. A first main electrode put in low resistance contact with the n-type emitter semiconductor layer is formed on the first main surface. A second main electrode put in low resistance contact with the p-type emitter layer and the n-type base semiconductor layer is formed on the second main surface. A control electrode is formed in the p-type base semiconductor on the first main surface.
    Type: Grant
    Filed: June 15, 1994
    Date of Patent: September 10, 1996
    Assignees: Hitachi, Ltd., Hitachi Haramachi Electronics Co., Ltd.
    Inventors: Sigeyasu Kouzuchi, Shuroku Sakurada, Takashi Saitoh, Hitoshi Komuro
  • Patent number: 5345096
    Abstract: In a turn-off high-power semiconductor component, in particular in the form of a GTO, comprising a disk-shaped semiconductor substrate (2) which is disposed concentrically in an annular insulating housing (10) between a disk-shaped cathode contact (4), to which pressure can be applied, and a disk-shaped anode contact (5), to which pressure can also be applied, and which is contacted on the cathode-contact side by a gate contact (7, 21), the cathode contact (4) being connected to one end of the insulating housing (10) via a first lid (11a) and the anode contact (5) to the other end of the insulating housing (10) via a second lid (11b), an outwardly hermetically sealed component (1) being formed, and the gate contact (7) being capable of being fed with a gate current via a gate lead (8) brought to the outside, a connection to the gate unit is achieved with low mutual inductance with a minimum of alterations compared with conventional components as a result of the gate lead (8) being of rotationally symmetrical
    Type: Grant
    Filed: July 30, 1993
    Date of Patent: September 6, 1994
    Assignee: ABB Research Ltd.
    Inventor: Horst Gruning
  • Patent number: 5221851
    Abstract: In a large-area controlled-turn-off high-power semiconductor component containing a multiplicity of finely structured individual components, a semiconductor device (12) is formed by a multiplicity of small-area semiconductor chips (7) which are accommodated alongside one another in a common housing (13) and connected in parallel. This achievement avoids problems of yield with structures which are becoming finer.
    Type: Grant
    Filed: February 4, 1992
    Date of Patent: June 22, 1993
    Assignee: Asea Brown Boveri Ltd.
    Inventors: Jens Gobrecht, Thomas Stockmeier