Abstract: Improved breakdown withstand capability is realized in a double gate insulated gate thyristor with low on-voltage in the thyristor operation mode and high-speed turn-off in the IGBT operation mode. Turn-off current through the lateral MOSFET using a second gate electrode is reduced, and breakdown withstand capability of the insulated gate thyristor is improved by inclusion of a gap in the (n) type source region, by contacting a part of the cathode directly to the (p) type base layer, and by connecting the bipolar transistor and the thyristor in parallel, for a part of the turn-off current to flow through the bipolar transistor to the cathode. A trench-type first gate electrode is preferred.

Abstract: An auxiliary cathode lead is contacted to a cathode buffer electrode which contacts to an unit GTO arranged at the most remote region from a gate pressure contacting portion of a GTO pellet and the push-into effect of the auxiliary cathode current during the turn-off can be remarkably performed. Without inviting bad affects such as the increase in "on" voltage, it is proposed a package structure of a semiconductor which the unit GTO arranged remote from a gate is easily to perform the turn-off. The maximum turn-off current can be heightened, it can easily correspond to the increase in the diameter of the pellet according to the large current of the unit element. Further, a condenser of a snubber circuit as a protection circuit of the unit GTO in a power inverter can be small, and the snubber loss can be lessened.

Abstract: The maximum controllable current of an insulated gate thyristors is improved by optimizing the length and sheet resistance of the poly-silicon constituting the gate electrodes. The device has an n.sup.- base layer with high resistivity, on the first surface of which is selectively formed a p type base region. The first source region, the second source region, and an n.sup.+ emitter region are selectively formed in the surface layer of the p type base region. The first gate electrode is formed above the exposed area of the n.sup.- base layer, and the portion of the p type base region extending between the n.sup.- base layer and the first source region. The second gate electrode is formed above the second source region, and the portion of the p type base region extending between the second source region and the emitter region. The length of the poly-silicon constituting the gate electrodes is set at 4 mm or less or the sheet resistance of the poly-silicon is set at 70 .OMEGA./.quadrature. or less.

Abstract: A plurality of segments of small-sized IGBT devices are arranged concentrically in a plurality of rows in a pellet substrate. Each segment has an independent polysilicon gate electrode layer. A gate electrode terminal lead-out portion is provided at a central portion of the pellet substrate. A metal gate electrode layer electrically connects the polysilicon gate electrode layer of at least one of the segments of a unit, which unit is constituted by at least one of the segments arranged radially from the central portion of the pellet substrate towards a peripheral portion of the pellet substrate, to the gate electrode terminal lead-out portion. The metal gate electrode layer includes a trunk wiring portion extending radially from the gate electrode terminal lead-out portion, and a branch wiring portion extending from the trunk wiring portion in a circumferential direction of the pellet substrate and electrically connected to the polysilicon gate electrode layer of each segment.

Abstract: A semiconductor switching device includes a plurality of adjacent and parallel-connected switching cells in a semiconductor substrate. Each cell includes a thyristor having a floating emitter region and a trench-gate field effect transistor (TFET) for providing turn-on and turn-off control of the thyristor. In one embodiment of the switching device, parasitic thyristor latch-up is suppressed by using a dual-channel TFET which forms both inversion-layer and accumulation-layer channel connections in series between respective floating emitter regions and the cathode contact. In another embodiment, parasitic thyristor latch-up is prevented by joining floating emitter regions of a pair of adjacent cells to thereby eliminate a parasitic P-N-P-N path between the anode and cathode contacts.

Abstract: An n-buffer layer and an n.sup.- -base layer are formed on a p.sup.+ -anode layer. A p-base layer is formed on the n.sup.- -base layer. The p-base layer has a p-type impurity layer protruding into n.sup.- -base layer. An n-cathode layer, an n.sup.+ -cathode layer and a P+-impurity layer are formed on p-base layer. First trenches are formed through p.sup.+ -impurity later, n-cathode layer and p-base layer. On-gates are formed in the first trenches. Second trenches are formed through p.sup.+ -impurity layer and n-cathode layer with their bottom surfaces located in p-type impurity layer. Off-gates are formed in the second trenches. First and second trenches are preferably formed alternately. Thereby, a voltage-driven thyristor has improved turn-on and turn-off characteristics and a high reliability.

Abstract: The semiconductor substrate of a GTO-Thyristor is structured at a cathode-side such that the cathode electrode lies in a first uppermost level of and in a second level lying there below. A gate contact lies in a third lowest level. Passivation layers extend only over the second and third levels. The cathode electrode also contacts the cathode emitter zone in the second level. It is overlapped there by the passivation layers.

Abstract: An insulated gate control thyristor including an n-type base region, an insulating layer, gates formed on the insulating layer, first and second windows formed in the insulating layer, p-type emitter layers and n-type cathode layers diffused into the base region from the first windows, and p-type collector layers diffused into the base region from the second windows. The emitter layer and the collector layer are disposed in close proximity to each other under the gate so that a channel is formed which is conducted when the thyristor is turned off. The turn-off of the thyristor speeds up and becomes reliable, and the quality control of the process steps for fabricating the thyristor becomes easier.