Abstract: A contact image sensor whose sensory elements have similar output levels is disclosed. The sensor includes: a first region consisting of a plurality of light sensory elements situated on a silicon wafer, the light sensory elements being separated from one another by an isolation material; an implanted region formed in the silicon wafer under the first region for preventing carrier from affecting the silicon wafer; a plurality of circuitry regions formed on a portion of the silicon wafer excluding the first region, the circuitry regions being separated from one another; and a light shielding region formed on the silicon wafer between the first region and the plurality of circuitry regions.

Abstract: A solid-stage imaging device has a region in which there is disposed an unwanted charge drain section 106 for receiving unwanted charges drained from vertical charge transfer sections 102 and a horizontal charge transfer section 103. A P-type well layer 302 is not disposed in the region, and a voltage is applied to an N.sup.-- -type semiconductor substrate 301 in a direction opposite to a voltage applied to the P-type well layer 302 for draining unwanted charges to the N.sup.-- -type semiconductor substrate 301. The unwanted charge drain section can be fabricated without an increase in the number of fabrication steps for manufacturing the solid-state imaging device.

Abstract: A photoelectric converter output processing system includes a photoelectric converter for converting light signals into electric output signals, a voltage storage device capable of storing a reference voltage, a voltage supply device that supplies a preset voltage, a control device that selectively couples the voltage supply device to the voltage storage device so that the voltage storage device is charged to the reference voltage when the photoelectric converter is generating one of the electric output signals and a reset reference signal, and an amplifier coupled to the photoelectric converter and the voltage storage device. The amplifier amplifies the photoelectric converter electric output signals based on the reference voltage stored in the voltage storage device. Thus, reliable CCD output amplification is achieved, starting with the first effective CCD sensor output cycle.

Abstract: A solid-state image sensing device including a light shielding film of aluminum or the like formed to make contact with a silicon substrate over a sensor region so that no insulating film is present between the substrate and the light shielding film in the periphery of an opening of the sensor region. The solid-state image sensing device further includes a potential applying device for applying a predetermined potential to the light shielding film. Accordingly, the solid-state image sensing device can reduce the smear due to the leakage of incident light through between the substrate and the light shielding film in the periphery of the opening of the sensor region and improve the photodetecting characteristics of the sensor region.

Abstract: By introducing an n-type drain implant substantially below the surface of the p-type substrate of a full frame image sensor, then enclosing the drain on the bottom and the sides with a deep p-type implant, and accumulating the surface with a shallow p-type implant, with all implantations performed through the same mask aperture, the blooming control, channel stop, and dark current suppression features of the imager are compressed, increasing the fill factor, facilitating pixel miniaturization, and therefore enabling high resolution imaging applications.

Abstract: A solid-state CCD image pick-up device includes optoelectric transducing elements corresponding to pixels vertically and horizontally arrayed in a matrix forming column linear arrays defining a column direction and at least one vertical charge transfer path associated with a corresponding adjacent column linear array. Pixel signals are vertically transferred from the column linear arrays to the vertical charge transfer paths such that gate signals occurring at predetermined times are applied to gate electrodes of the vertical charge transfer paths to permit the pixel signals to be scan read by a horizontal charge transfer path. Switching elements are provided for transfer gate electrodes and a drive circuit sequentially generates drive signals for groups of gate electrodes during periods in which the switching elements are rendered conductive to allow a full frame scan read to be performed by supplying a predetermined number of timing signals to the gate electrodes.

Abstract: It is an object of the present invention to provide a solid-state image sensing device with a vertical shutter structure allowing the size of the solid-state image sensing device with ease.An electric-charge exhausting unit is provided on the same side of a sensor array comprising a plurality of sensor units arranged to form a straight line as an electric-charge transferring unit wherein the electric-charge exhausting unit comprising an electric-charge exhaust drain having a shape resembling an island and an electric-charge exhausting gate with a bent shape surrounding the electric-charge exhaust drain is provided in such a way that the electric-charge exhausting unit is in contact with a first region of a read gate, and only one electric-charge exhausting unit is provided for each pair of sensor units adjacent to each other.

Abstract: A CCD for detecting images includes a substrate, a well region formed on the semiconductor substrate, a horizontal CCD (HCCD) formed in the well region, a photodiode region formed in the well region at a prescribed spacing from the HCCD, a channel stop layer, an impurity diffusion layer which serves as a potential barrier region around the side and lower portions of the photodiode region so as to completely separate the photodiode region from the well region, a gate insulating layer formed on the substrate, a polygate formed on the gate insulating layer above the HCCD, an insulating layer formed on portions of the gate insulating layer, and a metal shielding layer formed on the insulating layer, whereby a smear phenomenum is prevented.

Abstract: In order to eliminate film thickness nonuniformity of filters and to attain a cost reduction by simultaneously performing planarizing processes of a scribe region and a photoelectric conversion portion, in a color solid-state image pickup device which is separated into a plurality of color solid-state image pickup chips each of which consists of a photoelectric conversion portion and a peripheral circuit portion thereof formed on a semiconductor substrate, a portion of a scribe region for separating the structure on the semiconductor substrate into the color solid-state image pickup chips has a layer structure having the same layers as the photoelectric conversion portion. This invention is also applied to a chip array type color solid-state image pickup device which is constituted by arranging, on a semiconductor substrate, a plurality of color solid-state image pickup chips, each having an array of a plurality of photoelectric conversion portions.

Abstract: A method and apparatus for reducing bloom in output of a charge coupled device (CCD) image sensor is disclosed. The method includes the step of toggling at least two phases of said CCD after exposure of said CCD. The method and apparatus are particularly useful when a flash of light occurs during the exposure.

Abstract: A CCD and manufacturing method thereof is disclosed including: a first conductivity-type substrate having a convex portion; a first conductivity-type charge transmission domain formed on the substrate excluding the convex portion; a light detecting domain formed on the convex portion of the substrate and having a convex top surface; a second conductivity-type high-concentration impurity area formed on the top surface of the light detecting domain; a gate insulating layer formed on the substrate excluding the light detecting domain; a transmission gate formed on the gate insulating layer; a planarization layer formed on the substrate including the transmission gate; and a microlens formed on the planarization layer above a photodiode.

Abstract: In a drive circuit of a solid-state imaging device, no specific voltage source exclusively used to set a substrate voltage is required. An external circuit required when the entire drive circuit is fabricated as an integrated circuit, can be eliminated.

Abstract: The invention relates to a charge coupled device with a buried channel in which charge is detected by a MOST (MOS transistor) incorporated in the channel and having a surface channel of the conductivity type opposed to that of the charge coupled device. The source zone is situated in the centre of the CCD channel and is formed simultaneously with the channel bounding zone. The gate electrode comprises two portions situated on either side of the source zone, which portions, seen at the surface, do not overlap the source and drain zones. Below the gate electrode, a zone is formed of the same conductivity type as but with a higher doping than the CCD channel, which zone forms a charge storage region for the charge packet to be read out during the reading-out process. The source and drain zones are connected to the MOST channel region by means of extensions. The detector can be manufactured in a self-aligned manner, has a high charge storage capacity, a good noise behaviour, and a high speed.

Abstract: A CCD-solid state image sensor includes a sensing area for generating signal charges in response to incident light, a storage area for storing the signal charges from the sensing area, an HCCD (Horizontal Charge Coupled Device) for extracting the signal charges stored in the storage area, a high sensitivity signal charge detection and amplification circuit for detecting and amplifying signal charges of electrons from the HCCD, and a low sensitivity signal charge detection and amplification circuit for detecting and amplifying signal charges of holes from the HCCD.

Abstract: A method for producing a low capacitance floating diffusion structure used for charge to voltage conversion in a solid state image sensor having an output amplifier provided with a gate electrode, comprising the steps of: (a) growing a gate oxide on a substrate of a given conductivity type; (b) forming the gate electrode for the output amplifier on the gate oxide and patterning the gate electrode so as to create an opening through it; (c) introducing through the opening a dopant of a conductivity type opposite to the given conductivity type so as to create a floating diffusion region in the substrate; and (d) creating an ohmic contact between the floating diffusion region and the gate electrode.

Abstract: There is disclosed a solid-state imager for preventing an unwanted potential barrier in the overflow control gate when ions are implanted into the sensor portion. The imager is capable of easily controlling the amount of overflow. The sensor portion takes the hole accumulation diode (HAD) sensor structure. A potential barrier is created in the overflow control gate by ion implantation. A potential difference created between the overflow control gate and the sensor portion is determined by the amount of ions implanted. A DC voltage V.sub.D applied to the overflow drain is variable. The potential difference is adjusted by varying the DC voltage V.sub.D. Thus, elements of the imager are uniform in potential barrier.

Abstract: A charge-coupled device type solid state image pickup in which the overflow drain is formed at a high concentration on each photo-sensitive well. A high-concentration impurity layer is formed in the top layer of a PNPN structure to act as a drain against overflow. The structure enables overflow and electronic shutter operation even under low voltage conditions and may be realized on a chip.

Abstract: An improved CCD imaging array is disclosed which is capable of operating at 10,000 frames-per-second. The imager consists of an array of 512.times.512 pixels having 16 serial output channels which provides a composite output data rate up to 250 Megasamples/second. The serial output registers are constructed from peristaltic CCDs, each having a GaAs FET output circuit bump-mounted to the silicon substrate. A four-layer pinned photodiode is utilized as the photodetector, and each photodiode has its own antiblooming drain. The antiblooming gates double as an optical shuttering device. Sample-and-hold output circuitry is also provided.

Abstract: A switched CCD electrode photodetector includes a substrate made of first semi-conductor type, a drain made of a second semi-conductor type formed in the substrate, a collection well made of the second semi-conductor type formed in the substrate, and a switched CCD electrode resistor formed between the drain and the collection well. The collection well is operable in cooperation with a photosensitive region. The switched CCD electrode resistor includes a channel region defined in the substrate and having a first end disposed adjacent to the collection well and a second end disposed adjacent to the drain. The switched CCD electrode resistor also includes a first electrode insulatively spaced from and disposed over the first end and a second electrode insulatively spaced from and disposed over the second end.

Abstract: A solid state image sensing device has a photoelectric transfer section for transducing incident light into signal charges, at least firs% and second charge transfer paths, a charge transferring section for transferring the signal charges from the photoelectric transfer section to the first path at a first timing and for transferring the signal charges transferred to the first path to the second path at a second timing and a charge supply section for applying bias charges to the signal charges to be transferred from the first to the second path. In the device, bias charges supplied to the first path is transferred to the second path. Signal charges are transferred to the first path and then to the second path. The signal and the bias charges both transferred to the second path are outputted.

Abstract: A device for producing an output voltage which is proportional to an applied magnetic field. The device includes a plurality charge injection regions, a corresponding plurality of charge exit regions, and a charge transfer region. The charge transfer region includes gate electrodes which serve to propagate at least one isolated charge packet across the charge transfer region in a predetermined direction from the charge input region to the charge output region. The charge packet is subject to the applied magnetic field which is perpendicular to the charge transfer region so as to induce a resultant potential that is orthogonal to both the applied magnetic field and the predetermined direction. Furthermore, the resultant potential effects a lateral redistribution of charge carriers in the packet. A recirculation configuration allows for a recycling of the packet from the output region back to the input region in order to accommodate a continuation of the redistribution of charge carriers.

Abstract: The size of an active pixel sensor cell is reduced by utilizing a single MOS transistor formed in a well to perform the functions conventionally performed by a photogate/photodiode, a sense transistor, and an access transistor. Light energy striking the well varies the potential of the well which, in turn, varies the threshold voltage of the transistor. As a result, the current sourced by the transistor is proportional to the received light energy.

Abstract: The present invention is directed to methods and apparatus for accurately detecting light energy of a signal of interest (e.g., a laser pulse) even when the signal-to-noise ratio is relatively low. The present invention is further directed to accurate detection of a signal of interest even when either or both the signal of interest and background illumination vary across plural pixels of an imaging an array. For example, a signal of interest can be accurately detected even in the presence of pixel response non-uniformity and fixed pattern noise, or when the incident signal of interest is not confined laterally to a single pixel.

Abstract: A self aligned, lateral-overflow drain antiblooming structure that is insensitive to drain bias voltages and therefore has improved insensitivity to process variations. The length of the antiblooming barrier regions are easily adjusted and determined by photolithography. The self aligned, lateral-overflow drain (LOD) antiblooming structure results in a design that saves space, and hence, improves overall sensor performance. In this structure, an antiblooming potential barrier is provided that is smaller (in volts) than the barriers that separate the pixels from one another so that excess charge will flow preferentially into the LOD as opposed to the adjacent pixels.

Abstract: A charge coupled device (CCD) image sensor and more particularly a wiring of charge transfer electrodes of a CCD image sensor which is made suitable for improving the charge transfer efficiency of vertical charge coupled devices (VCCDs) thereof.

Abstract: A solid state image sensing device, comprises: an n-type semiconductor substrate (11), a p-type well (12) formed on a surface of the semiconductor substrate, and a p.sup.+ -type diffusion layer (13, 21) having an impurity concentration higher than that of the well. In particular, the P.sup.+ -type diffusion layer (13) is formed so as to cover at least a part of circumference of an n-type diffusion layer (17) of a load transistor (N3) formed in the well (12) as a source follower circuit. Instead, the P.sup.+ -type diffusion layer (21) is formed between the n-type diffusion layer (17) of the load transistor (N3) and the semiconductor substrate (11).

Abstract: In a solid state image sensor comprising a first impurity layer of a first conductivity type forming a photodiode, the impurity layer is composed of a first impurity region formed of a low concentration at a deep level, and a second impurity region formed of a high concentration at a shallow level. The first impurity region extends under a second impurity layer of a second conductivity type formed for device isolation, and also extends under a gate region of a transistor for transferring an electric charge from the photodiode to a CCD channel.

Abstract: In a linear sensor, a charge transfer part is disposed between a one-dimensional array of photodetectors and an overflow drain and includes a CCD having four or more transfer gates for each photodetector for transferring signal charges from the photodetector array in a direction of the photodetector array, transfer gates controlling charge transfer from the photodetectors to the CCD, and shutter gates for controlling charge transfer from the charge transfer part to the overflow drain. Each transfer gate is disposed between each photodetector and a prescribed one of the four or more transfer gates, and each shutter gate is disposed between the prescribed transfer gate and the overflow drain. The four or more CCD transfer gates are controlled by four or more phase driving clocks.

Abstract: A plurality of channel separting regions are formed on a substrate with a space therebetween to segment an channel region. A first insulating layer is formed on the substrate, and a polycrystalline silicon layer is formed thereon and is then subject to patterning so as to provide a plurality of first transfer electrodes in the direction crossing the channel separating region. A second insulating layer is formed on the first transfer electrode and on the substrate having been exposed by the patterning, and a second transfer electrodes are formed at a position between the first transfer electrodes on the second insulating layer. By setting the thickness of each transfer electrodes and the each insulating layer to a predetermined value, the interference of the visible light is controlled, and the transparency rate of the visible light is improved.

Abstract: In a drive circuit of a solid-state imaging device, no specific voltage source exclusively used to set a substrate voltage is required. An external circuit required when the entire drive circuit is fabricated as an integrated circuit can be eliminated. An image sensing system has a solid-state imaging device formed on a semiconductor body. The solid-state imaging device includes a plurality of photo sensors formed in a major surface of the semiconductor body. The photo sensors receive light incident thereon and generate charges corresponding to the incident light and accumulating the charges therein. A video signal output outputs a video signal corresponding to the accumulated charges, and a charge drain discharges charges from the photo sensors. A timing generator generates a timing signal. A first power supply source provides a first voltage to the solid-state imaging device. A second power supply source provides a second voltage to the solid-state imaging device.

Abstract: The process tracking bias generator for antiblooming structures includes a lateral overflow antiblooming drain and bias circuitry coupled to the antiblooming drain for automatically adjusting a bias for the antiblooming drain independent of process variations.

Abstract: A solid-state imaging device includes an array of photosensitive cells, each of which includes a photoelectric conversion section, which is arranged on the surface of a substrate and has a light-receiving opening. The photoelectric conversion section generates a packet of electrical carriers in response to the amount of incident light thereinto through the opening. A charge transfer section is arranged adjacent to the photoelectric conversion section on the substrate surface. This transfer section defines thereunder a transfer channel region that extends linearly in a predetermined direction in the substrate surface, and causes the carriers thus obtained to move sequentially. A light-shield section is arranged to cover the photoelectric conversion section except the opening, for preventing an incident light coming through the opening from being introduced into the transfer channel region as a leak component, by cutting off an internal reflection path of the leak component thereto.

Abstract: A solid image pick-up element comprises a semiconductor substrate, a photoelectric transfer region formed on the substrate, and an optical black region formed on the substrate. Each of the photoelectric transfer region and the optical black region includes a plurality of regularly arrayed light receiving units. A shielding film is formed on the light receiving units of the optical black region and is covered with a shielding layer. Preferably, the shielding film comprises three color filters in red, green and blue. Even if the shielding film causes light leakage, the shielding layer makes light damp, thereby reducing the occurrence of light leakage.

Abstract: The lateral overflow drain for virtual phase devices includes: a semiconductor region 72 of a first conductivity type; a drain region 24 of the first conductivity type formed in the semiconductor region 72; a threshold adjust region 22 formed in the semiconductor region 72 and surrounding the drain region 24; an electrode 20 overlying and connected to the drain region 24, the electrode 20 overlying and separated from at least a portion of the threshold adjust region 22; and virtual gates 30 and 32 of the second conductivity type in the semiconductor region 72 spaced apart from the drain region 24 and partially surrounding the drain region 24.

Abstract: A CCD type solid-state image sensor a n type silicon substrate, a first p type well formed over the substrate, photodiode regions deeply and widely formed in the first well, second p type wells formed in the first well, each of the second well being overlapped with each corresponding photodiode region and each photodiode region preceding to the corresponding photodiode region, n type VCCD channel regions respectively formed in the second wells, p type transfer gate channel regions each formed in each one of the second p type wells between each photodiode region and each corresponding VCCD channel region, p type channel stop regions respectively formed in the second wells, each of the channel stop regions being adapted to isolate each corresponding VCCD channel region from each corresponding preceding photodiode region, p type impurity regions respectively formed beneath surfaces of the photodiode regions, a thin insulating film formed over the entire exposed surface of the resulting structure, transfer gates

Abstract: A solid image pick-up element has a pixel region, an output region located near the pixel region, and a field portion located remote from the pixel region, all of which are formed at un upper layer of a semiconductor substrate. The pixel region is provided with plural rows of light receiving portions for performing photoelectric conversion with respect to light received thereby. Between the plural rows of the light receiving portions are interposed transfer portions for transferring signals obtained through the photoelectric conversion. The output region is provided with an output portion for outputting the signals transferred from the transfer portions. The semiconductor substrate is covered with three dielectric films, and an opening is formed through two dielectric films at a location above the output portion.

Abstract: It is known to reduce the leakage current or dark current in charge-coupled devices with buried channels such as, for example, charge-coupled imaging devices by bringing the surface to the inverted state. In such a device, however, it is not possible to empty the channel completely locally in usual manner in that the charge is drained off through the substrate by means of a voltage pulse applied to the gates (charge reset). To be able to carry out charge reset nevertheless, the voltage pulse is applied between the substrate and the intermediate zone interposed between the substrate and the CCD channel. Since this voltage pulse is active over the entire range of the device, the device also prevents charge from being removed in locations where this is not desired when the pulse is applied.

Abstract: A charge-transfer device contains a high-resistance p-well layer formed in the surface of an n-type semiconductor substrate. In the surface of the well layer, a charge-transfer n-channel layer, a charge storage n-channel layer, a charge release n-channel layer, and a charge release n-type drain are formed continuously. An output gate electrode is provided above the junction of the transfer channel layer and the storage channel layer, with an insulating film interposed therebetween. Provided above the release channel layer is a reset gate electrode with an insulating film interposed therebetween. In the surface of the storage channel layer, a charge-sensing p-channel layer of a charge-sensing transistor is formed. The charge-sensing channel layer is arranged so as to be in contact with neither the transfer channel layer nor the release channel layer.

Abstract: An image sensor element having at least one charge storage well 70 and 80, charge transfer structures for transferring charge from one charge storage well 70 to another charge storage well 80, and a charge sensor for sensing charge levels in a charge storage well 70 without removing the charge from the well.Other devices, systems and methods are also disclosed.

Abstract: The present invention is directed toward an image sensor array comprising a plurality of pixels. Each pixel includes a photodiode and a CCD channel region. An overflow drain region is provided adjacent the CCD channel region for extraction of excess charges. An insulated gate read-out transfer electrode is further provided above the CCD channel region and a portion of the substrate between the CCD channel region and the photodiode. Three different potentials are applied to the read-out transfer electrode for respectively storing charge in the photodiode, extracting excess charge from the photodiode while allowing signal charge to remain in the photodiode, and reading out signal charge from the photodiode.

Abstract: A frame interline transfer CCD imager is so adapted that signal charges from the photosensor are read into a vertical transfer unit and are transferred at a high transfer rate from the vertical transfer unit to a storage section. The charges from each photosensor are drained during the high transfer rate transfer so that the photosensors are unable to store the signal charges to prevent the occurrence of blooming.

Abstract: A solid state imaging apparatus which prevents occurrence of small aperture fading by diffraction of light and can control the amplitude level of an image signal within a prescribed range. The solid state imaging apparatus employs a solid state imaging element such as a CCD. When the level of an image signal outputted from the solid state imaging element exceeds a predetermined value, a driving motor is driven to effect adjustment of an iris. The capacitance of a variable capacitance diode provided in a voltage converting section of the solid state imaging element is controlled in accordance with the amplitude level of the image signal to control the voltage conversion efficiency of the voltage converting section of the solid state imaging element so as to fix the level of the image signal.

Abstract: A solid-state image sensing device includes a semiconductive substrate, an array of photosensitive cells on the substrate, and a transfer section electrically coupled with the array on the substrate, for transferring electrical carriers read from the cells along a predetermined direction. During an image sensing operation, a packet of charge carriers photoelectrically generated in the cells are prevented from continuously staying therein, by forcing the carriers to move into the transfer section, thus causing these carriers to be stored in the transfer section.

Abstract: A solid state imaging device of the present invention includes: a semiconductor substrate of one conductive type; a well layer made of a semiconductor of the other conductive type formed on the semiconductor substrate; a photodetecting portion made of a semiconductor of one conductive type formed in an upper portion of the well layer; a high concentration semiconductor layer made of the other conductive type formed in an upper portion of the photodetecting portion; a first region of one conductive type formed in an upper portion of the semiconductor substrate, being in contact with the well layer and positioned at least below the photodetecting portion, having higher concentration than the semiconductor substrate; and a second region of the other conductive type formed in a lower portion of the well layer, being in contact with the semiconductor substrate and positioned on the first region.

Abstract: An image sensing device with electronic shutter having a semiconductor substrate of a first conductivity type and a buried channel layer of a second conductivity type disposed on the substrate. Virtual phase electrodes in the buried channel layer having the first conductivity type form virtual gate potential areas in the substrate below the virtual phase electrodes. An insulating layer is formed on the substrate. Conductive electrodes disposed on the insulating layer and located over portions of the substrate between the virtual phase electrodes form clocked gate potential areas in the substrate below the conductive electrodes. The virtual gate potential areas and the clocked gate potential areas form charge transfer columns along which charge can be transferred to an end of the charge transfer column.

Abstract: It is known to bring the surface into the inverted state in CCD imaging devices with buried channels during the integration period in order to keep the dark current low (All Gates Pinning). The desired potential profile, with wells in which the charge is integrated bounded by potential beers, is obtained through the use of a two-phase structure with a doping profile in the channel or with a gate oxide having thickness differences. Owing to limiting conditions which hold for the clock voltages used for charge transport, serious limitations are imposed on the depth of the potential wells and thus also on the charge storage capacity of the pixels. This disadvantage is counteracted by the operation of the device not as a two-phase but, for example, as a four-phase CCD according to the invention, whereby a d.c. shift is present between the clock voltages for compensating the built-in, comparatively great potential differences described above.

Abstract: A charge transfer device and a solid state image sensor using the same, capable of transferring signal charge at a high signal to noise ratio (S/N ratio) and preventing an occurrence of dark current. They include a double-layered charge transfer path structure provided by forming a surface channel region on a buried channel region formed in a semiconductor substrate, the surface channel region having a conductivity opposite to that of the buried channel region. The surface channel region of the doubled-layered structure is used for accumulating dark current generated from boundary surfaces between the substrate and a gate insulating film, whereas the buried channel region is used for transferring optical signal charge. Where minus and/or plus drive voltages are applied to the transfer electrodes, there is no increase in dark current, in accordance with the present invention. The quantity of transferred signal charge can be greatly increased.

Abstract: There is provided a solid state imaging device having high-sensitivity, low-noise characteristics by reducing electrostatic capacity relating to interconnection. The solid state imaging device includes a photoelectric conversion section, a transfer section, a floating diffusion layer for receiving signal charges from the transfer section, and an output transistor having a gate electrode connected to the floating diffusion layer via an interconnection. A source and a drain of the output transistor are provided commonly within a flat p-type well of relatively thin concentration in which the photoelectric conversion section, the transfer section, and the floating diffusion layer are also provided.

Abstract: A CCD image sensor comprising: a semiconductor substrate of a first conductivity type connected to a ground; an impurity region of a second conductivity type formed in the surface of the semiconductor substrate of the first conductivity type, to serve as a blooming prevention layer; an impurity region of the first conductivity type formed in the surface of the semiconductor substrate, so that it encloses the impurity region of the second conductivity type serving as a blooming prevention layer, to serve as a potential barrier layer; an impurity region of the second conductivity type formed in the surface of the semiconductor substrate of the first conductivity type so that it encloses the impurity region of the first conductivity type serving as a potential barrier layer, to serve as a light receiving region; an insulation film which is formed on the surface of the semiconductor substrate of the first conductivity type and has contact holes at both edges of the impurity region of the second conductivity type,

Abstract: Solid-state image sensors, in general, comprise a photodetector for detecting radiation from the image and converting the radiation to charge carriers, and transfer means for carrying the charge carriers to an output circuit. One type of solid-state image sensor uses a CCD as both the photodetector and the transfer means. The solid-state image sensor generally includes a plurality of the CCD's arranged in spaced parallel relation to form an array. The image sensor of this disclosure utilizes only one antiblooming lateral overflow barrier. The excess signal charge of phase 1 flows into the preceding phase 2 and is saved. This eliminates the overflow barrier of phase 1 so that blooming protection is via the overflow barrier of the preceding phase 2. This results in an image sensor with blooming protection and increased charge capacity.