With Particular Layer Thickness (e.g., Layer Less Than Light Absorption Depth) Patents (Class 257/464)
  • Patent number: 7601910
    Abstract: The present invention generally relates to organic photosensitive optoelectronic devices. More specifically, it is directed to organic photovoltaic devices, e.g., organic solar cells. Further, it is directed to an optimized organic solar cell comprising multiple stacked subcells in series. High power conversion efficiency are achieved by fabrication of a photovoltaic cell comprising multiple stacked subcells with thickness optimization and employing an electron blocking layer.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: October 13, 2009
    Assignee: The Trustees of Princeton University
    Inventors: Stephen R. Forrest, Aharon Yakimov
  • Publication number: 20090250780
    Abstract: The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side and an architecture that enables the laser step to be the final step or a late step in the fabrication process. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.
    Type: Application
    Filed: March 6, 2009
    Publication date: October 8, 2009
    Applicant: SIONYX, INC.
    Inventor: Neal T. Kurfiss
  • Patent number: 7586108
    Abstract: The invention relates to a radiation detector, a method of manufacturing a radiation detector and a lithographic apparatus comprising a radiation detector. The radiation detector has a radiation-sensitive surface. The radiation-sensitive surface is sensitive for radiation with a wavelength between 10-200 nm. The radiation detector has a silicon substrate, a dopant layer, a first electrode and a second electrode. The silicon substrate is provided in a surface area at a first surface side with doping profile of a certain conduction type. The dopant layer is provided on the first surface side of the silicon substrate. The dopant layer has a first layer of dopant material and a second layer. The second layer is a diffusion layer which is in contact with the surface area at the first surface side of the silicon substrate. The first electrode is connected to dopant layer. The second electrode is connected to the Silicon substrate.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: September 8, 2009
    Assignee: ASML Netherlands B.V.
    Inventors: Stoyan Nihtianov, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Josephus Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Scholtes
  • Patent number: 7579668
    Abstract: A method for photo-detecting and an apparatus for the same are provided. The apparatus for photo-detecting includes a first P-N diode and a second P-N diode. The first P-N diode, has a first P-N junction which has a first thickness, by which a first electrical signal is generated when irradiated by light, and the second P-N diode has a second P-N junction which has a second thickness, by which a second electrical signal is generated when irradiated by light. The second thickness is larger than the first thickness and an operation of the first electrical signal and the second electrical signal is proceeded for obtaining a third electrical signal.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: August 25, 2009
    Assignee: National Taiwan University
    Inventors: Chee-Wee Liu, Chun-Hung Lai, Meng-kun Chen, Wei-Shuo Ho
  • Patent number: 7573113
    Abstract: A pinned photodiode with an ultra-shallow highly-doped surface layer of a first conductivity type and a method of formation are disclosed. The ultra-shallow highly-doped surface layer has a thickness of about 100 Angstroms to about 500 Angstroms and a dopant concentration of about 5×1017 atoms per cm3 to about 1×1019 atoms per cm3. The ultra-shallow highly-doped surface layer is formed by diffusion of ions from a doped layer into the substrate or by a plasma doping process. The ultra-shallow pinned layer is in contact with a charge collection region of a second conductivity type.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: August 11, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard E. Rhodes, Richard A. Mauritzson
  • Patent number: 7557368
    Abstract: A semiconductor photodetector (1) for detecting short duration laser light pulses of predetermined wavelength in a light signal (2) comprises a micro-resonator (3) of vertical Fabry-Perot construction having a Bragg mirror pair, namely, a front mirror (5) and a rear mirror (6) with an active region (8) located between the front and rear mirrors (5,6). An N-type substrate (11) supports the rear mirror (6). The light signal (2) is directed into the active region (8) through the front mirror (5) while a pump beam (17) is directed into the active region (8) at an end (18) thereof. The spacing between the front and rear mirrors (5,6) is such as to cause light of the predetermined wavelength to resonate between the mirrors (5,6).
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: July 7, 2009
    Assignee: The Provost, Fellows and Scholars of the College of the Holy and Undivided Trinity of Queen Elizabeth Near Dublin
    Inventors: John Hegarty, Liam Paul Barry, Herve Armel Francois Folliot, James Christopher O'Gorman
  • Patent number: 7554170
    Abstract: A photosensor includes a plurality of photosensitive regions including a first photosensitive region connected to a first voltage reference, and at least one additional photosensitive region. A signal collector is connected to the first photosensitive region. At least one switching device is for switching the at least one additional photosensitive region between the first voltage reference and a second voltage reference that is less than the first voltage reference, and for reversibly connecting the at least one additional photosensitive region to the signal collector so that the photosensor is variably responsive to different light levels.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: June 30, 2009
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Jeffrey Raynor
  • Patent number: 7547608
    Abstract: A method is provided for forming a polysilicon layer on a substrate and aligning an exposure system with an alignment feature of the substrate through the polysilicon layer. In such method, a polysilicon layer is deposited over the substrate having the alignment feature such that the polysilicon layer reaches a first temperature. The polysilicon layer is then annealed with the substrate to raise the polysilicon layer to a second temperature higher than the first temperature. A photoimageable layer is then deposited over the polysilicon layer, after which an alignment signal including light from the alignment feature is received through the annealed polysilicon layer. Using the alignment signal passing through the annealed polysilicon layer from the alignment feature, an exposure system is aligned with the substrate with improved results.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: June 16, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Johnathan E. Faltermeier, James P. Norum
  • Patent number: 7544884
    Abstract: A method of manufacturing improved thin-film solar cells entirely by sputtering includes a high efficiency back contact/reflecting multi-layer containing at least one barrier layer consisting of a transition metal nitride. A copper indium gallium diselenide (Cu(InxGa1-x)Se2) absorber layer (X ranging from 1 to approximately 0.7) is co-sputtered from specially prepared electrically conductive targets using dual cylindrical rotary magnetron technology. The band gap of the absorber layer can be graded by varying the gallium content, and by replacing the gallium partially or totally with aluminum. Alternately the absorber layer is reactively sputtered from metal alloy targets in the presence of hydrogen selenide gas. RF sputtering is used to deposit a non-cadmium containing window layer of ZnS. The top transparent electrode is reactively sputtered aluminum doped ZnO. A unique modular vacuum roll-to-roll sputtering machine is described.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: June 9, 2009
    Assignee: Miasole
    Inventor: Dennis R. Hollars
  • Patent number: 7538404
    Abstract: An optical semiconductor device includes a first light receiving region and a second light receiving region provided on a substrate and the first and second light receiving regions include light receiving elements, respectively. A first anti-reflection film is formed in the first light receiving region of the substrate and a second anti-reflection film is formed in the second light receiving region of the substrate. The reflectance of the first anti-reflection film for a first wavelength range of light is lower than the reflectance of the second anti-reflection film for the first wavelength range of light and the reflectance of the second anti-reflection film for a second wavelength range of light which is different from the first wavelength range of light is lower than the reflectance of the first anti-reflection film for the second wavelength range of light.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: May 26, 2009
    Assignee: Panasonic Corporation
    Inventors: Tsutomu Miyajima, Takaki Iwai, Hisatada Yasukawa
  • Patent number: 7535073
    Abstract: To provide a back-illuminated type solid-state imaging device capable of color separation of pixels without using a color filter, and a camera module and an electronic equipment module which incorporate the solid-state imaging device. A solid-state imaging device including: a photoelectric conversion element PD formed in a semiconductor substrate 22; a reading-out part which reads out signal charges from the photoelectric conversion element PD formed on one surface side of the semiconductor substrate 22; the other surface of the semiconductor substrate 22 made to a light incidence surface; and a pixel which exclusively makes light of a specific wavelength or longer photoelectrically converted, by adjusting pn junction depths h2 [h2 r, h2 g, h2 b] between the photoelectric conversion element PD and an accumulation layer 28 on the light incidence surface side. A camera module and an electronic equipment module which incorporate the solid-state imaging device.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: May 19, 2009
    Assignee: Sony Corporation
    Inventor: Takayuki Ezaki
  • Patent number: 7504702
    Abstract: In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: March 17, 2009
    Assignee: President & Fellows of Harvard College
    Inventors: Eric Mazur, James Edward Carey, III
  • Patent number: 7504665
    Abstract: A semiconductor optical device (e.g. a resonant cavity device in this form of an LED or a laser) comprises a single substrate arranged for emitting light (O) for incidence on a sample or other element and also responsive to light (D), e.g. of a different wavelenght, received back from this sample or other element: the device further comprises means for monitoring a characteristic (e.g. its current-voltage characteristic) which varies in dependence upon the light (D) received back from the sample or other element.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: March 17, 2009
    Assignee: University College Cardiff Consultants, Ltd.
    Inventor: Huw David Summers
  • Patent number: 7493713
    Abstract: An image sensor and related method of fabrication are disclosed. The image sensor comprises a plurality of photoelectric conversion regions disposed in a predetermined field of a semiconductor substrate, color filters arranged on the photoelectric conversion regions, and a reflection protection structure disposed between the photoelectric conversion regions and the color filters. The reflection protection structure comprises portions having different thicknesses in relation to the color filters.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: February 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young-Hoon Park
  • Publication number: 20080296642
    Abstract: The present invention provides a photodiode comprising a first silicon semiconductor layer formed over an insulating layer, a second silicon semiconductor layer formed over the insulating layer, having a thickness ranging from greater than or equal to 3 nm to less than or equal to 36 nm, a low-concentration diffusion layer which is formed in the second silicon semiconductor layer and in which an impurity of either one of a P type and an N type is diffused in a low concentration, a P-type high-concentration diffusion layer which is formed in the first silicon semiconductor layer and in which the P-type impurity is diffused in a high concentration, and an N-type high-concentration diffusion layer which is opposite to the P-type high-concentration diffusion layer with the low-concentration diffusion layer interposed therebetween and in which the N-type impurity is diffused in a high concentration.
    Type: Application
    Filed: February 26, 2008
    Publication date: December 4, 2008
    Applicant: Oki Electric Industry Co., Ltd.
    Inventor: Noriyuki Miura
  • Patent number: 7402886
    Abstract: Self-aligned trench filling is used to isolate devices in high-density integrated circuits. A deep, narrow trench isolation region is formed in a substrate between devices. The trench region includes two trench portions. A first trench portion, located above a second trench portion, is filled with a deposited dielectric. The second trench portion is filled with a grown dielectric. Filling the lower trench portion by growing a dielectric material provides for an even distribution of dielectric material within the lower portion. Filling the upper trench portion by depositing a dielectric material provides for an even distribution of material in the upper portion while also protecting against encroachment of the dielectric into device channel regions, for example. Devices can be fabricated by etching the substrate to form the trench region after or as part of etching one or more layers formed above the substrate for the device.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: July 22, 2008
    Assignee: SanDisk Corporation
    Inventor: Jack H. Yuan
  • Patent number: 7400022
    Abstract: A photoreceiver cell with separation of color components of light incident to its surface, formed in a silicon substrate of the conductivity of the first type with an ohmic contact and comprising: the first, second and third regions, which have mutual positioning and configuration, which provide formation of the first and the second channels for diffusion of the secondary charge carriers generated in the substrate regions located under the first and the second potential barriers to the first and the third p-n junctions respectively; in this case, the length of the channels does not exceed the diffusion length of the secondary charge carriers. A technical result of the present invention is an increase in spatial resolution of the projected image and its dynamic range. Another technical result of the present invention is a decrease in the photo-cell area. A photoreceiver cell with color separation may find broad application in multielement photoreceivers for video cameras and digital cameras.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: July 15, 2008
    Assignee: Unique IC's
    Inventors: Yuriy Ivanovitch Tishin, Victor Alexandrovitch Gergel, Vladimir Alexandrovitch Zimoglyad, Igor Valerievitch Vanushin, Andrey Vladimirovitch Lependin
  • Patent number: 7385272
    Abstract: An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable descriptions of the circuit.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: June 10, 2008
    Assignee: ESS Technology, Inc.
    Inventors: Zeynep Toros, Richard Mann, Selim Bencuya
  • Patent number: 7382007
    Abstract: A solid-state image pickup device includes, in a substrate, a plurality of photoelectric conversion regions for subjecting incoming light to photoelectric conversion, a reading gate for reading a signal charge from the photoelectric conversion regions, and a transfer register (vertical register) for transferring the signal charge read by the reading gate. Therein, a groove is formed on the surface side of the substrate, and the transfer register and the reading gate are formed at the bottom part of the groove. With such a structure, in the solid-state image pickup device, reduction can be achieved for the smear characteristics, a reading voltage, noise, and others.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: June 3, 2008
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Nobuhiro Karasawa, Jun Kuroiwa, Hideshi Abe, Mitsuru Sato, Hiroaki Ohki
  • Publication number: 20080105944
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; and an image sensor formed in the semiconductor layer.
    Type: Application
    Filed: March 6, 2007
    Publication date: May 8, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Wei Chang, Han-Chi Liu, Chun-Yao Ko, Shou-Gwo Wuu
  • Patent number: 7307210
    Abstract: In a solar cell, at least one of reinforcing material and buffering material is provided at least partially on at least one of a back surface, a front surface and a side surface of the solar cell. With these reinforcing material and/or buffering material, occurrence of cell fracture due to load imposed by external force can be decreased.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: December 11, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junzou Wakuda, Masaomi Hioki, Satoshi Tanaka, Tomohiro Machida, Kunio Kamimura, Tatsuo Saga, Takashi Tomita
  • Patent number: 7291782
    Abstract: Charge-splitting networks, optoelectronic devices, methods for making optoelectronic devices, power generation systems utilizing such devices and method for making charge-splitting networks are disclosed. An optoelectronic device may include a porous nano-architected (e.g., surfactant-templated) film having interconnected pores that are accessible from both the underlying and overlying layers. A pore-filling material substantially fills the pores. The interconnected pores have diameters of about 1-100 nm and are distributed in a substantially uniform fashion with neighboring pores separated by a distance of about 1-100 nm. The nano-architected porous film and the pore-filling, material have complementary charge-transfer properties with respect to each other, i.e., one is an electron-acceptor and the other is a hole-acceptor. The nano-architected porous, film may be formed on a substrate by a surfactant temptation technique such as evaporation-induced self-assembly.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: November 6, 2007
    Assignee: Nanosolar, Inc.
    Inventors: Brian M. Sager, Martin R. Roscheisen, Klaus Petritsch, Greg Smestad, Jacqueline Fidanza, Gregory A. Miller, Dong Yu
  • Patent number: 7265431
    Abstract: A semiconductor wafer may be coated with an imageable anti-reflective coating. As a result, the coating may be removed using the same techniques used to remove overlying photoresists. This may overcome the difficulty of etching anti-reflective coatings using standard etches because of their poor selectivity to photoresist and the resulting propensity to cause integrated circuit defects arising from anti-reflective coating remnants.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: September 4, 2007
    Assignee: Intel Corporation
    Inventor: Swaminathan Sivakumar
  • Patent number: 7250665
    Abstract: An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable descriptions of the circuit.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: July 31, 2007
    Assignee: ESS Technology, Inc.
    Inventors: Zeynep Toros, Richard Manrt, Selim Bencuya
  • Patent number: 7227066
    Abstract: Methods for passivating crystalline grains in an active layer for an optoelectronic device and optoelectronic devices having active layers with passivated crystalline grains are disclosed. Crystalline grains of an active layer material and/or window layer material are formed within the nanotubes of an insulating nanotube template. The dimensions of the nanotubes correspond to the dimensions of a crystalline grain formed by the deposition technique used to form the grains. A majority of the surface area of these grains is in contact with the wall of the nanotube template rather than with other grains.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: June 5, 2007
    Assignee: Nanosolar, Inc.
    Inventors: Martin R. Roscheisen, Brian M. Sager
  • Patent number: 7202511
    Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: April 10, 2007
    Assignee: DRS Sensors & Targeting Systems, Inc.
    Inventors: Maryn G. Stapelbroek, Henry H. Hogue, Arvind I. D'Souza
  • Patent number: 7187050
    Abstract: A cubic element of photonic crystal is integrally formed on the surface of a photo-detection element, and a portion of the photonic crystal cubic element is irradiated with ultraviolet rays thereby to change the refractive index of the portion of the cubic element that has been irradiated with ultraviolet rays. Alternatively, by causing globular particles having different refractive indices to eject on the surface of the photo-detection element from an ink-jet apparatus having a nozzle provided with a temperature control part by controlling temperature of the nozzle to form a laminate of globular particle layers having different refractive indices, a photonic crystal lens is integrally formed on the surface of the photo-detection element.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: March 6, 2007
    Assignee: Japan Aviation Electronics Industry Limited
    Inventors: Akiko Suzuki, Akinobu Sato
  • Patent number: 7157641
    Abstract: A bi-layer photovoltaic cell, and method (100) of making same, with an electric field applied at the p-n heterojunction interface. The cell includes a first semiconductor layer including a binder, nanocrystals of an n-type semiconductor, and spatially bound cations and a second semiconductor layer contacting the first semiconductor layer that includes a binder, nanocrystals of a p-type semiconductor, and spatially bound anions. The cell further includes a p-n heterojunction at the contacting interface between the first and second semiconductor layers. An electric field is created by the spatially bound cations and anions that are located in the layers proximal to the p-n heterojunction. The nanocrystals are single crystals of organic semiconductors that are less than 50 nanometers in size and that comprise a majority of the volume of their respective layers. The binder is a polymer matrix, such as an epoxy. The cell includes electrical contacts abutting the semiconductor layers.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: January 2, 2007
    Assignee: Midwest Research Institute
    Inventor: Brian A Gregg
  • Patent number: 7151305
    Abstract: In a photoelectric conversion device including a first-conductivity type first semiconductor region located in a pixel region, a second-conductivity type second semiconductor region provided in the first semiconductor region, and a wiring for electrically connecting the second semiconductor region to a circuit element located outside the pixel region, a shield is provided on the light-incident side of the wiring, via an insulator in such a way that it covers at least part of the wiring and also the shield includes a conductor whose potential stands fixed. This photoelectric conversion device may hardly be affected with low-frequency radiated noises as typified by power-source noise.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: December 19, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Takahiro Kaihotsu
  • Patent number: 7122733
    Abstract: The present invention provides a solar cell comprising a substrate, a first buffer layer disposed above the base layer, a second buffer layer disposed above the first buffer layer, a first boron compound layer disposed above the second buffer layer, a second boron compound layer disposed above the first compound layer, and a window layer disposed above the second compound layer, wherein the first compound layer comprises a first type of doping, wherein the second compound layer comprises a second type of doping, wherein the second buffer layer comprises a higher energy bandgap than the first compound layer, and wherein the first buffer layer and the second buffer layer permit a boron content in the first compound layer and the second compound layer to be greater than 3 %.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: October 17, 2006
    Assignee: The Boeing Company
    Inventors: Authi A. Narayanan, Joel A. Schwartz
  • Patent number: 7071524
    Abstract: A lower cladding layer is laminated on a substrate and constituted of at least one layer. A light absorption layer is laminated on the lower cladding layer. An upper cladding layer is laminated above the light absorption layer and constituted of at least one layer. A light incident end surface is provided on at least one of the substrate and the lower cladding layer, and, when a light is made incident at a predetermined angle, enables the light to be absorbed in the light absorption layer and to be output as a current. An equivalent refractive index of the at least one of the substrate and the lower cladding layer is larger than that of the upper cladding layer. The predetermined angle is an angle enabling a light incident into the light absorption layer to be reflected at a lower surface of the upper cladding layer.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: July 4, 2006
    Assignee: Anristsu Corporation
    Inventors: Kenji Kawano, Hiroaki Yoshidaya, Jun Hiraoka, Yuichi Sasaki
  • Patent number: 7064263
    Abstract: A stacked photovoltaic device comprises at least three p-i-n junction constituent devices superposed in layers, each having a p-type layer, an i-type layer and an n-type layer which are formed of silicon non-single crystal semiconductors. An amorphous silicon layer is used as the i-type layer of a first p-i-n junction, a microcrystalline silicon layer is used as the i-type layer of a second p-i-n junction and a microcrystalline silicon layer is used as the i-type layer of a third p-i-n junction, the first to third layers being in order from the light incident side. In this way, a stacked photovoltaic device can be provided which is practical and low-cost and yet has high reliability and high photoelectric conversion efficiency.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: June 20, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masafumi Sano, Tetsuro Nakamura
  • Patent number: 7057255
    Abstract: A photodiode (PD chip) includes a substrate, an absorption layer, a p-n junction in the absorption layer, a passivation film for protecting the end of the p-n junction, a p-electrode, and an n-electrode. The passivation film is covered with a protective layer composed of an insulative resin and having a thickness larger than that of the passivation film such that the passivation film of the PD chip fixed to the Si wafer and hence the p-n junction are not damaged or contaminated when an Si wafer including a number of horizontally and vertically arranged chip units, each having a V-groove for fixing an optical fiber, a marker, and a metallized pattern, is diced. Thus, a low-cost optical receiver module that does not generate dark current can be produced.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: June 6, 2006
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naoyuki Yamabayashi, Yoshiki Kuhara
  • Patent number: 7057256
    Abstract: In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: June 6, 2006
    Assignee: President & Fellows of Harvard College
    Inventors: James Edward Carey, III, Eric Mazur
  • Patent number: 7053294
    Abstract: A thin-film solar cell (10) is provided. The thin-film solar cell (10) comprises a flexible metallic substrate (12) having a first surface and a second surface. A back metal contact layer (16) is deposited on the first surface of the flexible metallic substrate (12). A semiconductor absorber layer (14) is deposited on the back metal contact. A photoactive film deposited on the semiconductor absorber layer (14) forms a heterojunction structure and a grid contact (24) deposited on the heterjunction structure. The flexible metal substrate (12) can be constructed of either aluminium or stainless steel. Furthermore, a method of constructing a solar cell is provided. The method comprises providing an aluminum substrate (12), depositing a semiconductor absorber layer (14) on the aluminum substrate (12), and insulating the aluminum substrate (12) from the semiconductor absorber layer (14) to inhibit reaction between the aluminum substrate (12) and the semiconductor absorber layer (14).
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: May 30, 2006
    Assignee: Midwest Research Institute
    Inventors: John R. Tuttle, Rommel Noufi, Falah S. Hasoon
  • Patent number: 7045205
    Abstract: A nanostructured apparatus may include a mesoporous template having an array of regularly-spaced pores. One or more layers of material may conformally coat the walls to a substantially uniform thickness. Such an apparatus can be used in a variety of devices including optoelectronic devices, e.g., light emitting devices (such as LEDs, and lasers) and photovoltaic devices (such as solar cells) optical devices (luminescent, electro-optic, and magnetooptic waveguides, optical filters, optical switches, amplifies, laser diodes, multiplexers, optical couplers, and the like), sensors, chemical devices (such as catalysts) and mechanical devices (such as filters for filtering gases or liquids).
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: May 16, 2006
    Assignee: Nanosolar, Inc.
    Inventor: Brian M. Sager
  • Patent number: 7026702
    Abstract: Systems and methodologies for fabrication of a memory cell or array are disclosed. The memory cell employs a functional zone with passive and active layers. Such passive and active layers facilitate electron migration, and allow a plurality of states for the memory cell. A memory device formed in accordance with the disclosed methodology can include a top-electrode formed over the functional layer, which in turn over lays a lower conductive layer.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: April 11, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Juri Heinrich Krieger, Nikolay Fedorovich Yudanov
  • Patent number: 7002156
    Abstract: A detection system for detecting gamma rays including a scintillator crystal for receiving at least one gamma ray and generating at least one ultraviolet ray and an avalanche photodiode for detecting the ultraviolet ray. The avalanche photodiode includes: a substrate having a first dopant; a first layer having a second dopant, positioned on top of the substrate; a passivation layer for providing electrical passivation on a surface of the avalanche photodiode; a phosphorous silicate glass layer for limiting mobile ion transport, positioned above of the first layer; and a pair of metal electrodes for providing an ohmic contact wherein a first electrode is positioned below the substrate and a second electrode is positioned above the first layer. The avalanche photodiode comprises a first sidewall and a second sidewall forming a sloped mesa shape.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: February 21, 2006
    Assignee: General Electric Company
    Inventors: Peter M. Sandvik, Dale M. Brown, Stephen D. Arthur, Kevin S. Matocha, James W. Kretchmer
  • Patent number: 6995444
    Abstract: Photodetector device comprising a semiconductor substrate (1) of a first type of conductivity connected to a first electrode (2). Said substrate comprises an active area (4) made up of different semiconductor regions of a second type of conductivity (8, 9, 10) insulated from each other and connected to respective second electrodes (13, 14, 15) so that each of them can be connected separately from the others to an appropriate bias voltage. By regulating the bias voltages applied to these regions the function of optic diaphragm of the device can be controlled. The device works without needing any form of optical insulation between the different regions of the active area and always uses the same single output electrode for the signal in all the different situations of diaphragm adjustment.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: February 7, 2006
    Assignee: Carl Zeiss Jena GmbH
    Inventors: Sergio Cova, Franco Zappa, Massimo Ghioni, Robert Grub, Eberhard Derndinger, Thomas Hartmann
  • Patent number: 6963120
    Abstract: A photovoltaic element is provided which has a high conversion efficiency, a low-cost producibility, a light weight and good overall characteristics in a final product form with a transparent protective member. The photovoltaic element comprises a first pin junction comprising an i-type amorphous semiconductor, a second pin junction comprising an i-type microcrystalline semiconductor, and a third pin junction comprising an i-type microcrystalline semiconductor provided in the mentioned order from a light incidence side, wherein at least a transparent protective member and a transparent electrode layer are provided on the light incidence side of the first pin junction, and wherein of the photocurrents generated at the plurality of pin junctions, the photocurrent generated at the third pin junction is the smallest.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: November 8, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsushi Shiozaki, Shuichiro Sugiyama
  • Patent number: 6949809
    Abstract: A light receiving element, comprising a semiconductor structure comprising at least a first conductivity type semiconductor layer, a first, second conductivity type semiconductor layer provided on the first conductivity type semiconductor layer in the semiconductor structure, a second, second conductivity type semiconductor layer having an impurity concentration lower than that of the first, second conductivity type semiconductor layer, a second, first conductivity type semiconductor layer provided on the second, second conductivity type semiconductor layer, or a second, first conductivity type semiconductor layer provided within the second, second conductivity type semiconductor layer.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: September 27, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takahiro Takimoto, Isamu Ohkubo, Masaru Kubo, Hiroki Nakamura, Toshihiko Fukushima, Toshifumi Yoshikawa
  • Patent number: 6946597
    Abstract: Photovoltaic devices, such as solar cells, and methods for their manufacture are disclosed. A device may be characterized by an architecture where two more materials having different electron affinities are regularly arrayed such that their presence alternates within distances of between about 1 nm and about 100 nm. The materials are present in a matrix based on a porous template with an array of template pores. The porous template is formed by anodizing a layer of metal. A photovoltaic device may include such a porous template disposed between a base electrode and a transparent conducting electrode. A first charge-transfer material fills the template pores, A second (complementary) charge-transfer material fills additional space not occupied by the first charge-transfer material.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: September 20, 2005
    Assignee: Nanosular, Inc.
    Inventors: Brian M. Sager, Martin R. Roscheisen, Klus Petritsch, Karl Pichler, Jacqueline Fidanza, Dong Yu
  • Patent number: 6933436
    Abstract: A photovoltaic cell is described, having a photoactive layer (4) made of two molecular components, namely an electron donor and an electron acceptor, particularly a conjugated polymer component and a fullerene component, and having two metallic electrodes (2, 5) provided on both sides of the photoactive layer (4). In order to provide advantageous construction ratios, it is suggested that an electrically insulating transition layer (6), having a thickness of at most 5 nm, be provided between at least one electrode (5) and the photoactive layer (4).
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: August 23, 2005
    Assignee: Konarka Austria Forschungs und Entwicklungs GmbH
    Inventors: Sean Shaheen, Christoph Brabec, Thomas Fromherz, Franz Padinger, Sedar Sariciftci, Erhard Gloetzl
  • Patent number: 6933585
    Abstract: The invention concerns a color image sensor that can be used to make a miniature camera, and a corresponding method for making this sensor. The image sensor comprises a transparent substrate (40) on the upper part of which are superimposed, successively, a mosaic of color filters (18), a very thin silicon layer (30) comprising photosensitive zones, and a stack of conductive layers (14) and insulating layers (16) defining image detection circuits enabling the collection of the electrical charges generated by the illumination of the photosensitive zones through the transparent substrate. The manufacturing method consists in producing the photosensitive circuits on a silicon wafer, transferring said wafer on to a temporary substrate, thinning the wafer down to a thickness of about three to 30 micrometers, depositing color filters on the surface of the remaining silicon layer and transferring the structure to a permanent transparent substrate and eliminating the temporary substrate.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: August 23, 2005
    Assignee: Atmel Grenoble S.A.
    Inventors: Louis Brissot, Eric Pourquier
  • Patent number: 6930330
    Abstract: A silicon optoelectronic device and a light-emitting apparatus using the silicon optoelectronic device are provided. The silicon optoelectronic device includes: a substrate based on an n-type or p-type silicon; a doped region formed on one surface of the substrate and doped to an ultra-shallow depth with a predetermined dopant to be an opposite type from that of the substrate to provide a photoelectrical conversion effect by quantum confinement in a p-n junction between the doped region and the substrate; and first and second electrodes formed on the substrate to be electrically connected to the doped region. The silicon optoelectronic device may further include a control layer formed on one surface of the substrate to act as a mask in forming the doped region and to limit the depth of the doped region to be ultra-shallow. The silicon optoelectronic device has excellent efficiency and can be used as either a light-emitting device or a light-receiving device.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: August 16, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-lyong Choi, Seung-ho Nam, Eun-kyung Lee, Jae-ho You, Jun-young Kim
  • Patent number: 6909160
    Abstract: A semiconductor light-receiving module includes a semiconductor light-receiving element and an incident light direction device. The semiconductor light-receiving element includes a substrate, at least a light absorbing layer and an upper cladding layer formed sequentially on the substrate, a light incident facet formed at least at one facet of the substrate and the light absorbing layer, and electrodes which output an electric signal generated by absorption of the light entering from the light incident facet in the light absorbing layer. The incident light direction device directs to irradiate the light obliquely to the light incident facet of the semiconductor light-receiving element, and to cause at least part of the light to irradiate the light absorbing layer at the light incident facet.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: June 21, 2005
    Assignee: Anritsu Corporation
    Inventors: Kenji Kawano, Hiroaki Yoshidaya, Jun Hiraoka, Yuichi Sasaki, Eiji Kawazura, Satoshi Matsumoto
  • Patent number: 6909161
    Abstract: A photodiode has an optical absorption layer composed of a depleted first semiconductor optical absorption layer with a layer width WD and a p-type neutral second semiconductor optical absorption layer with a layer width WA. The ratio between WA and WD is set such that the total carrier transit time ?tot becomes minimum in the optical absorption layer. The photodiode can further include a depleted semiconductor optical transmission layer with a bandgap greater than that of the first semiconductor optical absorption layer, between the first semiconductor optical absorption layer and an n-type semiconductor electrode layer.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: June 21, 2005
    Assignee: NTT Electronics Corporation
    Inventors: Tadao Ishibashi, Yukihiro Hirota, Yoshifumi Muramoto
  • Patent number: 6853046
    Abstract: A photodiode array comprises a semiconductor substrate formed with an array of a plurality of pn junction type photodiodes on a light incident surface side, the surface opposite from the incident surface in the semiconductor substrate being made of a (100) plane; a through hole, formed in an area held between the photodiodes, penetrating through the semiconductor substrate from the incident surface side to the opposite surface side; and a conductive layer extending from the incident surface to the opposite surface by way of a wall surface of the through hole; the through hole being formed by connecting a vertical hole part formed substantially perpendicular to the incident surface on the incident surface side, and a pyramidal hole part formed like a quadrangular pyramid on the opposite surface side to each other within the semiconductor substrate; the pyramidal hole part having a wall surface formed as a (111) plane.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: February 8, 2005
    Assignee: Hamamatsu Photonics, K.K.
    Inventor: Katsumi Shibayama
  • Patent number: 6852920
    Abstract: Nano-architected/assembled solar cells and methods for their manufacture are disclosed. The solar cells comprise oriented arrays of nanostructures wherein two or more different materials are regularly arrayed and wherein the presence of two different materials alternates. The two or more materials have different electron affinities. The two materials may be in the form of matrixed arrays of nanostructures. The presence of the two different materials may alternate within distances of between about 1 nm and about 100 nm. An orientation can be imposed on the array, e.g. through solution deposition surfactant templation or other methods.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: February 8, 2005
    Assignee: Nanosolar, Inc.
    Inventors: Brian M. Sager, Martin R. Roscheisen
  • Patent number: RE39967
    Abstract: A solid state photovoltaic device is formed on a substrate and includes a photoactive channel layer interposed between a pair of electrodes. The photoactive channel layer includes a first material which absorbs light and operates as a hole carrier. Within the first material are nanoparticles of a second material which operate as electron carriers. The nanoparticles are distributed within the photoactive channel layer such that, predominantly, the charge path between the two electrodes at any given location includes only a single nanocrystal. Because a majority of electrons are channeled to the electrodes via single nanocrystal conductive paths, the resulting architecture is referred to as a channel architecture.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: January 1, 2008
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: Joshua S. Salafsky