With Particular Layer Thickness (e.g., Layer Less Than Light Absorption Depth) Patents (Class 257/464)
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Optoelectronic circuit employing a heterojunction thyristor device that performs high speed sampling
Patent number: 6853014Abstract: An optoelectronic circuit employing a heterojunction thyristor device that is configured as an optically-controlled (or electrically-controlled) sampling/switching device. First and second channel regions are disposed between the anode terminal and the cathode terminal of the device, and an electrical input terminal and an electrical output terminal are coupled to opposite ends of the first channel region. At least one control signal is supplied to the device. When the control signal corresponds to a predetermined ON condition, sufficient charge is stored in the second channel region to cause the heterojunction thyristor device to operate in an ON state whereby current flows between the anode terminal and the cathode terminal and the electrical input terminal is electrically coupled to the electrical output terminal.Type: GrantFiled: December 19, 2002Date of Patent: February 8, 2005Assignees: The University of Connecticut, Opel, Inc.Inventors: Geoff W. Taylor, Jianhong Cai -
Patent number: 6849917Abstract: In a photovoltaic element obtained by forming an ITO film, that is a transparent conductive film, on a semiconductor layer composed of an n-type silicon wafer, an i-type amorphous silicon hydride layer and a p-type amorphous silicon hydride layer, the ITO film has an interface layer as an alkali diffusion prevention region on a side adjacent to the semiconductor layer, and a bulk layer layered on the interface layer. The crystallinity of the interface layer is made lower than that of the bulk layer by changing the water partial pressure when forming the interface layer and the bulk layer.Type: GrantFiled: March 17, 2003Date of Patent: February 1, 2005Assignee: Sanyo Electric Co., Ltd.Inventor: Eiji Maruyama
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Patent number: 6838741Abstract: An aspect of the present invention is directed to an avalanche photodiode (APD) device for use in oil well drilling applications in harsh, down-hole environments where shock levels are near 250 gravitational acceleration (G) and/or temperatures approach or exceed 150° C. Another aspect of the present invention is directed to an APD device fabricated using SiC materials. Another aspect of the present invention is directed to an APD device fabricated using GaN materials.Type: GrantFiled: December 10, 2002Date of Patent: January 4, 2005Assignee: General Electtric CompanyInventors: Peter M. Sandvik, Dale M. Brown, Stephen D. Arthur, Kevin S. Matocha, James W. Kretchmer
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Patent number: 6835888Abstract: A stacked photovoltaic device comprises at least three p-i-n junction constituent devices superposed in layers, each having a p-type layer, an i-type layer and an n-type layer which are formed of silicon non-single crystal semiconductors. An amorphous silicon layer is used as the i-type layer of a first p-i-n junction, a microcrystalline silicon layer is used as the i-type layer of a second p-i-n junction and a microcrystalline silicon layer is used as the i-type layer of a third p-i-n junction, the first to third layers being in order from the light incident side. In this way, a stacked photovoltaic device can be provided which is practical and low-cost and yet has high reliability and high photoelectric conversion efficiency.Type: GrantFiled: April 23, 2003Date of Patent: December 28, 2004Assignee: Canon Kabushiki KaishaInventors: Masafumi Sano, Tetsuro Nakamura
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Patent number: 6818916Abstract: A light-receiving device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and carrier accumulation layers C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an even number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. As a result, when electrons are excited in the carrier accumulation layers C1 to C3, electrons are propagated through the quantum-wave interference layer from the n-layer to the p-layer as a wave, and electric current flows rapidly.Type: GrantFiled: December 16, 1999Date of Patent: November 16, 2004Assignee: Canare Electric Co., Ltd.Inventor: Hiroyuki Kano
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Patent number: 6809391Abstract: A photodiode comprises an optical detection portion for detecting an optical signal and outputting a photoelectric conversion signal. The optical detection portion has a semiconductor substrate of a first conductive type and semiconductor layers of a second conductive type formed in spaced-apart relation in a surface of the semiconductor subtrate. A depletion layer is formed in the semiconductor subtrate by application of a reverse bias to the photodiode so as to surround the semiconductor layers. An etched surface portion of the depletion layer is disposed between the semiconductor layers so that an interface level region of the surface of the semiconductor substrate does not exist between the semiconductor layers.Type: GrantFiled: August 11, 2000Date of Patent: October 26, 2004Assignee: Seiko Instruments Inc.Inventor: Sumio Koiwa
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Publication number: 20040201076Abstract: A method of managing radiation having a frequency in the terahertz and/or microwave regions. The method comprises providing a semiconducting device having a two-dimensional carrier gas. Plasma waves are generated in the carrier gas using a laser pulse. The frequency of the plasma waves, and as a result, the generated radiation are adjusted using a voltage applied to the semiconducting device.Type: ApplicationFiled: October 29, 2003Publication date: October 14, 2004Inventors: Michael Shur, Victor Ryzhii, Remigijus Gaska
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Patent number: 6803614Abstract: An AE/AF solid-state imaging apparatus exhibiting suitable characteristics of spectral sensitivities of an AE sensor and an AF sensor respectively, is actualized, wherein visual sensitivity corrections filters of an optical system are reduced. In the solid-state imaging apparatus includes AF photodiode regions for auto-focusing and An AE photodiode region for executing a photometric process of a photographing region, are integrated on a same semiconductor substrate, characteristics of spectral sensitivities of the AF photodiode regions are different from a characteristic of the spectral sensitivity of the AE photodiode region. Desirably, a peak wavelength of each of the spectral sensitivity characteristics of the AF photodiode regions is positioned on a longer wavelength side than a peak wavelength of the AE photodiode region.Type: GrantFiled: July 14, 2003Date of Patent: October 12, 2004Assignee: Canon Kabushiki KaishaInventor: Hidekazu Takahashi
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Patent number: 6787693Abstract: A photovoltaic generator constructed on an SOI N− layer subdivided into a series of connected isolated tubs whereby the isolated tubs are subdivided by a matrix of trenched wells. A P+ junction is formed into the top surface of each well to define a photovoltaic generator junction for its respective well.Type: GrantFiled: December 3, 2002Date of Patent: September 7, 2004Assignee: International Rectifier CorporationInventor: Steven C. Lizotte
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Patent number: 6784513Abstract: A semiconductor light receiving device is provided, which comprises a semiconductor substrate, a collector region, a base region, and an emitter region, an insulating film covering the surface of the collector region, the base region, and the emitter region, a first metal line on the insulating film at a position corresponding to the base region and being electrically connected to the emitter region, and a second metal line on the insulating film at a position corresponding to a junction portion of the base region and the collector region and being electrically connected to the emitter region. The first metal line has a sloped surface such that incident light falling on the first metal line is reflected and directed toward the surface of the base region.Type: GrantFiled: April 24, 2003Date of Patent: August 31, 2004Assignee: Sharp Kabushiki KaishaInventors: Motonari Aki, Yoshiki Yasuda
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Patent number: 6756618Abstract: The present invention relates to a complementary metal-oxide semiconductor (CMOS) image sensor. Particularly, the present invention provides effects of suppressing electrical and optical interferences and improving light sensitivity in a unit pixel of a highly integrated and low power consuming CMOS image sensor. In order to achieve these effects, a red pixel is two-dimensionally encompassed by a green pixel and a blue pixel formed with an additional p-type ion implantation region for suppressing the interference between the pixels. Also, in addition to the above-described structure, a photodiode optimized to the blue pixel is formed further to enhance the light sensitivity.Type: GrantFiled: December 31, 2002Date of Patent: June 29, 2004Assignee: Hynix Semiconductor Inc.Inventor: Hee-Jeong Hong
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Patent number: 6750394Abstract: A thin-film solar cell comprises a set of a transparent conductive layer and a photoelectric conversion layer laminated in this order on a substrate, wherein the photoelectric conversion layer is made of a p-i-n junction, the i-layer is made of a crystalline layer and the transparent conductive layer is provided with a plurality of holes at its surface of the side of the photoelectric conversion layer, each of said holes having irregularities formed on its surface.Type: GrantFiled: January 10, 2002Date of Patent: June 15, 2004Assignee: Sharp Kabushiki KaishaInventors: Hiroshi Yamamoto, Kenji Wada
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Publication number: 20040089907Abstract: A radiation detector of the type, which by means of electric signals indicates the position of an irradiated point (11) on a detector surface (10) of the detector. The detector comprises a semiconductor wafer (1) comprising at least two barrier layers (2, 3), which are arranged in such manner that when applying an electric bias across the layers, one layer is reversely biased and the other is forwardly biased, the extension of the reversely biased barrier layer substantially coinciding with the detector surface. The detector further comprises at least two conductive layers (2b, 3b, 2, 3) provided with at least one current collecting electrode (4, 5; 6,7), the conductive layers being arranged so as to allow a transistor amplification between the forwardly and reversely biased layer by means of charge currents generated by the radiation in the irradiated point and separated by the reversely biased barrier layer.Type: ApplicationFiled: June 16, 2003Publication date: May 13, 2004Inventor: Lars Lindholm
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Publication number: 20040070043Abstract: A CMOS image sensor is disclosed which has a photodiode formed by implanting ions into an area of a substrate. The photodiode surface area corresponds to about 15% to 40% of the surface area of a photoreceptor part region of the sensor. Thus, the capacitance associated with the photodiode is reduced relative to prior art photodiodes, and, thus, the output signals generated by the detected light are increased. Further, by reducing the size of the photodiode in manufacturing the CMOS image sensor, the junction region is reduced to thereby improve the absorption efficiency of light and high integration of the CMOS image sensor can be achieved to thereby prevent deterioration of device characteristics.Type: ApplicationFiled: May 21, 2003Publication date: April 15, 2004Inventors: In Gyun Jeon, Jinsu Han
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Patent number: 6720588Abstract: An improved APD structure and an improved manner of operating APD's particularly beneficial for a single photon detection applications are provided. An APD is provided having an absorption region, a control region, and a multiplication region, wherein the multiplication region has a k value of approximately 1. In one example the multiplication region comprises a doped InP layer. The field control layer is designed so as to produce a reduction of electric field that is equal to the multiplication region's breakdown electric field, plus or minus 5V/&mgr;m. The method comprises applying a potential across the APD so as to induce an electric field across the multiplication region that exceeds the breakdown field; while having the control region shield the absorption region to prevent excessive noise.Type: GrantFiled: November 13, 2002Date of Patent: April 13, 2004Assignee: Optonics, Inc.Inventor: James S. Vickers
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Patent number: 6707080Abstract: A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.Type: GrantFiled: December 16, 2002Date of Patent: March 16, 2004Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Ching-Chun Wang, Dun-Nian Yaung, Chien-Hsien Tseng, Shou-Gwo Wuu
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Patent number: 6706959Abstract: A photoelectric conversion element is disposed in each of a plurality of recesses of a support. Light reflected by the inside surface of the recess shines on the photoelectric conversion element. The photoelectric conversion element has an approximately spherical shape and has the following structure. The outer surface of a center-side n-type amorphous silicon (a-Si) layer is covered with a p-type amorphous SiC (a-SiC) layer having a wider optical band gap than a-Si does, whereby a pn junction is formed. A first conductor of the support is connected to the p-type a-SiC layer of the photoelectric conversion element at the bottom or its neighborhood of the recess. A second conductor, which is insulated from the first conductor by an insulator, of the support is connected to the n-type a-Si layer of the photoelectric conversion element.Type: GrantFiled: November 21, 2001Date of Patent: March 16, 2004Assignee: Clean Venture 21 CorporationInventors: Yoshihiro Hamakawa, Mikio Murozono, Hideyuki Takakura
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Publication number: 20040041225Abstract: Impurity concentration (Nd(X)) in an n-drift layer in a diode is at a maximum at a position at a distance Xp from an anode electrode in a direction from the anode electrode to a cathode electrode, and gradually decreases from the position toward each of the anode electrode and the cathode electrode. A ratio of the peak impurity concentration Np to an averaged impurity concentration Ndm in the n-drift layer is in the range of 1 to 5. This provides a diode and a manufacturing method thereof by which oscillations in voltage and current at reverse recovery are inhibited to achieve enhancement both in high speed and low-loss characteristics and in soft recovery characteristics.Type: ApplicationFiled: February 20, 2003Publication date: March 4, 2004Inventor: Michio Nemoto
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Patent number: 6692985Abstract: A solar cell substrate with thin film polysilicon. The solar cell substrate includes a substrate; a transparent conductive layer, formed on the substrate; a thermal isolation layer having inlaid conductive layers, formed on the transparent conductive layer; and a polysilicon layer, formed on the thermal isolation layer.Type: GrantFiled: June 7, 2002Date of Patent: February 17, 2004Assignee: Industrial Technology Research InstituteInventors: Chorng-Jye Huang, Lee Ching Kuo, Jyi Tyan Yeh, Chien Sheng Huang, Leo C. K. Liau, Shih-Chen Lin, Cheng-Ting Chen, Feng-Cheng Jeng
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Publication number: 20040012063Abstract: A semiconductor light-receiving module includes a semiconductor light-receiving element and an incident light direction device. The semiconductor light-receiving element includes a substrate, at least a light absorbing layer and an upper cladding layer formed sequentially on the substrate, a light incident facet formed at least at one facet of the substrate and the light absorbing layer, and electrodes which output an electric signal generated by absorption of the light entering from the light incident facet in the light absorbing layer. The incident light direction device directs to irradiate the light obliquely to the light incident facet of the semiconductor light-receiving element, and to cause at least part of the light to irradiate the light absorbing layer at the light incident facet.Type: ApplicationFiled: July 11, 2003Publication date: January 22, 2004Applicant: Anritsu CorporationInventors: Kenji Kawano, Hiroaki Yoshidaya, Jun Hiraoka, Yuichi Sasaki, Eiji Kawazura, Satoshi Magsumoto
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Patent number: 6680432Abstract: Apparatus and Method for Optimizing the Efficiency of a Bypass Diode in Solar Cells. In a preferred embodiment, a layer of TiAu is placed in an etch in a solar cell with a contact at a doped layer of GaAs. Electric current is conducted through a diode and away from the main cell by passing through the contact point at the GaAs and traversing a lateral conduction layer. These means of activating, or “turning on” the diode, and passing the current through the circuit results in greater efficiencies than in prior art devices. The diode is created during the manufacture of the other layers of the cell and does not require additional manufacturing.Type: GrantFiled: October 24, 2001Date of Patent: January 20, 2004Assignee: Emcore CorporationInventors: Paul R. Sharps, Marvin Brad Clevenger, Mark A. Stan
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Patent number: 6670543Abstract: There are now provided thin-film solar cells and method of making. The devices comprise a low-cost, low thermal stability substrate with a semiconductor body deposited thereon by a deposition gas. The deposited body is treated with a conversion gas to provide a microcrystalline silicon body. The deposition gas and the conversion gas are subjected to a pulsed electromagnetic radiation to effectuate deposition and conversion.Type: GrantFiled: January 25, 2002Date of Patent: December 30, 2003Assignee: Schott GlasInventors: Manfred Lohmeyer, Stefan Bauer, Burkhard Danielzik, Wolfgang Möhl, Nina Freitag
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Patent number: 6667240Abstract: A method for forming a deposited film, comprising generating plasma in a plurality of successive vacuum containers and continuously forming a deposited film on a belt-like substrate while continuously moving the substrate in its longitudinal direction, wherein an opening of a discharge container is adjusted with an opening adjusting plate having a shape set so as to reduce ununiformity of a deposited film thickness in a width direction of the substrate on the basis of a measurement of a deposition rate distribution. Accordingly, there is provided a method and an apparatus for forming a deposited film which are capable of producing a photovoltaic element without ununiformity in characteristics by depositing semiconductor layers without ununiformity in thickness and quality.Type: GrantFiled: March 8, 2001Date of Patent: December 23, 2003Assignee: Canon Kabushiki KaishaInventors: Hiroyuki Ozaki, Masahiro Kanai, Naoto Okada, Koichiro Moriyama, Hiroshi Shimoda
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Patent number: 6667528Abstract: A photodetector (and method for producing the same) includes a semiconductor substrate, a buried insulator formed on the substrate, a buried mirror formed on the buried insulator, a semiconductor-on-insulator (SOI) layer formed on the conductor, alternating n-type and p-type doped fingers formed in the semiconductor-on-insulator layer, and a backside contact to one of the p-type doped fingers and the n-type doped fingers.Type: GrantFiled: January 3, 2002Date of Patent: December 23, 2003Assignee: International Business Machines CorporationInventors: Guy Moshe Cohen, Kern Rim, Dennis L. Rogers, Jeremy Daniel Schaub, Min Yang
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Patent number: 6660928Abstract: A solar cell comprising a substrate, a buffer layer, a first subcell, a second subcell, and a third subcell, where said first subcell, said second subcell, and said third subcell are lattice matched, and where said substrate is lattice mismatched with said first, second, and third subcells.Type: GrantFiled: April 2, 2002Date of Patent: December 9, 2003Assignee: Essential Research, Inc.Inventors: Martin O. Patton, Samar Sinharoy, Victor G. Weizer
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Patent number: 6614087Abstract: An object is to provide a semiconductor device which is free from such voltage oscillation as may cause malfunction of peripheral equipment. In a semiconductor device having a pin structure, the impurity concentration gradient in an n+ layer (103) serving as a buffer layer is set equal to or less than 2×1018cm−4. Then, when a reverse bias voltage is applied and a depletion layer reaches the n+ layer (103), the expansion of the depletion layer is prevented from rapidly stopping and the voltage oscillation can be suppressed.Type: GrantFiled: April 6, 2000Date of Patent: September 2, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kazuhiro Morishita, Katsumi Satoh, Noritoshi Hirano
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Patent number: 6611007Abstract: A novel quantum well intermixing method for regionally modifying the bandgap properties of InGaAsP quantum well structures is disclosed. The method induces bandgap wavelength blue shifting and deep states for reducing carrier lifetime within InGaAsP quantum well structures. The novel quantum well intermixing technique is applied to the modulator section of an integrated DFB laser/electro-absorption modulator, wherein the modulator exhibits fast switching times with efficient optical coupling between the DFB laser and modulator region.Type: GrantFiled: May 9, 2002Date of Patent: August 26, 2003Assignee: Fiber Optic Systems Technology, Inc.Inventors: David A. Thompson, Brad J. Robinson, Gregory J. Letal, Alex S. W. Lee
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Patent number: 6597051Abstract: A thermoelectric infrared detector comprising a substrate and two kinds of conducting pillars. The pillars longitudinally extend away from the substrate towards incident infrared radiation. The pillars have upper, hot ends remote from the substrate and lower ends at the substrate. Pairs of adjacent pillars of different kinds are electrically connected by a conducting junction at their upper ends, and thereby define thermocouples. The junctions of different pairs of pillars are exposed to the incident radiation.Type: GrantFiled: May 22, 2001Date of Patent: July 22, 2003Assignee: Yeda Research and Development Co. Ltd.Inventors: Igor Lubomirsky, Konstantin Gartsman
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Patent number: 6593636Abstract: A high-speed silicon photodiode and method of manufacture include a first layer of silicon having thickness in a range of about 125 &mgr;m to about 550 &mgr;m. A second layer of silicon has a thickness in a range of about 3 &mgr;m to about 16 &mgr;m and a resistivity of at least about 500 ohm-cm. This first layer is doped with a second type of impurity. In an alternative aspect, a high-speed silicon photodiode and method of manufacture includes a silicon wafer doped with a first type of impurity. On a first side of the wafer a doping of a second type is applied in an active area of a photodiode. On the reverse of the wafer a volume of silicon is etched away and the resulting trench is coated with a conductor. The wafer may also exhibit a high resistivity of at least about 500 ohm-cm. In each aspect, a reverse bias not exceeding about 3.3 volts permits operation with a frequency response of at least 750 MHz.Type: GrantFiled: December 5, 2000Date of Patent: July 15, 2003Assignee: UDT Sensors, Inc.Inventors: Peter Steven Bui, Narayan Dass Taneja
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Patent number: 6590242Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element comprises a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.Type: GrantFiled: February 24, 2000Date of Patent: July 8, 2003Assignee: Canon Kabushiki KaishaInventors: Hiraku Kozuka, Toru Koizumi, Koji Sawada
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Patent number: 6586788Abstract: A method and system for control of light transmitted through a p-type semiconductor material, configured as part of a metal-insulator-semiconductor (MIS) structure. A variable gate voltage is applied to generate a variable number of sub-band charge carriers near an insulator-semiconductor interface in the MIS structure. Where the gate voltage is lower than a threshold voltage, transmission of light propagating adjacent to and parallel to the interface is relatively high. As the gate voltage is increased to a value larger than the threshold voltage, the number of sub-band carriers raised to a first sub-band energy level increases approximately monotonically.Type: GrantFiled: March 27, 2001Date of Patent: July 1, 2003Assignee: Tera Fiberoptics, Inc.Inventor: Junhao Chu
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Patent number: 6583482Abstract: An avalanche photodetector (APD) is made from composite semiconductor materials. The absorption region of the APD is formed in a n-type InGaAs layer. The multiplication region of the APD is formed in a p-type silicon layer. The two layers are bonded together. The p-type silicon layer may be supported on an n+ type silicon substrate. A p-n junction formed at the interface between the silicon layer and the substrate. Alternatively, the n-type InGaAs layer may be supported on an InP substrate. In this case, a p-n junction is formed by making n-doped surface regions in the p-type silicon superlayer. In either case, the p-n junction is reverse biased for avalanche multiplication of charge carriers. The maximum of the electric field distribution in the APD under reverse bias operating conditions is located at p-n junction. This maximum is at a distance equal to about the thickness of the p-type silicon layer away from the absorption region.Type: GrantFiled: October 3, 2001Date of Patent: June 24, 2003Inventors: Alexandre Pauchard, Yu-Hwa Lo
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Patent number: 6579752Abstract: A method of manufacturing a semiconductor device comprising the step of epitaxially growing of an n-type doped layer of a semiconductor material using an n-type dopant gas, the growth process being performed at a pressure higher than 2.66×104 Pa.Type: GrantFiled: March 26, 2002Date of Patent: June 17, 2003Assignee: Koninklijke Philips Electronics N.V.Inventor: Wiebe Barteld De Boer
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Patent number: 6566595Abstract: A solar cell having a p-type semiconductor layer and an n-type semiconductor layer made of a first compound semiconductor material, and a semiconductor layer sandwiched between the p-type semiconductor layer and the n-type semiconductor layer. The semiconductor layer includes at least a quantum well layer which is made of a second compound semiconductor material and has a plurality of projections of at least two different sizes.Type: GrantFiled: October 29, 2001Date of Patent: May 20, 2003Assignee: Sharp Kabushiki KaishaInventor: Yoshiyuki Suzuki
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Patent number: 6559375Abstract: A component with a first layer which mainly includes a first material, a second layer which mainly includes a second material and at least one intermediate layer being located between the first layer and the second layer. The component is configured in such a way that the intermediate layer contains the first and/or the second material and that at least one substance is colloidally dissolved in the intermediate layer and that the substance has another conductibility than the first or second material.Type: GrantFiled: September 7, 2001Date of Patent: May 6, 2003Assignee: Dieter MeissnerInventors: Dieter Meissner, Jörn Rostalski
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Patent number: 6548751Abstract: A thin-film flexible solar cell built on a plastic substrate comprises a cadmium telluride p-type layer and a cadmium sulfide n-type layer sputter deposited onto a plastic substrate at a temperature sufficiently low to avoid damaging or melting the plastic and to minimize crystallization of the cadmium telluride. A transparent conductive oxide layer overlaid by a bus bar network is deposited over the n-type layer. A back contact layer of conductive metal is deposited underneath the p-type layer and completes the current collection circuit. The semiconductor layers may be amorphous or polycrystalline in structure.Type: GrantFiled: June 25, 2001Date of Patent: April 15, 2003Assignee: SolarFlex Technologies, Inc.Inventors: Lawrence H. Sverdrup, Jr., Norman F. Dessel, Adrian Pelkus
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Patent number: 6538195Abstract: A thin film silicon solar cell is provided on a glass substrate, the glass having a textured surface, including larger scale surface features and smaller scale surface features. Over the surface is deposited a thin barrier layer which also serves as an anti-reflection coating. The barrier layer may be a silicon nitride layer for example and will be 70 nm±20% in order to best achieve its anti-reflection function. Over the barrier layer is formed an essentially conformal silicon film having a thickness which is less than the dimensions of the larger scale features of the glass surface and of a similar dimension to the smaller scale features of the glass surface.Type: GrantFiled: May 31, 2001Date of Patent: March 25, 2003Assignee: Pacific Solar Pty LimitedInventors: Zhengrong Shi, Stuart Ross Wenham, Martin Andrew Green, Paul Alan Basore, Jing Jia Ji
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Patent number: 6538298Abstract: A “low field enhancement” (LFR) semiconductor saturable absorber device design in which the structure is changed such that it has a resonant condition. Consequently, the field strength is substantially higher in the spacer layer, resulting in a smaller saturation fluence and in a higher modulation depth. However, the field in the spacer layer is still lower than the free space field or only moderately enhanced compared to the field in the free space. According to one embodiment, the absorber device is a Semiconductor Saturable Absorber Mirror (SESAM) device. In contrast with SESAMs according to the state of the art, a structure including the absorber and being placed on top of a Bragg reflector is provided, which essentially fulfills a resonance condition whereby a standing electromagnetic wave is present in the structure. In other words, the design is such that the field intensity reaches a local maximum in the vicinity of the device surface.Type: GrantFiled: December 10, 2001Date of Patent: March 25, 2003Assignee: Gigatera AGInventors: Kurt Weingarten, Gabriel J. Spuehler, Ursula Keller, Lukas Krainer
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Patent number: 6534704Abstract: A solar cell includes a first semiconductor layer that is p-type, and a second semiconductor layer that is n-type formed over the first semiconductor layer. The solar cell includes a layer A made of a semiconductor different from the first semiconductor layer and the second semiconductor layer or an insulator between the first semiconductor layer and the second semiconductor layer. The band gap Eg1 of the first semiconductor layer and the band gap Eg2 of the second semiconductor layer satisfy the relationship Eg1<Eg2. The electron affinity &khgr;1 (eV) of the first semiconductor layer and the electron affinity &khgr;2 (eV) of the second semiconductor layer satisfy the relationship 0≦(&khgr;1−&khgr;2)<0.5, and the average layer thickness of the layer A is 1 nm or more and 20 nm or less.Type: GrantFiled: October 5, 2001Date of Patent: March 18, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yasuhiro Hashimoto, Takayuki Negami, Shigeo Hayashi, Takuya Satoh
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Patent number: 6528827Abstract: An MSM semiconductor circuit formed on a semi-insulating substrate that includes a set of contacts, first and second absorption layers, and a wide band gap buffer layer. The first absorption layer is formed on the semi-insulating substrate. The second absorption layer operably coupled to the set of contacts. The wide band gap buffer layer disposed between the first absorption layer and the second absorption layer.Type: GrantFiled: March 7, 2001Date of Patent: March 4, 2003Assignee: OptoLynx, Inc.Inventor: Jason P. Henning
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Patent number: 6515216Abstract: The present invention provides a photovoltaic device assembly comprising a plurality of photovoltaic devices connected with one another, wherein no rectangular corner part is formed in the peripheral parts of the photovoltaic device assembly itself and the shape of the peripheral parts of the photovoltaic devices is composed of straight lines and curved lines connecting the straight lines to one another, thereby preventing penetration owing to the effects of manufacture, installation, transportation, handling, and the state after installation of the solar cell module.Type: GrantFiled: July 3, 2001Date of Patent: February 4, 2003Assignee: Canon Kabushiki KaishaInventors: Hideaki Zenko, Ichiro Kataoka, Satoru Yamada, Hidenori Shiotsuka
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Patent number: 6500691Abstract: The image sensor comprises a semiconductor body (1) having gate electrodes (3, 4) at a surface (2), each gate electrode being combined with the semiconductor body (1) and an intermediate dielectric (14) so as to form a MOS capacitor (5), which gate electrodes (3, 4) include a portion (6) which is thinner than a surrounding zone (7), a photosensitive region (8) in the semiconductor body (1) being situated below each gate electrode (3, 4), said photosensitive region (8) being capable of absorbing electromagnetic radiation and converting said radiation to electric charge. The MOS capacitors (5) are arranged next to each other so as to form an array (9), with the gate electrodes (3, 4) in a row (10) electrically contacting each other, and the gate electrodes (3, 4) in a column (11) being mutually separated only by electrically insulating material (12). The image sensor has an improved photosensitivity, particularly for electromagnetic radiation with a short wavelength.Type: GrantFiled: September 5, 2001Date of Patent: December 31, 2002Assignee: Koninklijke Philips ElectronicsInventors: Gregory Lee Kreider, Hermanus Leonardus Peek, Wilco Klaassens
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Patent number: 6486391Abstract: The invention relates to a diode structure, especially for thin film solar cells. The aim of the invention is to provide a diode structure for thin film solar cells. Said structure allows for an assembly of a thin film solar cell, whereby said assembly is as flexible as possible, efficiency is high, and utilizing materials that are as environmentally friendly as possible. A diode structure comprising a p-conducting layer, which consists of a chalcopyrite compound, and a n-conducting layer, which is adjacent to the p-conducting layer and consists of a compound that contains titanium and oxygen, is provided.Type: GrantFiled: July 25, 2001Date of Patent: November 26, 2002Assignee: Siemens and Shell Solar GmbHInventor: Franz Karg
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Patent number: 6479744Abstract: In a photovoltaic device module comprising a plurality of photovoltaic devices connected electrically through a metal member, an insulating member is so provided as to avoid contact between an edge portion of the photovoltaic device and the metal member. This can provide a photovoltaic device module which is inexpensive, easy to operate and highly reliable.Type: GrantFiled: September 27, 2000Date of Patent: November 12, 2002Assignee: Canon Kabushiki KaishaInventors: Koji Tsuzuki, Tsutomu Murakami, Yoshifumi Takeyama, Koichi Shimizu
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Patent number: 6476423Abstract: Optical detectors used for remote controls must be able to function over long distances and under various environmental conditions. They must therefore have a high sensitivity, which means they also respond to electrical and magnetic inference fields. The present optical detector avoids the need of being packed in an assembly, which has an additional internal metal shield for protection against electromagnetic interference. In this optical detector, the surface is coated with polysilicon, except for the top-lying cathode contact. Furthermore, a thick oxide layer is arranged between the substrate and the polysilicon coating, which is contacted to a highly p+-doped region of the substrate. Such optical detectors, which are not subject to electromagnetic interference, are primarily required for remote controls.Type: GrantFiled: May 15, 2001Date of Patent: November 5, 2002Assignee: Vishay Semiconductor GmbHInventors: Peter Mischel, Heike Peppermueller-Frangen
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Patent number: 6465862Abstract: Semiconductor photo sensor and semiconductor wafer processing designs are disclosed. The disclosed designs provide significantly improved photo sensor performance within the framework of a CMOS process. CMOS compatible fabrication procedures are presented, that enable tailoring of the 3-dimensional doping profile and defect structure within a photo sensor, to optimize light detection efficiency and minimize noise from dark current.Type: GrantFiled: October 5, 1999Date of Patent: October 15, 2002Inventor: Brannon Harris
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Patent number: 6444899Abstract: It is achieved to provide a solar cell in which stability at a connection portion between a circuit substrate of an electric instrument and a rear electrode, and reliability against electrostatic damage are improved, and also to provide a method of fabricating the same. A rear electrode is formed of a material containing carbon as a main ingredient. In formation of the rear electrode, a thermosetting conductive carbon paste is used and the formation is made by a printing method. Further, when the resistance values of the transparent electrode layer and the rear electrode layer are made the same level and are balanced, the resistance against electrostatic damage can be remarkably improved.Type: GrantFiled: December 21, 2000Date of Patent: September 3, 2002Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuichi Kubota, Kazuo Nishi
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Patent number: 6444897Abstract: The invention relates to a solar cell containing a semiconductor (1) with an intermediate band (2) that is half filled with electrons, located between two layers of ordinary n type (3) and p type (4) semiconductors. When lighted, electron-hole pairs are formed either by a photon that absorbs the necessary energy (5) or by two photons (6,7) that absorb less energy which pump an electron from the valence band to the intermediate band (8) and from the latter to the conductance band (9). An electrical current is generated that exits on the p side and returns via the n side. The n and p layers also prevent the intermediate band from contacting the outer metal connections, which would have resulted in a short-circuit. Said cell converts solar energy into electricity in a more efficient manner than conventional cells and contributes to improvement of the photovoltaic devices.Type: GrantFiled: February 8, 2001Date of Patent: September 3, 2002Assignees: Universidad Politecnica de Madrid, Universidad Autonoma de Madrid - Fac. Ciencias, Consejo Superior de Investigaciones CientificasInventors: Antonio Luque-Lopez, Fernando Flores-Sinta, Antonio Martí-Vega, José Carlos Conesa-Cegarra, Perla Wahnon-Benarroch, José Ortega-Mateo, Cesar Tablero-Crespo, Rubén Pérez-Pérez, Lucas Cuadra-Rodríguez
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Patent number: 6437234Abstract: A method of manufacturing a photoelectric conversion device according to the present invention comprises the steps of: applying numerous glass particles having a particle size before baking being 5 to 25% of that of crystalline semiconductor particles to a substrate having an electrode of one side; depositing the crystalline semiconductor particles on the layer of the glass particles; pressing the crystalline semiconductor particles against the substrate; and subjecting them to baking, whereby manufacturing a photoelectric conversion device in which the crystalline semiconductor particles and the substrate have been joined together as well as an insulator has been interposed among the crystalline semiconductor particles. Accordingly, the photoelectric conversion device has good conversion efficiency and is manufactured at a low cost.Type: GrantFiled: July 26, 2001Date of Patent: August 20, 2002Assignee: Kyocera CorporationInventors: Takeshi Kyoda, Shin Sugawara, Hisao Arimune
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Patent number: 6429417Abstract: A system to align optical components is described. The system utilizes a highly transmissive sensor positioned in the optical path of an optical signal to determine the precise position of the optical signal. A feedback loop uses output from the highly transmissive sensor to readjust elements that maintains the optical signal in a desired position. The current system is particularly suitable for use in an optical cross switch.Type: GrantFiled: November 8, 2000Date of Patent: August 6, 2002Assignee: Xerox CorporationInventors: Robert A. Street, Eric Peeters, Michel A. Rosa, Jeng Ping Lu, Christopher L. Chua