With Particular Layer Thickness (e.g., Layer Less Than Light Absorption Depth) Patents (Class 257/464)
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Patent number: 6429369Abstract: The invention relates to a thin-film solar cell on the basis of IB-IIIA-VIA compound semiconductors and a method for producing such a solar cell. Between the polycrystalline IB-IIIA-VIA absorber layer of the p-type conductivity and the carrier film serving as a substrate, a back electrode of intermetallic phases of the same IB- and IIIA-metals are located which are deposited for the generation of the absorber layer. The absorber layer and the back electrode are produced in such a way that the precursor consisting of IB-IIIA-metals is vertically only incompletely converted into the photovoltaicly active absorber material from the side opposite to the carrier film by reaction with chalcogen such that intermetallic phases of the IB- and IIIA-metals are directly located on the carrier film, which metals serve as back electrode of the solar cell structure.Type: GrantFiled: May 10, 2000Date of Patent: August 6, 2002Assignee: IST-Institut fur Solartechnologies GmbHInventors: Olaf Tober, Jürgen Penndorf, Michael Winkler, Klaus Jacobs, Thomas Koschack
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Patent number: 6420647Abstract: A thin film silicon solar cell is provided on a glass substrate, is illustrated, the glass having a textured surface, including larger scale surface features and smaller scale surface features. Over the surface is deposited a thin barrier layer which also serves as an anti-reflection coating. The barrier layer may be a silicon nitride layer for example and will be 70 nm ±20% in order to best achieve its anti-reflection function. Over the barrier layer is formed an essentially conformal silicon film having a thickness which is less than the dimensions of the larger scale features of the glass surface and of a similar dimension to the smaller scale features of the glass surface.Type: GrantFiled: May 31, 2001Date of Patent: July 16, 2002Assignee: Pacific Solar Pty LimitedInventors: Jing Jia Ji, Zhengrong Shi
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Publication number: 20020084504Abstract: A polymer-based field effect transistor photosensitive to incident light, which may enhance the transistor's characteristics and controlling parameters of the transistor state. The transistor is comprised of a metal-insulator-semiconductor structure with the insulating and semiconducting layers made of a polymeric media. The semiconducting polymer which also is photoconducting, forms the charge transport layer between the source and drain. The transistor exhibits large photosensitivity indicated by the sizable changes in the drain-source current, by a factor of 100-1000 even at low levels of light with illumination of approximately 1 mlux. The photosensitivity of the transistor is further enhanced with introduction of dilute quantity electron acceptor moieties in the semiconducting polymer matrix. Several applications of the light-responsive polymer-transistor are disclosed, such as use as a logic element and as a backbone of an image sensor.Type: ApplicationFiled: December 28, 2001Publication date: July 4, 2002Inventor: K.S. Narayan
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Patent number: 6404031Abstract: If a semiconductor device employing semiconductor light-receiving elements is disposed on a single optical axis, laser light which is incident on these light-receiving elements is interrupted by the semiconductor device, and it will be impossible to confirm as a whole that the alignment of a multiplicity of components disposed over a distance has been correctly adjusted. This problem is overcome by using a semiconductor light-receiving element with a structure which absorbs only some of a received laser light beam and which allows the greater part of the beam to be transmitted to its rear face.Type: GrantFiled: November 17, 1998Date of Patent: June 11, 2002Inventors: Kazuhiro Hane, Minoru Sasaki
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Patent number: 6403877Abstract: A space solar cell includes a back surface electrode formed on a back surface opposite to a light receiving surface of a semiconductor substrate, and a dielectric layer formed between the back surface electrode and the semiconductor substrate. In the space solar cell, a plurality of openings are formed in the dielectric layer for establishing an electrical connection between the back surface electrode and the semiconductor substrate, and a ratio of an area occupied by the openings relative to an area of the back surface is within a range from 0.25% to 30%.Type: GrantFiled: February 21, 2001Date of Patent: June 11, 2002Assignee: Sharp Kabushiki KaishaInventor: Tomoji Katsu
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Patent number: 6399873Abstract: A stacked photovoltaic device comprises at least three p-i-n junction constituent devices superposed in layers, each having a p-type layer, an i-type layer and an n-type layer which are formed of silicon non-single crystal semiconductors. An amorphous silicon layer is used as the i-type layer of a first p-i-n junction, a microcrystalline silicon layer is used as the i-type layer of a second p-i-n junction and a microcrystalline silicon layer is used as the i-type layer of a third p-i-n junction, the first to third layers being in order from the light incident side. In this way, a stacked photovoltaic device can be provided which is practical and low-cost and yet has high reliability and high photoelectric conversion efficiency.Type: GrantFiled: February 25, 1999Date of Patent: June 4, 2002Assignee: Canon Kabushiki KaishaInventors: Masafumi Sano, Tetsuro Nakamura
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Patent number: 6384462Abstract: A planar avalanche photodetector (APD) is fabricated by forming a, for example, InGaAs absorption layer on a p+-type semiconductor substrate, such as InP, and wafer-bonding to the absorption layer a second p-type semiconductor, such as Si, to form a multiplication layer. The layer thickness of the multiplication layer is substantially identical to that of the absorption layer. A region in a top surface of the p-type Si multiplication layer is doped n+-type to form a carrier separation region and a high electric field in the multiplication region. The APD can further include a guard-ring to reduce leakage currents as well as a resonant mirror structure to provide to wavelength selectivity. The planar geometry furthermore favors the integration of high-speed electronic circuits on the same substrate to fabricate monolithic optoelectronic transceivers.Type: GrantFiled: December 6, 2000Date of Patent: May 7, 2002Assignee: Nova Crystals, Inc.Inventors: Alexandre Pauchard, Yu-Hwa Lo
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Patent number: 6384319Abstract: The film thickness of a p-type semiconductor was adjusted in order to achieve 0.85-0.99 times the maximum pre-irradiation open-circuit voltage. In order to achieve 0.85-0.99 times the maximum pre-irradiation open-circuit voltage, it was also shown to be favorable to control acceptor impurity levels in p-type semiconductors. Irradiation conditions of more than 10 hours at 1 SUN or (light intensity [SUN])2×10 or more (time [h])>10 were utilized.Type: GrantFiled: March 15, 2000Date of Patent: May 7, 2002Assignee: Fuji Electric & Co., Ltd.Inventors: Toshiaki Sasaki, Shinji Fujikake
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Patent number: 6384316Abstract: A photovoltaic device having a structure in which a transparent conductive film, a p-type amorphous silicon layer, an i-type amorphous silicon layer, an n-type microcrystalline silicon layer and a back electrode film are laminated on a transparent substrate so as to satisfy the conditions of 50 Å<dc1<da1×&agr;1 (1) and 0.124<&agr;1<0.130 (2), where da1 is the total thickness (Å) of the p-type amorphous silicon layer and i-type amorphous silicon layer, and dc1 is the thickness (Å) of the n-type microcrystalline silicon layer.Type: GrantFiled: August 17, 2000Date of Patent: May 7, 2002Assignee: Sanyo Electric Co., Ltd.Inventors: Wataru Shinohara, Yasuaki Yamamoto
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Publication number: 20020043613Abstract: An illuminance sensor chip includes a first semiconductor layer, and a second semiconductor layer joined to the first semiconductor layer. When light is incident on the junction between the first semiconductor layer and the second semiconductor layer, the sensor chip outputs an electric signal in accordance with an amount of light incident on the junction. The thickness D of the second semiconductor layer is set to 2-4 &mgr;m for example so that the peak sensitivity wavelength in the spectral sensitivity characteristics lies in a visible light wavelength range. An illuminance sensor further includes, besides the above-described illuminance sensor chip, an additional illuminance sensor chip which is identical or generally identical to the first-mentioned illuminance sensor chip in spectral sensitivity characteristics. The additional illuminance sensor chip is provided with a visible light shielding portion for absorbing visible light.Type: ApplicationFiled: September 12, 2001Publication date: April 18, 2002Inventors: Nobuaki Suzuki, Shinichi Suzuki
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Patent number: 6353240Abstract: A CMOS sensor. The CMOS sensor comprises a substrate, a gate electrode formed on the substrate, a source/drain region formed in the substrate on one side of the gate electrode, and a sensor region formed in the substrate on another side of the gate electrode. The impurity in the source/drain region is arsenic. The source/drain further comprises a lightly doped drain region. The sensor region comprises a first doped region and a second doped region which together have a dentoid profile. The impurity in the first doped region and the second doped region is phosphorus.Type: GrantFiled: June 2, 1999Date of Patent: March 5, 2002Assignee: United Microelectronics Corp.Inventors: Cheng-Hung Chien, Chih-Hua Lee
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Publication number: 20010050404Abstract: The present invention provide a solar cell and a method of manufacturing the same which is high in the efficiency of energy conversion and improved in the durability while its production process requires not particularly high accuracy.Type: ApplicationFiled: May 31, 2001Publication date: December 13, 2001Applicant: Honda Giken Kogyo Kabushiki KaishaInventors: Yoshimitsu Saito, Seiichi Yokoyama
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Patent number: 6326649Abstract: A PIN photodiode comprising a p region containing a p type dopant, an n region containing an n type dopant, an i region positioned intermediate the p region and the n region, and a relatively thick, undoped buffer region positioned between the n region and the i region which substantially decreases the capacitance of the PIN photodiode such that the photodiode bandwidth is maximized. Typically, the buffer region is formed as a layer of indium phosphide that is at least approximately 0.5 &mgr;m in thickness.Type: GrantFiled: January 13, 1999Date of Patent: December 4, 2001Assignee: Agere Systems, Inc.Inventors: Chia C. Chang, Robert Eugene Frahm, Keon M. Lee, Orval George Lorimor, Dennis Ronald Zolnowski
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Patent number: 6316715Abstract: A multijunction photovoltaic cell comprises a first subcell that initially receives incident light upon the photovoltaic cell, with the first subcell being made of a first material system, having a first thickness, and producing a first photogenerated current output. A second subcell receives the incident light after the first subcell receives the incident light, with the second subcell being disposed immediately adjacent the first subcell. The second subcell is made of the first material system or a similar semiconductor material, has a second thickness that is greater than the first thickness, and produces a second photogenerated current output that is substantially equal in amount to the first photogenerated current output. A tunnel junction is disposed between the first and second subcells. The multijunction cell provides a greater ability to current match to low-current-producing subcells, higher multijunction cell voltage, lower series resistance, and greater radiation resistance.Type: GrantFiled: March 15, 2000Date of Patent: November 13, 2001Assignee: The Boeing CompanyInventors: Richard R. King, David E. Joslin, Nasser H. Karam
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Patent number: 6310281Abstract: A new, large-area, thin-film, flexible photovoltaic structure is disclosed, as well as a general fabrication procedure, including a preferably roll-to-roll-type, process-chamber-segregated, “continuous-motion”, method for producing such a structure. A special multi-material vapor-deposition environment is disclosed to implement an important co-evaporation, layer-deposition procedure performed in and as part of the fabrication procedure. A structural system adapted to create a vapor environment generally like that just referred to is disclosed, as is an organization of method steps involved in the generation of such a vapor environment. Also, a unique, vapor-creating, materials-distributing system, which includes specially designed heated crucibles with carefully arranged, spatially distributed, localized and generally point-like, heated-nozzle sources of different metallic vapors, and a special multi-fingered, comb-like, vapor-delivering manifold structure is shown.Type: GrantFiled: March 16, 2000Date of Patent: October 30, 2001Assignee: Global Solar Energy, Inc.Inventors: Robert G. Wendt, Gregory M. Hanket, Robert W. Birkmire, T. W. Fraser Russell, Scott Wiedeman
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Patent number: 6307148Abstract: An indium layer and a copper layer, and whenever necessary, a gallium layer or a gallium-alloy layer, are laminated on an electrode film formed on one of the surfaces of a substrate to form a metallic film. The metallic film is then subjected to sulfurization treatment or selenization treatment to form a p-type semiconductor layer made of “CuInS2 or CuInSe2” or “Cu(In, Ga)S2 or Cu(In, Ga)Se2”. This p-type semiconductor layer is subjected to KCN treatment, for removing impurities such as copper sulfide, copper selenide, etc., by a KCN solution, and an n-type semiconductor layer is formed on this p-type semiconductor layer to form a solar cell. In this instance, the indium layer is formed under heating, or is heat-treated by heat-treatment while the surface of the indium layer is exposed.Type: GrantFiled: March 27, 2000Date of Patent: October 23, 2001Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kenji Takeuchi, Yoshio Onuma, Sumihiro Ichikawa
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Patent number: 6300558Abstract: A solar cell comprises at least a germanium (Ge) substrate, buffer layers formed on the germanium substrate, a first InxGa1-xAs layer of first conductivity type formed on the buffer layers, and a second InxGa1-xAs layer of second conductivity type formed on the first InxGa1-xAs layer to form pn junction. Because the composition x of In contained in the first InxGa1-xAs layer and the second InxGa1-xAs layer is in a range of 0.005≦x≦0.015, the inexpensive and high conversion efficiency solar cell can be achieved.Type: GrantFiled: April 20, 2000Date of Patent: October 9, 2001Assignee: Japan Energy CorporationInventors: Tatsuya Takamoto, Hiroshi Kurita, Takaaki Agui, Eiji Ikeda
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Patent number: 6281429Abstract: A photoelectric conversion element responsive to a desired conversion efficiency is provided. A photoelectric conversion element including a transparent electrode including a light-receiving face, a photoelectric conversion layer, and a counter electrode is provided, in which a thickness L (m) of the transparent electrode satisfies an equation (1) 1.2×10−2×&rgr;≦L≦4.6/ƒ (1) where &rgr; represents a resistivity (&OHgr;m), and f represents an effective photon flux density loss coefficient (1/m).Type: GrantFiled: July 25, 2000Date of Patent: August 28, 2001Assignee: Fuji Xerox Co., Ltd.Inventors: Hokuto Takada, Yoshiyuki Ono
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Patent number: 6278055Abstract: A stacked organic photosensitive optoelectronic device optimized to enhance desired characteristics such as external quantum efficiency and voltage is described. The photosensitive optoelectronic device has a plurality of photosensitive optoelectronic subcells electrically configured in series. The substrate may be the bottom electrode or there may be a bottom electrode distinct from the substrate. Each subcell comprises one or more organic photoconductive layers between electrode layers or charge transfer layers. In one embodiment the top electrode is transparent. In other embodiments two or more electrodes are transparent. In other embodiments photosensitive optoelectronic devices with multilayer photoconductive structures and photosensitive optoelectronic devices with a reflective layer or a reflective substrate are disclosed.Type: GrantFiled: August 19, 1998Date of Patent: August 21, 2001Assignee: The Trustees of Princeton UniversityInventors: Stephen R. Forrest, Vladimir Bulovic
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Patent number: 6265242Abstract: A process for producing a solar cell module comprising at least a photovoltaic element module is provided. The photovoltaic element module is formed by electrically connecting a plurality of photovoltaic elements with each other, after the individual photovoltaic elements are identified or classified into a plurality of groups which are different from each other in property and attribute. The photovoltaic element module is formed such that at least two kinds of photovoltaic elements having different property and attribute co-exist therein. A solar cell module having at least a photovoltaic element module comprising a plurality of photovoltaic elements electrically connected with each other is also provided; the plurality of photovoltaic elements comprises photovoltaic elements identified or classified into at least two kinds which are different in terms of property and attribute.Type: GrantFiled: February 23, 1999Date of Patent: July 24, 2001Assignee: Canon Kabushiki KaishaInventors: Ayako Komori, Tsutomu Murakami, Akiharu Takabayashi, Takehito Yoshino, Masahiro Mori, Koji Tsuzuki, Takeshi Takada, Yoshifumi Takeyama, Koichi Shimizu, Masaaki Matsushita
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Patent number: 6262359Abstract: A process for fabricating a solar cell is described. The process includes: (1) providing a base layer, (2) fabricating an emitter layer of p-type conductivity on a same side as the non-illuminated surface of the base layer to provide a strongly doped p-type emitter layer and a p-n junction between the n-type base layer and the p-type emitter layer. The base layer of the present invention has n-type conductivity and is defined by an illuminated surface and a non-illuminated surface. The illuminated surface has light energy impinging thereon when the solar cell is exposed to the light energy and the non-illuminated surface is opposite the illuminated surface.Type: GrantFiled: October 7, 1999Date of Patent: July 17, 2001Assignee: Ebara Solar, Inc.Inventors: Daniel L. Meier, Hubert P. Davis, Ruth A. Garcia, Jalal Salami
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Patent number: 6259016Abstract: The present invention includes a substrate, a lower electrode film, a p-type semiconductor layer (a second semiconductor layer), an n-type semiconductor layer (a first semiconductor layer), an upper electrode film and an anti-reflection film, which are stacked sequentially on the substrate in this order, and an interconnection electrode formed on the upper electrode film. The first semiconductor layer is free from Cd, and the second semiconductor layer is a light-absorption layer. The band gap Eg1 of the first semiconductor layer and the band gap Eg2 of the second semiconductor layer satisfy a relationship: Eg1>Eg2. The electron affinity &khgr;1 (eV) of the first semiconductor layer and an electron affinity &khgr;2 (eV) of the second semiconductor layer satisfy a relationship: 0≦(&khgr;2−&khgr;1)<0.5.Type: GrantFiled: February 29, 2000Date of Patent: July 10, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takayuki Negami, Yasuhiro Hashimoto, Shigeo Hayashi
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Patent number: 6242687Abstract: A process for producing a thin film semiconductor solar cell, said solar cell at least comprising: a p-type layer, and an n-type layer, which are deposited on carrier material, wherein the composition of the p-type layer, especially the optical band gap and/or the specific conductivity, and/or the composition of the n-type layer, especially the optical band gap and/or the specific conductivity thereof, are varied on a continuous way in time and/or space, by controlling the composition and/or flow of predetermined gases at the location where the respective semiconductor layer is formed.Type: GrantFiled: March 16, 2000Date of Patent: June 5, 2001Assignee: Universiteit van UtrecthInventor: Rudolf Emmanuel Isidore Schropp
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Patent number: 6242686Abstract: A photovoltaic device have a pin junction of a p-layer, an i-layer and an n-layer, wherein the p-layer includes a first p-layer and a second p-layer thereover, the first p-layer having a thickness of 5 nm or less and being uniformly doped with a p-type impurity, and the second p-layer being formed by decomposition of a gas which does not positively incorporate a p-type impurity.Type: GrantFiled: June 11, 1999Date of Patent: June 5, 2001Assignee: Sharp Kabushiki KaishaInventors: Katsushi Kishimoto, Takanori Nakano, Hitoshi Sannomiya, Katsuhiko Nomoto
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Patent number: 6239355Abstract: A solid state photovoltaic device is formed on a substrate and includes a photoactive channel layer interposed between a pair of electrodes. The photoactive channel layer includes a first material which absorbs light and operates as a hole carrier. Within the first material are nanoparticles of a second material which operate as electron carriers. The nanoparticles are distributed within the photoactive channel layer such that, predominantly, the charge path between the two electrodes at any given location includes only a single nanocrystal. Because a majority of electrons are channeled to the electrodes via single nanocrystal conductive paths, the resulting architecture is referred to as a channel architecture.Type: GrantFiled: October 8, 1999Date of Patent: May 29, 2001Assignee: The Trustees of Columbia University in the City of New YorkInventor: Joshua S. Salafsky
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Patent number: 6229084Abstract: A space solar cell includes a back surface electrode formed on a back surface opposite to a light receiving surface of a semiconductor substrate, and a dielectric layer formed between the back surface electrode and the semiconductor substrate. In the space solar cell, a plurality of openings are formed in the dielectric layer for establishing an electrical connection between the back surface electrode and the semiconductor substrate, and a ratio of an area occupied by the openings relative to an area of the back surface is within a range from 0.25% to 30%.Type: GrantFiled: September 27, 1999Date of Patent: May 8, 2001Assignee: Sharp Kabushiki KaishaInventor: Tomoji Katsu
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Patent number: 6215165Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area. For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.Type: GrantFiled: May 12, 1999Date of Patent: April 10, 2001Assignee: Intel CorporationInventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa, Joseph W. Parks, Jr., Mark A. Beiley, Zong-Fu Li, Cory E. Weber, Shaofeng Yu
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Patent number: 6204522Abstract: A device having two opposite terminals interconnected by material layers for switching between a current conducting state and a state blocking transport of charge carriers between the terminals upon applying a voltage there across has as the material layers a first layer made of intrinsic diamond and a second layer arranged next to the first layer. The device switches to the conducting state by providing free charge carriers in the second layer for transport through the diamond layer through the voltage and the blocking state by stopping providing the free charge carriers for the transport. The diamond layer is adapted to take a major part of the voltage across the terminals in the blocking state.Type: GrantFiled: June 9, 1998Date of Patent: March 20, 2001Assignee: Asea Brown Boveri ABInventors: Hans Bernhoff, Jan Isberg, Peter Isberg, Åke Öberg, Mark Irwin
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Patent number: 6198148Abstract: A photodiode is provided comprising a substrate, a well with a first electric type within the substrate, a heavily doped region with a second electric type within the well, and a insulating layer on the substrate. The insulating layer in the position on the heavily doped region is thinner than in other positions. A junction is thus formed between the heavily doped region and the well.Type: GrantFiled: December 8, 1998Date of Patent: March 6, 2001Assignee: United Microelectronics Corp.Inventor: Jen-Yao Hsu
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Patent number: 6184457Abstract: In a photovoltaic device module comprising a plurality of photovoltaic devices connected electrically through a metal member, an insulating member is so provided as to avoid contact between an edge portion of the photovoltaic device and the metal member. This can provide a photovoltaic device module which is inexpensive, easy to operate and highly reliable.Type: GrantFiled: December 15, 1998Date of Patent: February 6, 2001Assignee: Canon Kabushiki KaishaInventors: Koji Tsuzuki, Tsutomu Murakami, Yoshifumi Takeyama, Koichi Shimizu
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Patent number: 6175142Abstract: A PIN photodiode comprising a P-type layer, an N-type layer, and an I-type layer provided between said, P-type layer and said N-type layer, wherein a junction surface between said I-type layer and said N-type layer is formed by joining a high specific resistance wafer preformed as said I-type layer to a high concentration N-type wafer preformed as said N-type layer. The thickness of said high specific resistance wafer has been adjusted in accordance with the peak value of the wavelength of light rays to be accepted. Therefore, N+ carriers do not exist in the I-type layer and the thickness of the I-type layer can be freely defined, causing the frequency characteristic and the wavelength sensitivity characteristic to be satisfying.Type: GrantFiled: November 24, 1997Date of Patent: January 16, 2001Assignee: Stanley Electric Co., Ltd.Inventor: Toshihiro Ehara
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Patent number: 6166318Abstract: A radiated energy to electrical energy conversion device and technology is provided where there is a single absorber layer of semiconductor material. The thickness of the absorber layer is much less than had been appreciated as being useful heretofore in the art. Between opposing faces the layer is about 1/2 or less of the carrier diffusion length of the semiconductor material which is about 0.02 to 0.5 micrometers. The thickness of the absorber layer is selected for maximum electrical signal extraction efficiency and may also be selected to accommodate diffusion length damage over time by external radiation.Type: GrantFiled: March 3, 1998Date of Patent: December 26, 2000Assignee: Interface Studies, Inc.Inventor: John Lawrence Freeouf
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Patent number: 6146957Abstract: Since the PN junction of a photodiode is formed of a silicon substrate having a low impurity concentration and an epitaxial layer, the width of the depletion layer in the PN junction is formed wider, the parasitic capacitance by the junction capacitance is lowered, and the diffusion length of the silicon substrate is formed longer. Besides, a buried layer containing a high impurity concentration is formed by a high energy ion implantation method in such a depth that the buried layer cannot be depleted by a reverse voltage applied to the PN junction, which is served as a region to lead out the anode, which accordingly results in a low parasitic resistance at the anode. Thereby, the invention provides a semiconductor device including a photodetector and a method of manufacturing the same that achieves a high photoelectric conversion sensitivity and an excellent frequency characteristic at the same time.Type: GrantFiled: March 31, 1998Date of Patent: November 14, 2000Assignee: Sony CorporationInventor: Youichi Yamasaki
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Patent number: 6140570Abstract: A photovoltaic element having a specific transparent and electrically conductive layer on a back reflecting layer, said transparent and electrically conductive layer comprising a zinc oxide material and having a light incident side surface region with a cross section having a plurality of arcs arranged while in contacted with each other, said arcs having a radius of curvature in the range of 300 .ANG. to 6 .mu.m and an angle of elevation from the center of the curvature in the range of 30 to 155.degree., and said cross section containing regions comprising said plurality of arcs at a proportion of 80% or more, compared to the entire region of the cross section.Type: GrantFiled: October 28, 1998Date of Patent: October 31, 2000Assignee: Canon Kabushiki KaishaInventor: Toshimitsu Kariya
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Patent number: 6114740Abstract: The circuit-integrating light-receiving element of this invention includes: a semiconductor substrate of a first conductivity type; a first semiconductor layer of a second conductivity type formed over the semiconductor substrate; a first semiconductor layer of the first conductivity type for dividing the first semiconductor layer into semiconductor regions of the second conductivity type; light-detecting sections being constituted by the divided semiconductor regions and underlying regions of the semiconductor substrate, a divided photodiode being composed of the light-detecting sections; a second semiconductor layer of the second conductivity type formed only in the vicinity of the first semiconductor layer of the first conductivity type functioning as a division section of the divided photodiode and within the regions of the semiconductor substrate forming the respective light-detecting sections; and a second semiconductor layer of the first conductivity type formed in a surface region of the first semiconType: GrantFiled: September 30, 1997Date of Patent: September 5, 2000Assignee: Sharp Kabushiki KaishaInventors: Takahiro Takimoto, Naoki Fukunaga, Masaru Kubo
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Patent number: 6096968Abstract: For the simple production of a back surface field it is proposed that a boron-containing diffusion source layer (2) be applied to the rear (RS) of a silicon wafer (1) and boron be driven into the wafer to a depth of about 1 to 5 .mu.m at 900 to 1200.degree. C. This is done in an oxygen-containing atmosphere so that an oxide layer (4) is formed on open silicon surfaces, obviating the need to mask the regions not to be doped. After the removal of the oxide and source layer, phosphorus diffusion takes place and the back contact (3) is produced. It contains aluminum and, during the burn-in process, provides good ohmic contact.Type: GrantFiled: December 16, 1998Date of Patent: August 1, 2000Assignee: Siemens Solar GmbHInventors: Reinhold Schlosser, Adolf Munzer
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Patent number: 5998851Abstract: An optical waveguide type photodiode has a plurality of semiconductor layers formed one upon another on a semiconductor substrate and including an optical absorption layer sandwiched between a pair of optical confinement layers for guiding incident light in parallel with the semiconductor layers, wherein a light absorption quantity per unit length of an optical waveguide area constituted by the optical absorption layer is substantially constant throughout the entire area thereof. Specifically, the optical confinement factor .GAMMA.(x) of the optical waveguide area is set so as to increase with guided distance x of light. Preferably, a device structure is employed in which the thickness d(x) of the optical absorption layer increases with the guided distance x of light.Type: GrantFiled: December 1, 1997Date of Patent: December 7, 1999Assignee: The Furukawa Electric Co., Ltd.Inventor: Kazuaki Nishikata
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Patent number: 5990415Abstract: A multilayer solar cell with bypass diodes includes a stack of alternating p and n type semiconductor layers 10, 11, 12, 13, 14 arranged to form a plurality of rectifying photovoltaic junctions 15, 16, 17, 18. Contact is made to underlying layers by way of a buried contact structure comprising grooves extending down through all of the active layers, the walls of each groove being doped 33, 34 with n-or p-type impurities depending upon the layers to which the respective contact is to be connected and the grooves being filled with metal contact material 31, 32. One or more bypass diodes are provided by increasing the doping levels on either side 10, 13 of one or more portions of the junctions 16 of the cell such that quantum mechanical tunnelling provides a reverse bias characteristic whereby conduction occurs under predetermined reverse bias conditions. Ideally, the doping levels in the bypass diodes is 10.sup.18 atoms/cm.sup.3 or greater and the junction area is small.Type: GrantFiled: May 29, 1997Date of Patent: November 23, 1999Assignee: Pacific Solar Pty LtdInventors: Martin Andrew Green, Stuart Ross Wenham
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Patent number: 5982012Abstract: The present invention relates to a pixel cell and pixel cell array modified to improve performance. One improvement taught by the present invention is implantation of dopant into the silicon to form the base region after formation of polysilicon, resulting in highest base dopant concentrations lying at the thin oxide and emitter interfaces. A second improvement taught by the present invention is a reduction in the size of the heavily doped portion of the emitter to extend no further than the footprint of the emitter contact, thereby inhibiting leakage between the emitter and adjacent polysilicon. A third improvement taught by the present invention is electronic isolation of pixel cells by inter-pixel regions doped with conductivity-altering impurity of a type opposite that of the base rather than by field oxides, thereby eliminating leakage at the field oxide edge.Type: GrantFiled: January 14, 1998Date of Patent: November 9, 1999Assignee: Foveon, Inc.Inventor: Richard B. Merrill
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Patent number: 5981868Abstract: A solar cell with a heightened open-circuit voltage and improved junction quality of the interface between an interfacial layer (or buffer layer) and a thin-film light absorbing layer is disclosed. A thin-film solar cell is fabricated on a glass substrate and includes a metallic back electrode, a light absorbing layer, an interfacial layer, a window layer, and an upper electrode. The solar cell is characterized by the light absorbing layer. The light absorbing layer is a thin film of p-type Cu(InGa)Se.sub.2 (CIGS) of the Cu-III-VI.sub.2 chalcopyrite structure and has such a gallium concentration gradient that the gallium concentration gradually (gradationally) increases from the surface thereof to the inside, thereby attaining a heightened open-circuit voltage. The light absorbing layer has on its surface an ultrathin-film surface layer of Cu(InGa)(SeS).sub.2 (CIGSS), which has such a sulfur concentration gradient that the sulfur concentration abruptly decreases from the surface thereof (i.e.Type: GrantFiled: April 30, 1997Date of Patent: November 9, 1999Assignee: Showa Shell Sekiyu K.K.Inventors: Katsumi Kushiya, Muneyori Tachiyuki, Takahisa Kase
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Patent number: 5973339Abstract: A waveguide type semiconductor photodetector device comprises a photosensitive section including a photo-absorption layer for converting a signal light into an electric signal, and an optical attenuation section including an optical attenuation layer made of a bulk crystal for attenuating incident light. Assuming that E.sub.g.ATT and E.sub.in are bandgap energy of the optical attenuation layer and optical energy of the incident light signal, respectively, E.sub.in +50 meV.ltoreq.E.sub.g,ATT .ltoreq.E.sub.in +100 meV holds. The optical absorption layer and the optical attenuation layer are made of GaInAs and GaInAsP, respectively, for adapting to incident light of a 1.55 mm wavelength.Type: GrantFiled: November 12, 1997Date of Patent: October 26, 1999Assignee: The Furukawa Electric Co. Ltd.Inventors: Noriyuki Yokouchi, Takeharu Yamaguchi, Junji Yoshida
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Patent number: 5942775Abstract: A photosensing device is provided which has a photojunction structure that includes a junction of a photodiode and a body-junction of a photo-capacitor operating in an inversion mode. The photojunction structure is fabricated with standard complementary MOS (CMOS) technology features and includes an edge that is guarded against known leakage-causing hazards. In one embodiment, the photodiode junction is surrounded by the body-junction of a poly-gate MOS capacitor to form the photojunction. The photojunction can be placed deeply under a surface of the photosensing device by utilizing a deep diode diffusion to exhibit a better response at the red end of the spectrum. In another embodiment, both shallow and deep junction diodes are combined so that the photojunction has a composite depth which can be used to weight the spectral response to favor one or the other end of the light spectrum.Type: GrantFiled: April 30, 1997Date of Patent: August 24, 1999Assignee: Lucent Technologies Inc.Inventor: Aris Antony Yiannoulos
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Patent number: 5898196Abstract: The present invention is a dual epi active pixel sensor cell having a p- region of dual thickness and a method of making the same. The dual epi active pixel sensor cell produces a sensor with improved noise and latch-up reduction and improved red absorption. The thin p- epi region is positioned in the logic region for improved latch-up immunity. The thick p- epi is positioned in the pixel region for improved red absorption.Type: GrantFiled: October 10, 1997Date of Patent: April 27, 1999Assignee: International Business Machines CorporationInventors: Terence B. Hook, Hon-Sum P. Wong
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Patent number: 5883421Abstract: A photodetector based on buried junctions includes a semiconductor structure with two successive p-n junctions, buried at increasing depths, assembled in pairs in opposition, and defining at least three layers. One of the layers is adjacent to a photosensitive portion of the surface of the photodetector. A reverse bias is applied to the junctions, and the values of at least two internal currents passing through such junctions is detected. The internal currents are generated by received light, with each of the junctions corresponding to a particular wavelength of the received light.Type: GrantFiled: March 13, 1997Date of Patent: March 16, 1999Assignee: University Pierre et Marie CurieInventors: Mohamed Ben Chouikha, Guo Neng Lu, Mohamed Sejil, Gerard Sou
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Patent number: 5866935Abstract: A method and apparatus to analyze the aerial image of an optical system using a subwavelength slit. A slit configuration yields a higher signal-to-noise ratio than that achievable with a round aperture. The slit also allows the polarization of the aerial image to be analyzed. In an alternative embodiment a tunneling slit is used. The tunneling slit comprises an optically transparent ridge-like structure mounted to a substrate, the combined structure covered by a thin, planar metal film.Type: GrantFiled: November 25, 1996Date of Patent: February 2, 1999Assignee: Nikon Precision, Inc.Inventor: Michael R. Sogard
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Patent number: 5852322Abstract: A radiation-sensitive detector element has an active area which is formed between two adjoining layer areas of a layer arrangement and within which a conversion of incident electromagnetic radiation into electrical signals takes place. Taking into consideration the penetration depth of the radiation, the position of the active area in relation to the two limiting surfaces is selected in such a way that at least two layer areas for connecting the detector element to an evaluation circuit can be mounted on a surface located opposite the radiation-sensitive surface which is impinged by the incident radiation.Type: GrantFiled: July 25, 1997Date of Patent: December 22, 1998Assignee: Dr. Johannes Heidenhain GmbHInventor: Peter Speckbacher
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Patent number: 5821567Abstract: A light-sensing/emitting diode array chip has impurity diffusion regions with a depth of at least 0.5 .mu.m but not more than 2 .mu.m in a semiconductor substrate. Each impurity diffusion region is preferably divided into a first region, used for emitting or sensing light, and a wider second region, used for electrode contact. The second regions are located on alternate sides of the array line, permitting a small array pitch to be combined with a large contact area. In a wafer process for fabrication of the chips, a diffusion mask has both windows defining the impurity diffusion regions, and dicing line marks. The dicing line marks are narrowed where they pass adjacent to the windows at the ends of the chip. In the electrode fabrication step, a photomask with an enlarged pattern is used, to allow for misalignment with the diffusion mask.Type: GrantFiled: December 11, 1996Date of Patent: October 13, 1998Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuhiko Ogihara, Yukio Nakamura, Takatoku Shimizu, Masumi Taninaka
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Patent number: 5796153Abstract: Variable-response photodetectors adapted to compensate for nonuniformity along an axis of a scintillating crystal by means of multi-element photodiodes and systems for selectively activating different photodiode sub-elements are disclosed, together with arrays of such photodetectors and X-ray detection systems utilizing such photodetectors.Type: GrantFiled: September 12, 1995Date of Patent: August 18, 1998Assignee: Analogic CorporationInventor: Sorin Marcovici
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Patent number: 5726440Abstract: A wavelength selective photodetector including: a substrate having a buried insulator layer for electrically isolating a lower section of the substrate located below the insulator layer from an upper section of the substrate located above the insulator layer; and a photon detector formed on the upper section of the substrate for detecting photons in a selected wavelength range, wherein the upper section has a selected thickness and the thickness determines at least in part the selected wavelength range of the detected photons.Type: GrantFiled: November 6, 1995Date of Patent: March 10, 1998Assignee: Spire CorporationInventors: Nader M. Kalkhoran, Fereydoon Namavar
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Patent number: 5719414Abstract: A photoelectric conversion semiconductor device is characterized in that a second conductivity type impurity region is formed in a first conductivity type semiconductor substrate, the second conductivity type impurity region having a depth of 0.1 .mu.m or less and a peak density of 1.times.10.sup.19 atoms/cm.sup.3 or more. A method of manufacturing a photoelectric conversion semiconductor device is characterized by a step of ion-injecting boron or boron fluoride with a dose amount of 1.times.10.sup.16 to 5.times.10.sup.16 atoms/cm.sup.2 into a semiconductor substrate as an impurity.Type: GrantFiled: March 16, 1994Date of Patent: February 17, 1998Inventors: Keiji Sato, Yutaka Saito, Tadao Akamine, Junko Yamanaka