Abstract: A semiconductor device includes: a first conductive type semiconductor device; a first conductive type drift region formed by epitaxial growth on the semiconductor substrate; a plurality of first conductive type vertical implantation regions formed by multistage ion implantation in the drift region, the vertical implantation regions having a prescribed vertical implantation width and a prescribed drift region width; an anode electrode disposed on the front surface of the drift region opposite to the semiconductor substrate, the anode electrode being in Schottky contact with the drift region and in ohmic contact with the first conductive type vertical implantation regions; and a cathode electrode disposed on the rear surface of the semiconductor substrate opposite to the drift region, the cathode electrode being in ohmic contact with the semiconductor substrate.

Abstract: A semiconductor device includes a source metallization and a semiconductor body. The semiconductor body includes a first field-effect structure including a source region of a first conductivity type electrically coupled to the source metallization and a second field-effect structure including a source region of the first conductivity type electrically coupled to the source metallization. A first gate electrode of the first field-effect structure is electrically coupled to a first gate driver circuit and a second gate electrode of the second field-effect structure is electrically coupled to a second gate driver circuit different from the first gate driver circuit. The first field-effect structure and the second field-effect structure share a common drain.

Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type and formed of a material having a band gap wider than that of silicon; a first layer selectively disposed on a surface of and forming a first junction with the first semiconductor region; a second layer selectively disposed on the first semiconductor region and forming a second junction with the first semiconductor region; a first diode formed by a region including the first junction; a second diode formed by a region including the second junction; and a fourth semiconductor region of a second conductivity type and disposed in the first semiconductor region, between and contacting the first and second junctions. A recess and elevated portion are disposed on the first semiconductor region. The first and the second junctions are formed at different depths. The second diode has a lower built-in potential than the first diode.

Abstract: Various embodiments are provided for graphite and/or graphene based semiconductor devices. In one embodiment, a semiconductor device includes a semiconductor layer and a semimetal stack. In another embodiment, the semiconductor device includes a semiconductor layer and a zero gap semiconductor layer. The semimetal stack/zero gap semiconductor layer is formed on the semiconductor layer, which forms a Schottky barrier. In another embodiment, a semiconductor device includes first and second semiconductor layers and a semimetal stack. In another embodiment, a semiconductor device includes first and second semiconductor layers and a zero gap semiconductor layer. The first semiconductor layer includes a first semiconducting material and the second semi conductor layer includes a second semiconducting material formed on the first semiconductor layer. The semimetal stack/zero gap semiconductor layer is formed on the second semiconductor layer, which forms a Schottky barrier.

Abstract: Reliability of a semiconductor device is improved by suppressing reverse voltage deterioration at the time of reverse bias junction barrier Schottky diode using a substrate containing SiC. In a JBS diode having an active area of 0.1 cm2 or more, an area of a Schottky interface at which a drift layer and a Schottky electrode are contacted can be sufficiently reduced by relatively increasing a ratio of p-type semiconductor region being a junction barrier region in an active region, and thereby deterioration in reverse voltage caused by defects existing in the drift layer is prevented.

Abstract: A Schottky diode includes a deep well formed in a substrate, an isolation layer formed in the substrate, a first conductive type guard ring formed in the deep well along an outer sidewall of the isolation layer and located at a left side of the isolation layer, a second conductive type well formed in the deep well along the outer sidewall of the isolation layer and located at a right side of the isolation layer, an anode electrode formed over the substrate and coupled to the deep well and the guard ring, and a cathode electrode formed over the substrate and coupled to the well. A part of the guard ring overlaps the isolation layer.

Abstract: A wide bandgap semiconductor device includes a first conductive type high-concentration wide bandgap semiconductor substrate, a first conductive type low-concentration wide bandgap semiconductor deposited film which is formed on the semiconductor substrate, a metal film which is formed on the semiconductor deposited film so that a Schottoky interface region is formed between the metal film and the semiconductor deposited film, and a second conductive type region which is formed in a region of the semiconductor deposited film corresponding to a peripheral portion of the metal film, wherein the Schottoky interface region in the semiconductor deposited film is surrounded by the second conductive type region so that periodic island regions are formed in the Schottoky interface region.

Abstract: A semiconductor device with a buried electrode is manufactured by forming a cavity within a semiconductor substrate, forming an active device region in an epitaxial layer disposed on the semiconductor substrate and forming the buried electrode below the active device region in the cavity. The buried electrode is formed from an electrically conductive material different than the material of the semiconductor substrate.

Abstract: A high voltage device having a Schottky diode integrated with a MOS transistor includes a semiconductor substrate a Schottky diode formed on the semiconductor substrate, at least a first doped region having a first conductive type formed in the semiconductor substrate and under the Schottky diode, and a control gate covering a portion of the Schottky diode and the first doped region positioned on the semiconductor substrate.

Abstract: A Schottky barrier device includes a semiconductor substrate, a first contact metal layer, a second contact metal layer and an insulating layer. The semiconductor substrate has a first surface, and plural trenches are formed on the first surface. Each trench includes a first recess having a first depth and a second recess having a second depth. The second recess extends down from the first surface while the first recess extends down from the second recess. The first contact metal layer is formed on the second recess. The second contact metal layer is formed on the first surface between two adjacent trenches. The insulating layer is formed on the first recess. A first Schottky barrier formed between the first contact metal layer and the semiconductor substrate is larger than a second Schottky barrier formed between the second contact metal layer and the semiconductor substrate.

Abstract: The present invention aims to enhance the reliability of a semiconductor device equipped with a Schottky barrier diode within the same chip, and its manufacturing technology. The semiconductor device includes an n-type n-well region formed over a p-type semiconductor substrate, an n-type cathode region formed in part thereof and higher in impurity concentration than the n-well region, a p-type guard ring region formed so as to surround the n-type cathode region, an anode conductor film formed so as to integrally cover the n-type cathode region and the p-type guard ring region and to be electrically coupled thereto, n-type cathode conduction regions formed outside the p-type guard ring region with each separation portion left therebetween, and a cathode conductor film formed so as to cover the n-type cathode conduction regions and to be electrically coupled thereto. The anode conductor film and the n-type cathode region are Schottky-coupled to each other.

Abstract: An integrated circuit structure includes a substrate, a semiconductor device supported by the substrate, and a guard ring structure disposed around the semiconductor device, the guard ring structure forming a Schottky junction. In an embodiment, the Schottky junction is formed from a p-type metal contact and an n-type guard ring. In an embodiment, the guard ring structure is electrically coupled to a positive or negative supply voltage.

Abstract: A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well.

Abstract: A microelectronic device, including: a substrate and a plurality of metal interconnection levels stacked on the substrate; a first metal line of a given metal interconnection level; a second metal line of another metal interconnection level located above the given metal interconnection level, the first and second lines are interconnected via at least one semiconductor connection element extending in a direction forming a nonzero angle with the first metal lines and the second metal line; and a gate electrode capable of controlling conduction of the semiconductor connection element.

Abstract: Embodiments of a gate contact for a semiconductor device and methods of fabrication thereof are disclosed. In one embodiment, a semiconductor device includes a semiconductor structure and a dielectric layer on a surface of the semiconductor structure, where the dielectric layer has an opening that exposes an area of the semiconductor structure. A gate contact for the semiconductor device is formed on the exposed area of the semiconductor structure through the opening in the dielectric layer. The gate contact includes a proximal end on a portion of the exposed area of the semiconductor structure, a distal end opposite the proximal end, and sidewalls that each extend between the proximal end and the distal end of the gate contact. For each sidewall of the gate contact, an air region separates the sidewall and the distal end of the gate contact from the dielectric layer.

Abstract: A method of fabricating a Schottky diode using gallium nitride (GaN) materials includes providing an n-type GaN substrate having a first surface and a second surface. The second surface opposes the first surface. The method also includes forming an ohmic metal contact electrically coupled to the first surface of the n-type GaN substrate and forming an n-type GaN epitaxial layer coupled to the second surface of the n-type GaN substrate. The method further includes forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer and forming a Schottky contact electrically coupled to the n-type AlGaN surface layer.

Abstract: A Schottky contact is disposed atop the surface of the semiconductor. A first Schottky contact metal layer is disposed atop a first portion of the semiconductor surface. A second Schottky contact metal is disposed atop a second portion of the surface layer and joins the first Schottky contact metal layer. A first. Schottky contact metal layer has a lower work function than the second Schottky contact metal layer.

Abstract: A protective element for electronics has at least one Schottky diode and at least one Zener diode which are located between a power supply and the electronics, the anode of the Schottky diode being connected to the power supply and the cathode of the Schottky diode being connected to the electronics, and the cathode and the anode of the Zener diode are connected to ground. The Schottky diode is a trench MOS barrier junction diode or trench MOS barrier Schottky (TMBS) diode or a trench junction barrier Schottky (TJBS) diode and includes an integrated semiconductor arrangement, which has at least one trench MOS barrier Schottky diode and a p-doped substrate, which is used as the anode of the Zener diode.

Abstract: A semiconductor rectifier includes a semiconductor substrate having a first type of conductivity. A first layer, which is formed on the substrate, has the first type of conductivity and is more lightly doped than the substrate. A second layer having a second type of conductivity is formed on the substrate and a metal layer is disposed over the second layer. The second layer is lightly doped so that a Schottky contact is formed between the metal layer and the second layer. A first electrode is formed over the metal layer and a second electrode is formed on a backside of the substrate.

Abstract: A power semiconductor diode is provided. The power semiconductor diode includes a semiconductor substrate having a first emitter region of a first conductivity type, a second emitter region of a second conductivity type, and a drift region of the first conductivity type arranged between the first emitter region and the second emitter region. The drift region forms a pn-junction with the second emitter region. A first emitter metallization is in contact with the first emitter region. The first emitter region includes a first doping region of the first conductivity type and a second doping region of the first conductivity type. The first doping region forms an ohmic contact with the first emitter metallization, and the second doping region forms a non-ohmic contact with the first emitter metallization. A second emitter metallization is in contact with the second emitter region.

Abstract: A semiconductor device and a method of fabricating the semiconductor device is provided. In the method, a semiconductor substrate defining a device region and an outer region at a periphery of the device region is provided, an align trench is formed in the outer region, a dummy trench is formed in the device region, an epi layer is formed over a top surface of the semiconductor substrate and within the dummy trench, a current path changing part is formed over the epi layer, and a gate electrode is formed over the current path changing part. When the epi layer is formed, a current path changing trench corresponding to the dummy trench is formed over the epi layer, and the current path changing part is formed within the current path changing trench.

Abstract: A MOS P-N junction Schottky diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. An ohmic contact and a Schottky contact are formed at different sides of the gate structure. The method for manufacturing such diode device includes several ion-implanting steps to form several doped sub-regions with different implantation depths to constitute the doped regions. The formed MOS P-N junction Schottky diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.

Abstract: A semiconductor device having high breakdown voltage and high reliability without forming an embedded injection layer with high position accuracy. The semiconductor device includes a base as an active area of a second conductivity type formed on a surface layer of a semiconductor layer of a first conductivity type to constitute a semiconductor element; guard rings as a plurality of first impurity regions of the second conductivity type formed on the surface layer of the semiconductor layer spaced apart from each other to respectively surround the base in plan view; and an embedded injection layer as a second impurity region of the second conductivity type embedded in the surface layer of the semiconductor layer to connect at least two bottom portions of the plurality of guard rings.

Abstract: The present invention discloses a trench Schottky barrier diode (SBD) and a manufacturing method thereof. The trench SBD includes: an epitaxial layer, formed on a substrate; multiple mesas, defined by multiple trenches; a field plate, formed on the epitaxial layer and filled in the multiple trenches, wherein a Schottky contact is formed between the field plate and top surfaces of the mesas; a termination region, formed outside the multiple mesas and electrically connected to the field plate; a field isolation layer, formed on the upper surface and located outside the termination region; and at least one mitigation electrode, formed below the upper surface outside the termination region, and is electrically connected to the field plate through the field isolation layer, wherein the mitigation electrode and the termination region are separated by part of a dielectric layer and part of the epitaxial layer.

Abstract: Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. In some embodiments, the selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a high leakage dielectric layer sandwiched between two lower leakage dielectric layers. The low leakage layers can function to restrict the current flow across the selector device at low voltages. The high leakage dielectric layer can function to enhance the current flow across the selector device at high voltages.

Abstract: A device includes a Schottky barrier formed by a metal-semiconductor junction between a semiconductor nanowire and a metal contact. The metal contact at least partly encloses a circumferential area of each nanowire along the length thereof. The nanowire includes a low doped region that is part of the metal-semiconductor junction. The device can be fabricated using a method where two different growth modes are used, the first step including axial growth from a substrate giving a suitable template for formation of the metal-semiconductor junction, and the second step including radial growth enabling control of the doping levels in the low doped region.

Abstract: A method for manufacturing a semiconductor device includes the steps of preparing a substrate made of silicon carbide and having an n type region formed to include a main surface, forming a p type region in a region including the main surface, forming an oxide film on the main surface across the n type region and the p type region, by heating the substrate having the p type region formed therein at a temperature of 1250° C. or more, removing the oxide film to expose at least a part of the main surface, and forming a Schottky electrode in contact with the main surface that has been exposed by removing the oxide film.

Abstract: A semiconductor device includes a first-conductivity-type semiconductor substrate, a first first-conductivity-type semiconductor layer, a second first-conductivity-type semiconductor layer, a second-conductivity-type bottom layer, a Schottky metal, and a cathode electrode. The first first-conductivity-type semiconductor layer is provided on the semiconductor substrate and has a lower first-conductivity-type impurity concentration than the semiconductor substrate. The second first-conductivity-type semiconductor layer is provided on the first first-conductivity-type semiconductor layer and has a higher first-conductivity-type impurity concentration than the first first-conductivity-type semiconductor layer. The Schottky metal is provided on the second first-conductivity-type semiconductor layer. The Schottky metal contacts with partly the first first-conductivity-type semiconductor layer.

Abstract: Disclosed herein are techniques of manufacturing semiconductor devices having a positive-bevel termination and/or a negative-bevel termination. In a particular example, techniques are disclosed for manufacture of a chip-size SiC device having an orthogonal positive-bevel termination used for the reverse blocking junction. The edge termination may be formed, for example, by cutting across a SiC wafer with a V-shaped dicing tool or blade. The cut may be performed by any suitable dicing tool. The cut may be across a p-n junction for forming positive-bevel termination. Subsequently, a surface of the termination may be etched for removing damage caused by the cutting process.

Abstract: This invention reveals a constant current semiconductor device of an N-type or a P-type epitaxial layer on a semi-insulating substrate, the device is treated by using a Schottky barrier to cut off current in conduction channels under certain bias and to provide constant current within cut-off voltage and breakdown voltage region between Schottky barrier section/ohmic contact section as the first electrode and the other ohmic contact section as the second electrode respectively, and has excellent characteristics as lower cut-off voltage (Vkp) than bipolar devices and easily gets higher constant current (Ip) by integrating several constant current units.

Abstract: A semiconductor device having a lateral diode includes a semiconductor layer, a first semiconductor region in the semiconductor layer, a contact region having an impurity concentration greater than that of the first semiconductor region, a second semiconductor region located in the semiconductor layer and separated from the contact region, a first electrode electrically connected through the contact region to the first semiconductor region, and a second electrode electrically connected to the second semiconductor region. The second semiconductor region includes a low impurity concentration portion, a high impurity concentration portion, and an extension portion. The second electrode forms an ohmic contact with the high impurity concentration portion. The extension portion has an impurity concentration greater than that of the low impurity concentration portion and extends in a thickness direction of the semiconductor layer.

Abstract: Semiconductor devices are formed using a thin epitaxial layer (nanotube) formed on sidewalls of dielectric-filled trenches. In one embodiment, a semiconductor device is formed in a first semiconductor layer having trenches and mesas formed thereon where the trenches extend from the top surface to the bottom surface of the first semiconductor layer. The semiconductor device includes semiconductor regions formed on the bottom surface of the mesas of the first semiconductor layer.

Abstract: Provided is a diode element, a detecting device, and the like which solve problems of a conventional lateral diode element. In the conventional element, a semiconductor interface appears in current path between two electrodes on a surface thereof, and thus noise caused by the interface is large. The diode element includes: a first-conductive-type low carrier concentration layer; a first-conductive-type high carrier concentration layer; and a Schottky electrode and an ohmic electrode which are formed on a semiconductor surface. The low carrier layer has a carrier concentration that is lower than that of the high carrier layer. The diode element includes a first-conductive-type impurity introducing region formed below the ohmic electrode, and includes a second-conductive-type impurity introducing region so as not to be in electrical contact with the Schottky electrode on the semiconductor surface between the Schottky and the ohmic.

Abstract: A Schottky barrier diode includes a semiconductor layer having a plurality of trenches formed by digging in from a top surface and having mesa portions formed between adjacent trenches, and a Schottky metal formed to contact the top surface of the semiconductor layer including inner surfaces of the trenches.

Abstract: The present invention is intended to provide a compact and simple optical semiconductor device that reduces crosstalk (leakage current) between light receiving elements. According to the present invention, since a back surface electrode is a mirror-like thin film, crosstalk to an adjacent light receiving element can be suppressed, thereby reducing a detection error of a light intensity. By disposing a patterned back surface electrode or by disposing an ohmic electrode at the bottom of an insulating film over the whole back surface, contact resistance on the back surface can be reduced. By using the optical semiconductor elements with a two-dimensional arrangement and by using a mirror-like thin film as the back surface electrode, crosstalk can be reduced. By accommodating the optical semiconductor elements in the housing in a highly hermetic condition, the optical semiconductor elements can be protected from an external environment.

Abstract: A Schottky diode includes a Schottky barrier and a plurality of dopant regions disposed near the Schottky barrier as floating islands to function as PN junctions for preventing a leakage current generated from a reverse voltage. At least a trench opened in a semiconductor substrate with a Schottky barrier material disposed therein constitutes the Schottky barrier. The Schottky barrier material may also be disposed on sidewalls of the trench for constituting the Schottky barrier. The trench may be filled with the Schottky barrier material composed of Ti/TiN or a tungsten metal disposed therein for constituting the Schottky barrier. The trench is opened in a N-type semiconductor substrate and the dopant regions includes P-doped regions disposed under the trench constitute the floating islands. The P-doped floating islands may be formed as vertical arrays under the bottom of the trench.

Abstract: A diode includes a first semiconductor layer configured by a compound semiconductor containing impurities of a first conductivity type; a high dislocation density region; a second semiconductor layer which is laminated on the first semiconductor layer, which is lower in a concentration of impurities in a region of a side of an interface with the first semiconductor layer than that of the first semiconductor layer, and which has an opening in which a portion which corresponds to the high dislocation density region is removed; an insulating film pattern which is provided to cover an inner wall of the opening; an electrode which is provided so as to cover the insulating film pattern and to contact the second semiconductor layer; and an opposing electrode which is provided to interpose the first semiconductor layer, the second semiconductor layer and the insulating film pattern between the electrode and the opposing electrode.

Abstract: In a rectifier device (2) for full-wave rectifying an output of a vehicle alternating-current generator (1), a schottky barrier diode having a characteristic whose forward voltage drop with respect to a forward current is small and whose reverse leakage current is small, is used as a rectifier semiconductor element (201),(202) constituting the rectifier device (2).

Abstract: An electronic device includes a silicon carbide drift region having a first conductivity type, a Schottky contact on the drift region, and a plurality of junction barrier Schottky (JBS) regions at a surface of the drift region adjacent the Schottky contact. The JBS regions have a second conductivity type opposite the first conductivity type and have a first spacing between adjacent ones of the JBS regions. The device further includes a plurality of surge protection subregions having the second conductivity type. Each of the surge protection subregions has a second spacing between adjacent ones of the surge protection subregions that is less than the first spacing.

Abstract: A semiconductor device includes a pillar formed on a substrate of the same conductivity type. The pillar has a vertical thickness that extends from a top surface down to the substrate. The pillar extends in first and second lateral directions in a loop shape. First and second dielectric regions are disposed on opposite lateral sides of the pillar, respectively. First and second conductive field plates are respectively disposed in the first and second dielectric regions. A metal layer is disposed on the top surface of the pillar, the metal layer forming a Schottky diode with respect to the pillar. When the substrate is raised to a high-voltage potential with respect to both the metal layer and the first and second field plates, the first and second field plates functioning capacitively to deplete the pillar of charge, thereby supporting the high-voltage potential along the vertical thickness of the pillar.

Abstract: Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.

Abstract: A Schottky photodiode may include a monocrystalline semiconductor substrate having a front surface, a rear surface, and a first dopant concentration and configured to define a cathode of the Schottky photodiode, a doped epitaxial layer over the front surface of the monocrystalline semiconductor substrate having a second dopant concentration less than the first dopant concentration, and parallel spaced apart trenches in the doped epitaxial layer and having of a depth less than a depth of the doped epitaxial layer.

Abstract: A high-voltage-resistant semiconductor component (1) has vertically conductive semiconductor areas (17) and a trench structure (5). These vertically conductive semiconductor areas are formed from semiconductor body areas (10) of a first conductivity type and are surrounded by a trench structure (5) on the upper face (6) of the semiconductor component. For this purpose the trench structure has a base (7) and a wall area (8) and is filled with a material (9) with a relatively high dielectric constant (?r). The base area (7) of the trench structure (5) is provided with a heavily doped semiconductor material (11) of the same conductivity type as the lightly doped semiconductor body areas (17), and/or having a metallically conductive material (12).

Abstract: A method and a device for converting energy uses chemical reactions in close proximity to or on a surface to convert a substantial fraction of the available chemical energy of the shorter lived energized products, such as vibrationally excited chemicals and hot electrons, directly into a useful form, such as longer lived charge carriers in a semiconductor. The carriers store the excitation energy in a form that may be converted into other useful forms, such as electricity, nearly monochromatic electromagnetic radiation or carriers for stimulating other surface reactions.

Abstract: A manufacturing method for antenna switching circuit includes the following steps of: providing a GaAs wafer, which includes a capping layer; disposing an isolation layer to the GaAs wafer for forming a device area; and disposing a gate metal on the capping layer within the device area, wherein an interface between the gate metal and the capping layer forms a Schottky contact, and the Schottky contact is parallel connected with an impedance. The present invention also discloses a semiconductor structure for antenna switching circuit.

Abstract: A semiconductor device capable of decreasing a reverse leakage current and a forward voltage is provided. In the semiconductor device, an anode electrode undergoes Schottky junction by being connected to a surface of an SiC epitaxial layer that has the surface, a back surface, and trapezoidal trenches formed on the side of the surface each having side walls and a bottom wall. Furthermore, an edge portion of the bottom wall of each of the trapezoidal trenches is formed to be in the shape bent towards the outside of the trapezoidal trench in the manner that a radius of curvature R satisfies 0.01<L<R<10 L (1) (in the expression (1), L represents the straight-line distance between the edge portions opposite to each other in a width direction of the trench).

Abstract: A Schottky diode includes a first nitride-based semiconductor layer disposed atop a substrate. A second nitride-based semiconductor layer is disposed atop a portion of the first nitride-based semiconductor layer. The second layer has a doping concentration lower than that of the first layer. A first Schottky contact metal layer having a first metal work function is disposed on a top planar surface of the second layer, forming a first Schottky junction. A second Schottky contact metal layer having a second metal work function is disposed atop of and laterally surrounding the first Schottky contact metal layer, the metal work function of the second metal layer is higher than that of the first metal layer. A metal layer disposed on first and second planar surfaces forms an ohmic contact with the first nitride-based semiconductor layer.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type and a first electrode. The second regions are provided separately on a first major surface side of the first layer. The third region is provided on the first major surface side of the first layer so as to surround the second regions. The first electrode is provided on the first layer and the second regions. The first layer has a first portion and a second portion. The second portion has a lower resistivity than the first portion. The second portion is provided between the second regions and between the first portion and the first major surface and is provided outside the third region and between the first portion and the first major surface.

Abstract: A Schottky barrier diode includes a first semiconductor layer, a LOCOS layer arranged in contact with the first semiconductor layer, a Schottky junction region provided on a contact surface between the first semiconductor layer and a first electrode, a second semiconductor layer connected to the first semiconductor layer and having a higher carrier concentration than that of the first semiconductor layer, and a second electrode forming an ohmic contact with the second semiconductor layer. In this case, the Schottky junction region and the LOCOS layer are in contact.

Abstract: A semiconductor assemblage of a super-trench Schottky barrier diode (STSBD) made up of an n+ substrate, an n-epilayer, trenches etched into the n-epilayer that have a width and a distance from the n+ substrate, mesa regions between the adjacent trenches having a width, a metal layer on the front side of the chip that is a Schottky contact and serves as an anode electrode, and a metal layer on the back side of the chip that is an ohmic contact and serves as a cathode electrode, wherein multiple Schottky contacts having a width or distance and a distance between the Schottky contacts, and between the Schottky contact as anode electrode and the first Schottky contact, are located on the trench wall.