Abstract: A device including a layered heterostructure with an oxygen-containing material, with a carbon layer and an amorphous oxygen diffusion barrier protecting the carbon layer from etching by oxygen. One or more of a metal, a carbide or an oxide may be in contact with the amorphous oxygen diffusion barrier that has the lowest free energy of oxide formation in the device. Various devices are disclosed as are varieties of carbon allotropes. Methods of protecting carbon, such as diamond from the oxygen etching in processes such as device manufacture are also disclosed.

Abstract: In the invention, a silica sol prepared by hydrolyzing and condensing a silane compound represented by the following formula: Si(OR1)4 or R2nSi(OR3)4-n wherein R1s, R2(s) and R3(s) may be the same or different when a plurality of them are contained in the molecule and each independently represents a linear or branched C1-4 alkyl group in the presence of a hydrophilic basic catalyst and a hydrophobic basic catalyst is used for a conventional porous-film forming composition.

Abstract: An organic semiconductor material comprising an amine unit having a secondary or tertiary amine structure and a thiophene unit having a thiophene ring structure and preferably the amine unit has the following structure: wherein R1, R2, and R3 independently represent hydrogen, an optionally substituted alkyl group, an optionally substituted alkoxy group, an optionally substituted ether group, or an optionally substituted aryl group and may be same or different from each other.

Abstract: A donor substrate for a flat panel display includes a base film, a light-to-heat conversion layer on the base film, a first buffer layer on the light-to-heat conversion layer, the first buffer layer including an emission host material, a transfer layer on the first buffer layer, and a second buffer layer on the transfer layer, the second buffer layer including an emission host material identical to the emission host material of the first buffer layer.

Abstract: The dielectric constants of SiC and SiCN that are currently the subjects of much investigation are both 4.5 to 5 or so and that of SiOC, 2.8 to 3.0 or so. With further miniaturization of the interconnection size and the spacing of interconnections brought about by the reduction in device size, there have arisen strong demands that dielectric constants should be further reduced. Furthermore, because the etching selection ratio of SiOC to SiCN as well as that of SiOC to SiC are small, if SiCN or SiC is used as the etching stopper film, the surface of the metal interconnection layer may be oxidized at the time of photoresist removal, which gives rise to a problem of high contact resistance.

Abstract: A stabilizing solution for treating photoresist patterns and methods of preventing profile abnormalities, toppling and resist footing are disclosed. The stabilizing solution comprises a non-volatile component, such as non-volatile particles or polymers, which is applied after the photoresist material has been developed. By treating the photoresist with the solution containing a non-volatile component after developing but before drying, the non-volatile component fills the space between adjacent resist patterns and remains on the substrate during drying. The non-volatile component provides structural and mechanical support for the resist to prevent deformation or collapse by liquid surface tension forces.

Abstract: The present invention provides a production method of a semiconductor device, involving formation of a flattening layer and easy process for layers formed on a semiconductor layer, and also provides a semiconductor device preferably produced by such a production method. The present invention further provides an exposure apparatus preferably used in such a production method.

Abstract: A manufacturing method of a semiconductor element provided with a semiconductor layer containing a crystal of an organic semiconductor material of the invention includes the steps of (i) forming a frame (12) on a substrate (base) (11), and (ii) forming the semiconductor layer (crystal (13)) inside the frame (12). The step (ii) includes a crystal forming step in which a solution (21) containing the organic semiconductor material and a liquid medium is placed inside the frame (12) and then the crystal (13) is formed from the solution (21).

Abstract: It is an object of the present invention to manufacture, with high yield, a semiconductor device in which an element that has a layer containing an organic compound is provided over a flexible substrate. A method for manufacturing a semiconductor device includes: forming a separation layer over a substrate; forming an element-formed layer over the separation layer by forming an inorganic compound layer, a first conductive layer, and a layer containing an organic compound and forming a second conductive layer which is in contact with the layer containing an organic compound and the inorganic compound layer; and separating the separation layer and the element-formed layer from each other after pasting a first flexible substrate over the second conductive layer.

Abstract: An adhesive structure for use in a liquid crystal display (LCD) and a method for manufacturing the adhesive structure are provided. The adhesive structure includes a releasing paper which is provided with two anisotropic conductive films (ACFs) thereon. When the adhesive structure is attached onto the LCD, the two ACFs can be simultaneously attached onto the glass substrate of the LCD for connecting the integrated circuit and flexible printed circuit, respectively.

Abstract: Apparatus including a support body; an organic semiconductor composition body on the support body, —and a first body including a hydrogenated vinylaromatic-diene block copolymer on the organic semiconductor composition body. Apparatus including a support body, —a first body including a hydrogenated vinylaromatic-diene block copolymer on the support body; and an organic semiconductor composition body on the first body. Techniques for making an apparatus.

Abstract: A semiconductor device having reliable electrode contacts. First, an interlayer dielectric film is formed from a resinous material. Then, window holes are formed. The interlayer dielectric film is recessed by oxygen plasma. This gives rise to tapering window holes. This makes it easy to make contacts even if the circuit pattern is complex.

Abstract: A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group.

Abstract: A high electron mobility transistor is disclosed which has a main semiconductor region formed on a silicon substrate. The main semiconductor region is a lamination of a buffer layer on the substrate, an electron transit layer on the buffer layer, and an electron supply layer on the electron transit layer. A source, drain, and gate overlie the electron supply layer. Also formed on the electron supply layer is a surface-stabilizing organic semiconductor overlay which is of p conductivity type in contrast to the n type of the electron supply layer.

Abstract: A method for forming self-assembled patterns on a substrate surface is provided. First, a block copolymer layer, which comprises a block copolymer having two or more immiscible polymeric block components, is applied onto a substrate that comprises a substrate surface with a trench therein. The trench specifically includes at least one narrow region flanked by two wide regions, and wherein the trench has a width variation of more than 50%. Annealing is subsequently carried out to effectuate phase separation between the two or more immiscible polymeric block components in the block copolymer layer, thereby forming periodic patterns that are defined by repeating structural units. Specifically, the periodic patterns at the narrow region of the trench are aligned in a predetermined direction and are essentially free of defects. Block copolymer films formed by the above-described method as well as semiconductor structures comprising such block copolymer films are also described.

Abstract: Semiconductor die are typically manufactured as a large group of integrated circuit die imaged through photolithographic means on a semiconductor wafer or slice made of silicon. After manufacture, the silicon wafer is thinned, usually by mechanical means, and the wafer is cut, usually with a diamond saw, to singulate the individual die. The resulting individual integrated circuit has six exposed surfaces. The top surface of the die includes the circuitry images and any passivation layers that have been added to the top layer during wafer fabrication. The present invention describes a method for protecting and insulating all six surfaces of the die to reduce breakage, provide electrical insulation for these layers, and to provide physical surfaces that can be used for bonding one semiconductor die to another for the purpose of stacking die in an interconnected module or component.

Abstract: Provided is a method of producing a semiconductor device having an organic semiconductor layer, which includes the steps of providing a crystallization promoting layer on a substrate; providing an organic semiconductor precursor on the crystallization promoting layer; and applying light energy and thermal energy simultaneously to the organic semiconductor precursor to form a layer containing an organic semiconductor. Thereby, an organic semiconductor device is provided which is low cost and has excellent durability.

Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.

Abstract: The present invention relates to a process for reducing the mobility of an semiconductor (OSC) layer in an electronic device, which has a semiconducting channel area, in specific areas outside said channel area by applying an oxidzing agent to the OSC layer.

Abstract: This invention includes methods of forming trench isolation. In one implementation, isolation trenches are provided within a semiconductor substrate. A liquid is deposited and solidified within the isolation trenches to form a solidified dielectric within the isolation trenches. The dielectric comprises carbon and silicon, and can be considered as having an elevationally outer portion and an elevationally inner portion within the isolation trenches. At least one of carbon removal from and/or oxidation of the outer portion of the solidified dielectric occurs. After such, the dielectric outer portion is etched selective to and effective to expose the dielectric inner portion. After the etching, dielectric material is deposited over the dielectric inner portion to within the isolation trenches.

Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.

Abstract: A method for forming a silicon-containing insulation film on a substrate by plasma polymerization includes: introducing a reaction gas comprising (i) a source gas comprising a silicon-containing hydrocarbon cyclic compound containing at least one vinyl group (Si-vinyl compound), and (ii) an additive gas, into a reaction chamber where a substrate is placed; and applying radio-frequency power to the gas to cause plasma polymerization, thereby depositing an insulation film on the substrate.

Abstract: A process for fabricating an electronic device including: (a) forming a liquid composition using starting ingredients comprising an organic semiconductor and a stabilizer, wherein the stabilizer comprises a strong electron donor compound or a strong electron acceptor compound, wherein the organic semiconductor exhibits a high oxygen sensitivity in a comparison solution without the stabilizer but a lower oxygen sensitivity in the liquid composition; (b) liquid depositing the liquid composition; and (c) drying the liquid composition to form a layer of the electronic device, wherein the layer comprises the organic semiconductor.

Abstract: Method for forming a low dielectric constant structure on a semiconductor substrate by CVD processing. The method comprises using a precursor containing chemical compound having the formula of (R1-R2)n-Si—(X1)4-n, wherein X1 is hydrogen, halogen, acyloxy, alkoxy or OH group, R2 is an optional group and comprises an aromatic group having 6 carbon atoms and R1 is a substituent at position 4 of R2 selected from an alkyl group having from 1 to 4 carbon atoms, an alkenyl group having from 2 to 5 carbon atoms, an alkynyl group having from 2 to 5 carbon atoms, Cl or F; n is an integer 1-3. The present precursors allow for a lowering of the electronic dielectric constant compared to conventional dielectric materials, such as silicon dioxide or phenyl modified organo-containing silicon dioxide.

Abstract: A light emitting device and a method of manufacturing the same are provided.

Abstract: A semiconductor device with a substrate, a first electrode on the substrate, at least one of an injection layer or a transporting layer on the first electrode, an adhesion layer on the at least one of an injection layer or a transporting layer, and a second electrode on the adhesion layer.

Abstract: A semiconductor device and an electro-optical device that ensures a stable output are provided even when there is a change in a source-drain current in a saturated operation region of a thin film transistor due to kink effects. The thin film transistor has a multi-gate structure with a polycrystalline silicon film as an active layer, and a source-side first thin film transistor portion and a drain-side second thin film transistor portion connected in series. The first thin film transistor portion has a drain-side back gate electrode that is connected with a first front gate electrode. The second thin film transistor portion has a source-side back gate electrode that is connected with a second front gate electrode.

Abstract: An extreme low-k (ELK) dielectric film scheme for advanced interconnects includes an upper ELK dielectric layer and a lower ELK dielectric with different refractive indexes. The refractive index of the upper ELK dielectric layer is greater than the refractive index of the lower ELK dielectric layer.

Abstract: There have been problems in that a dedicated apparatus is needed for a conventional method of manufacturing an organic thin film transistor and in that: a little amount of an organic semiconductor film is formed with respect to a usage amount of a material; and most of the used material is discarded. Further, apparatus maintenance such as cleaning of the inside of an apparatus cup or chamber has needed to be frequently carried out in order to remove the contamination resulting from the material that is wastefully discarded. Therefore, a great cost for materials and man-hours for maintenance of apparatus have been required. In the present invention, a uniform organic semiconductor film is formed by forming an aperture between a first substrate for forming the organic semiconductor film and a second substrate used for injection with an insulating film formed at a specific spot and by injecting an organic semiconductor film material into the aperture due to capillarity to the aperture.

Abstract: A method of fabricating a color organic electroluminescent display involves forming cathode electrodes on a substrate, and forming a first organic semiconductor layer having an electron-injection transporting property on the cathode electrodes. Solutions containing organic light-emitting material that can dissolve portions of the first organic semiconductor layer are patterned on the first organic semiconductor layer. Then, a solvent in the solutions is removed to form regions having second organic semiconductor layers and mixed organic semiconductor layers, wherein the second organic semiconductor layers are formed on the first organic semiconductor layer and are mostly composed of the organic light-emitting material, and the mixed organic semiconductor layers, composed of the organic light-emitting material and material constituting the first organic semiconductor layer, are embedded in the first organic semiconductor layer. Anode electrodes are formed over the first and second organic semiconductor layers.

Abstract: A memory device includes a semiconducting polymer film, which includes an organic dopant. The semiconducting polymer film has a first side and a second side. The memory device also includes a first plurality of electrical conductors substantially parallel to each other coupled to the first side of the semiconducting polymer layer, and a second plurality of electrical conductors substantially parallel to each other, coupled to the second side of the semiconducting polymer layer. The first and second pluralities of electrical conductors are substantially mutually orthogonal to each other. Further, an electrical charge is localized on the organic dopant.

Abstract: Disclosed are semiconductor devices containing a polymer dielectric and at least one active device containing an organic semiconductor material and a passive layer. Also disclosed are semiconductor devices further containing a conductive polymer. Such devices are characterized by light weight and robust reliability.

Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.

Abstract: The object of the present invention is to improve the interfacial adhesion between the film with low dielectric constant and protective film, without damaging the excellent dielectric, flatness and gap-filling characteristics of the organic material of low dielectric constant, and for that purpose there is provided a wiring structure with the copper film embedded in the insulation film of the wiring layer, wherein the insulation film of the wiring layer is of a multi-layered structure with the laminated methyl silsesquioxane (MSQ) film, methylated hydrogen silsesquioxane (MHSQ) film and silicon oxide film.

Abstract: A nanoporous antireflection coating preparation method. A sol-gel precursor solution containing an organic template is coated onto a substrate. The sol-gel precursor solution containing the organic template is dried into a film. The organic template within the film is then removed to form a nanoporous antireflection coating. In preferred embodiments, the organic template is removed by UV—O3 treatment at ambient temperature.

Abstract: An organic transistor includes a gate electrode having a predetermined length, source and drain electrodes overlapping the gate electrode in plan view, a channel region formed of the organic semiconductor between the source and drain electrodes, and a functional portion disposed on a first side of the gate electrode in a length direction thereof and connected to the drain electrode through a strip-like connection wiring line. A strip-like dummy connection wiring line is connected to the drain electrode so as to extend toward a second side of the gate electrode in the length direction thereof and has a width that is less than twice the width of the connection wiring line. The connection wiring line extends to or beyond an edge of the gate electrode on the first side, and the dummy connection wiring line extends to or beyond an edge of the gate electrode on the second side.

Abstract: A method for depositing one or more materials on a substrate, such as for example, a semiconductor substrate that includes providing the substrate; applying a polymer film to at least a portion of a surface of the substrate; and exposing the semiconductor substrate to a supercritical fluid containing at least one reactant for a time sufficient for the supercritical fluid to swell the polymer and for the at least one reactant to penetrate the polymer film. The reactant is reacted to cause the deposition of the material on at least a portion of the substrate. The substrate is removed from the supercritical fluid, and the polymer film is removed. The process permits the precise deposition of materials without the need for removal of excess material using chemical, physical, or a combination of chemical and physical removal techniques.

Abstract: Provided is a field-effect transistor (10) which comprises a metal or carbon source electrode (14) and a layer of a functional organic semiconductor (28). A column of an injection material (48) extends through the layer of the functional organic semiconductor (28), the column being in contact with both the source electrode (14) and the layer of the functional organic semiconductor (28). This column (48) facilitates the transfer charge carriers between the source electrode (14) and semiconductor layer (28). The injection material is preferably an organic compound such as 3-hexylthiophene, polyarylamine, poly(3,4-ethylenedioxythiophene)-polystyrenesulphonic acid or polyaniline.

Abstract: A method of forming an organic semiconductor pattern is provided. A pattern is formed on a first substrate. An adhesive is coated on the pattern to form an adhesive pattern. An organic semiconductor layer is formed on a second substrate. The second substrate is combined with the first substrate to remove a portion of the organic semiconductor layer attached to the pattern from the second substrate to form the organic semiconductor pattern.

Abstract: Electrical structures and devices may be formed and include an organic passivating layer that is chemically bonded to a silicon-containing semiconductor material to improve the electrical properties of electrical devices. In different embodiments, the organic passivating layer may remain within finished devices to reduce dangling bonds, improve carrier lifetimes, decrease surface recombination velocities, increase electronic efficiencies, or the like. In other embodiments, the organic passivating layer may be used as a protective sacrificial layer and reduce contact resistance or reduce resistance of doped regions. The organic passivation layer may be formed without the need for high-temperature processing.

Abstract: A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with the electrode pad; a passivation film formed to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; a bump formed to be larger than the opening in the passivation film and to be partially positioned on the passivation film; and a barrier layer which lies between the electrode pad and the bump. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.

Abstract: An extreme low-k (ELK) dielectric film scheme for advanced interconnects includes an upper ELK dielectric layer and a lower ELK dielectric with different refractive indexes. The refractive index of the upper ELK dielectric layer is greater than the refractive index of the lower ELK dielectric layer.

Abstract: Disclosed is a positive photosensitive resin composition containing (A) an alkali-soluble resin, (B) a diazoquinone compound, (d1) an activated silicon compound and (d2) an aluminum complex. Also disclosed is a positive photosensitive resin composition containing (A) an alkali-soluble resin, (B) a diazoquinone compound, (C) a compound having two or more oxetanyl groups in one molecule and (D) a catalyst for accelerating the ring-opening reaction of the oxetanyl groups of the compound (C).

Abstract: Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an arrangement reduces a number of transistor-type voltage controls and associated power consumption, while enabling individual memory cell programming as part of a passive array. Moreover, the system provides for an efficient placement of memory cells on a wafer surface, and increases an amount of die space available for circuit design.

Abstract: The present invention relates to interlayer dielectric materials and pre-applied die attach adhesives, more specifically pre-applied die attach adhesives (such as wafer and other substrate-applied die attach adhesives), methods of applying the interlayer dielectric materials onto substrates to prepare low K dielectric semiconductor chips, methods of applying the pre-applied die attach adhesives onto wafer and other substrate surfaces, and assemblies prepared therewith for connecting microelectronic circuitry.

Abstract: Systems, devices and methods are provided to improve performance of integrated circuits by providing a low-k insulator. One aspect is an integrated circuit insulator structure. One embodiment includes a solid structure of an insulator material, and a precisely determined arrangement of at least one void formed within the solid structure which lowers an effective dielectric constant of the insulator structure. One aspect is a method of forming a low-k insulator structure. In one embodiment, an insulator material is deposited, and a predetermined arrangement of at least one hole is formed in a surface of the insulator material. The insulator material is annealed such that the low-k dielectric material undergoes a surface transformation to transform the arrangement of at least one hole into predetermined arrangement of at least one empty space below the surface of the insulator material. Other aspects are provided herein.

Abstract: A three terminal electrical bistable device that includes a tri-layer composed of an electrically conductive mixed layer sandwiched between two layers of low conductivity organic material that is interposed between a top electrode and a bottom electrode. The conducting mixed layer serves as the middle electrode. The device includes two memory cells composed of electrode/organic layer/mixed layer, where the interfaces between the electrically conductive mixed layer and the low conductivity organic layer exhibit bistable behavior.

Abstract: Organic FETs are produced having high mobilities in the accumulation mode and in the depletion mode. Significantly higher mobility is obtained from FETs in which RR-P3HT film is applied by dip-coating to a thickness of only about 20 ? to 1 ?m. It was found that the structural order of the semiconducting polymer at the interface between the semiconducting polymer and the SiO2 gate-insulator is important for achieving high carrier mobility. Heat-treatment under an inert atmosphere also was found to increase the on/off ratio of the FET.

Abstract: A copper gate electrode, applied in a thin-film-transistor liquid crystal display (LCD) device, at least comprises a patterned copper layer formed on a glass substrate, and a barrier layer formed on the patterned copper layer. The barrier layer comprises at least one of nitrogen and phosphorus, or comprises an alloy formularized as M1M2R wherein M1 is cobalt (Co) or molybdenum (Mo), M2 is tungsten (W), molybdenum (Mo), rhenium (Re) or vanadium (V), and R is boron (B) or phosphorus (P).

Abstract: Hybrid crystalline organic-inorganic quantum confined systems are disclosed, which contain alternating layers of a bifunctional organic ligand and a II-VI semiconducting chalcogenide, wherein the semiconducting chalcogenide layers contain chalcogenides have the formula MQ, in which M is independently selected from II-VI semiconductor cationic species and Q is independently selected from S, Se and Te; and the bifunctional organic ligands of each organic ligand layer are bonded by a first functional group to an element M of an adjacent II-VI semiconducting chalcogenide layer and by a second functional group to an element M from the adjacent opposing II-VI semiconducting chalcogenide layer, so that the adjacent opposing II-VI semiconducting chalcogenide layers are linked by the bifunctional organic ligands of the organic ligand layers. Optical absorption experiments show that these systems produce a significant blue shift in their optical absorption edges, 1.2-1.5 eV, compared to a shift of 1.