Abstract: A low dielectric constant polymer, comprising monomeric units derived from a compound having the general formula I (R1—R2)n—Si—(X1)4-n, wherein each X1 is independently selected from hydrogen and inorganic leaving groups, R2 is an optional group and comprises an alkylene having 1 to 6 carbon atoms or an arylene, R1 is a polycycloalkyl group and n is an integer 1 to 3. The polymer has excellent electrical and mechanical properties.

Abstract: A transistor is provided comprising: a substrate; a gate electrode; a semiconducting material not located between the substrate and the gate electrode; a source electrode in contact with the semiconducting material; a drain electrode in contact with the semiconducting material; and a dielectric material in contact with the gate electrode and the semiconducting material; wherein the semiconducting material comprises: 1-99.9% by weight of a polymer having a dielectric constant at 1 kHz of greater than 3.3; 0.1-99% by weight of a functionalized pentacene compound as described herein.

Abstract: An organic semiconductor device is provided which includes an organic semiconductor layer and an insulating layer. The insulating layer is made of a cured material formed from a composition containing a resin and a crosslinking agent. The resin contains an organic resin having a hydroxyl group. The crosslinking agent contains a compound having at least two crosslinking groups. At least one of the crosslinking groups is a methylol group or an NH group. The composition contains the crosslinking agent in the range of 15 to 45 percent by weight relative to 100 parts by weight in total of the resin and the crosslinking agent.

Abstract: An electronic device including: a pair of electrodes; an organic semiconductor layer; and an organic film formed of organic compounds including nonconjugated organic compounds coupled to at least one of surfaces of the pair of electrodes.

Abstract: The present invention provides a chip and its manufacturing methods and applications. Regarding the chip, there are several solder bumps on the backside of the chip. The difference of the invented chip from the convention chips is that the solder bumps are embedded in an insulting layer and a thermal-plastic material layer of the invented chip backside and separated by a conductive layer from the insulting layer and thermal-plastic material layer. Additionally, there are some end members in the insulting layer, and the end member corresponds to one solder bump. Through the present invention, chips with different functions can be integrated together, so that the needs for having portable communication devices lighter and smaller would be met.

Abstract: Briefly, the present invention provides an electronic device, typically a transistor or a capacitor, comprising at least one electrically conductive electrode and, adjacent to the electrode, a dielectric layer; wherein the dielectric layer comprises a polymeric matrix and, dispersed in the polymeric matrix, metal oxide particles; wherein the metal oxide particles have organic functional groups covalently bound to their surface, and wherein the organic functional groups are not covalently bound to the polymeric matrix. In another aspect, the present invention provides a printable dispersion, typically a jet-printable dispersion, comprising: a) a curable composition and b) metal oxide particles; wherein the metal oxide particles have organic functional groups covalently bound to their surface, and wherein the organic functional groups are not covalently bound to any part of the curable composition.

Abstract: There is provided a field effect transistor having an organic semiconductor layer, including: an organic semiconductor layer containing at least porphyrin; and a layer composed of at least a polysiloxane compound, the layer being laminated on the organic semiconductor layer so as to be in intimate contact with the organic semiconductor layer. As a result, there can be provided a field effect transistor which enables an organic semiconductor layer having high crystallinity and high orientation to be formed and which exhibits a high mobility.

Abstract: In a method of forming a thin film and methods of manufacturing a gate structure and a capacitor, a hafnium precursor including one alkoxy group and three amino groups, and an oxidizing agent are provided on a substrate. The hafnium precursor is reacted with the oxidizing agent to form the thin film including hafnium oxide on the substrate. The hafnium precursor may be employed for forming a gate insulation layer of a transistor or a dielectric layer of a capacitor.

Abstract: The invention relates to an electronic component made primarily from organic materials with high resolution structuring, in particular to an organic field effect transistor (OFET) with a small source-drain distance, and to a production method thereof. The organic electronic component has depressions and/or modified regions in which the conductor tracks/electrodes, which can be metallic, for example, are arranged, and which have been produced by means of a laser during production.

Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.

Abstract: By introducing new concepts into a structure of a conventional organic semiconductor element and without using a conventional ultra thin film, an organic semiconductor element is provided which is more reliable and has higher yield. Further, efficiency is improved particularly in a photoelectronic device using an organic semiconductor. Between an anode and a cathode, there is provided an organic structure including alternately laminated organic thin film layer (functional organic thin film layer) realizing various functions by making an SCLC flow, and a conductive thin film layer (ohmic conductive thin film layer) imbued with a dark conductivity by doping it with an acceptor and a donor, or by the like method.

Abstract: A circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.

Abstract: A method for manufacturing an organic EL device comprising: coating a composition including an organic EL material on a plurality of electrodes to form an organic EL layer on each electrode; defining an effectively optical area in which the plurality of electrodes are formed; and defining a coating area which is broader than the effectively optical area, on which the composition including an organic EL material is to be coated. According to this method, a uniform display device without uneven luminance and uneven chrominance within a pixel or among a plurality of pixels in the effectively optical area can be obtained.

Abstract: It is an object of the present invention to provide, with good yields, a composition for forming an insulation film which allows obtaining an insulation film for a semiconductor device having a low dielectric constant, excellent stress resistance and excellent crack resistance; an insulation film for a semiconductor device formed from the composition for forming an insulation film; and a high quality and highly reliable semiconductor device fabricated using the insulation film for a semiconductor device. This composition for forming an insulation film comprises a polymer of which the main chain is a chain portion which substantially contains only carbon, silicon and hydrogen, and which contains nitrogen in portions other than the main chain. It is preferable that nitrogen exists as a constituent represented by Formula 1 in the polymer.

Abstract: The present invention relates to a method of dedoping an organic semiconductor comprising the step of contacting a doped organic semiconductor with a compound of formula (1): wherein R1-R8 each independently represents a hydrogen atom or a C1-C6 alkyl group which may be linear or branched and which may be optionally substituted with one or more hydroxyl groups and/or one or more halogen atoms and/or a C1-C3 alkoxy group; one or more pairs of R groups which are not hydrogen may join to form a cyclic group according to the following pairings: R1 and R2; R2 and R3; R3 and R4; R4 and R5; R5 and R6; R6 and R7; R7 and R8; and R8 and R1.

Abstract: A device is provided. The device includes a substrate, an inorganic layer disposed over the substrate, and an organic layer disposed on the inorganic conductive or semiconductive layer, such that the organic layer is in direct physical contact with the inorganic conductive or semiconductive layer. The substrate is deformed such that there is a nominal radial or biaxial strain of at least 0.05% relative to a flat substrate at an interface between the inorganic layer and the organic layer. The nominal radial or biaxial strain may be higher, for example 1.5%. A method of making the device is also provided, such that the substrate is deformed after the inorganic layer and the organic layer are deposited onto the substrate.

Abstract: A method and structure for sealing porous dielectrics using silane coupling reagents is herein described. A sealant chain (silane coupling reagent) is formed from at least silicon, carbon, oxygen, and hydrogen and exposed to a porous dielectric material, wherein the sealant chain reacts with a second chain, that has at least oxygen and is present in the porous dielectric defining the pores, to form a continuous layer over the surface of the porous dielectric.

Abstract: In accordance with the present teachings, semiconductor devices and methods of making semiconductor devices and dielectric stack in an integrated circuit are provided. The method of forming a dielectric stack in an integrated circuit can include providing a semiconductor structure including one or more copper interconnects and forming an etch stop layer over the semiconductor structure in a first processing chamber. The method can also include forming a thin silicon oxide layer over the etch stop layer in the first processing chamber and forming an ultra low-k dielectric layer over the thin silicon oxide layer in a second processing chamber, wherein forming the thin silicon oxide layer improves adhesion between the etch stop layer and the ultra low-k dielectric as compared to a dielectric stack that is devoid of the thin silicon oxide layer between the etch stop layer and the ultra low-k dielectric.

Abstract: A semiconductor comprises a compound (A) adsorbed on a surface of the semiconductor, the compound (A) having at least one lone electron pair and substantially not undergoing in oxidation-reduction reactions, wherein the presence of the compound (A) negatively changes a flat band potential of the semiconductor with reference to that when the compound is absent.

Abstract: A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having an affinity for portions of the existing pattern; and allowing at least a portion of the masking material to preferentially assemble to the portions of the existing pattern. The pattern may be comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The first and second regions may be treated to have different surface properties. Structures made in accordance with the method. Compositions useful for practicing the method.

Abstract: A conductive element is formed on a substrate by forming an organometallic layer on at least a portion of a surface of the substrate, heating a portion of the organometallic layer, and removing an unheated portion of the organometallic layer. In other methods, a flowable, uncured conductive material may be deposited on a surface of the substrate, the flowable, uncured conductive material may be selectively cured over at least a portion of the surface of the substrate, and a portion of the cured conductive material may be removed. A conductive via is formed by forming a hole at least partially through a thickness of a substrate, depositing an organometallic material within at least a portion of the hole, and selectively heating at least a portion of the organometallic material.

Abstract: An organic thin-film transistor has a p-type semiconducting layer, wherein the semiconducting layer comprises a crystalline conjugated polyarylamine of the chemical structure: wherein R1 through R5 are independently selected from hydrogen, alkyl having from about 1 to about 30 carbon atoms, aryl having from about 6 to about 40 carbon atoms, heteroaryl having from about 3 to about 40 atoms, alkoxy having from about 1 to about 30 carbon atoms, aryloxy having from about 6 to about 40 carbon atoms, and substituted derivatives thereof; wherein A and B are the same or different independently selected from arylenes having from about 6 to about 20 carbon atoms or heteroarylenes having from about 3 to about 20 carbon atoms; and wherein n is the degree of polymerization; and wherein the polyarylamine has a mobility (?0) of 10?4 cm2/V·sec or greater.

Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.

Abstract: A photosensitive device having at least an insulator layer including a plurality of photoreceiving regions disposed on a substrate. A plurality of conductive patterns is disposed on the insulator layer without covering the photoreceiving regions. A flattened dielectric layer is disposed on the conductive patterns and the insulator layer, wherein a surface of the dielectric layer is higher than a surface of the conductive patterns in a range between 2000 ? to 4000 ?.

Abstract: A microelectronic assembly includes a microelectronic element such as a semiconductor chip or wafer having a first surface and contacts accessible at the first surface, a compliant layer overlying the first surface of the microelectronic element, and conductive protrusions overlying the compliant layer and projecting away from the first surface of the microelectronic element, wherein the conductive protrusions are electrically interconnected with the contacts of the microelectronic element. The conductive protrusions are movable relative to said microelectronic element.

Abstract: A mechanically robust semiconductor structure with improved adhesion strength between a low-k dielectric layer and a dielectric-containing substrate is provided. In particular, the present invention provides a structure that includes a dielectric-containing substrate having an upper region including a treated surface layer which is chemically and physically different from the substrate; and a low-k dielectric material located on a the treated surface layer of the substrate. The treated surface layer and the low-k dielectric material form an interface that has an adhesion strength that is greater than 60% of the cohesive strength of the weaker material on either side of the interface. The treated surface is formed by treating the surface of the substrate with at least one of actinic radiation, a plasma and e-beam radiation prior to forming of the substrate the low-k dielectric material.

Abstract: Macromolecular compounds having a core-shell structure are described. Also described is a process for preparing such macromolecular compounds, and their use as semiconductors in electronic structural elements.

Abstract: A semiconductor device including a first insulating layer having a hydroxyl radical formed over a semiconductor substrate; a line layer having a plurality of line patterns formed over the first insulating layer, the plurality if line patterns being arranged such that a spatial gap is provided therebetween; a fluorine-doped second insulating layer formed in the spatial gap between respective line patterns; and a multilayered diffusion prevention layer including a first oxide layer for suppressing an increase of a dielectric constant between the plurality of line patterns and a second oxide layer for preventing the diffusion of fluorine from the fluorine-doped second insulating layer into the first insulating layer.

Abstract: The invention includes a method of forming a planarized surface over a semiconductor substrate. A substrate is provided which includes a memory array region and a peripheral region proximate the memory array region. The memory array region has a higher average elevational height than the peripheral region. Polysilazane is formed over the memory array region and over the peripheral region. The polysilazane is densified. A material is formed over the polysilazane. The material is planarized while using the densified polysilazane as a stop. The planarization forms a planarized surface which extends over the memory array and peripheral regions. The planarized surface comprises both the densified polysilazane and the material.

Abstract: The present invention provides a field effect transistor that includes a semiconductor layer (15) containing an organic substance, and a first electrode (16), a second electrode (12), and a third electrode (14) that are not in contact with each other at least electrically. The first electrode (16) is arranged above the semiconductor layer (15), the second electrode (12) is arranged below the semiconductor layer (15), and the third electrode (14) is arranged beside the semiconductor layer (15). The semiconductor layer (15) is connected electrically to two electrodes selected from the first electrode (16), the second electrode (12), and the third electrode (14), and the electrically insulating layers (13,17) are interposed between the electrodes (12, 14, 16). The first electrode (16) lies over the semiconductor layer (15) so as to extend beyond the periphery of the semiconductor layer (15).

Abstract: A method of producing an organic-inorganic composite insulating material for electronic element comprises subjecting a mixture of an organic polymer or its solution and a metal alkoxide or its solution as a starting material to sol-gel reaction of the metal alkoxide in the presence of the organic polymer.

Abstract: A high tensile stress capping layer on Cu interconnects in order to reduce Cu transport and atomic voiding at the Cu/dielectric interface. The high tensile dielectric film is formed by depositing multiple layers of a thin dielectric material, each layer being under approximately 50 angstroms in thickness. Each dielectric layer is plasma treated prior to depositing each succeeding dielectric layer such that the dielectric cap has an internal tensile stress.

Abstract: The present memory device has first and second electrodes, a passive layer between the first and second electrodes and on and in contact with the first electrode, and an active layer between the first and second electrodes and on and in contact with the passive layer and second electrode, for receiving a charged specie from the passive layer. The active layer is a mixture of (i) a first polymer, and (ii) a second polymer for enhancing ion transport, improving the interface and promoting a rapid and substantially uniform distribution of the charged specie in the active layer, i.e., preventing a localized injection of the charged species. These features result in a memory element with improved stability, a more controllable ON-state resistance, improved switching speed and a lower programming voltage.

Abstract: Dielectric materials comprising release agents are described. Also described are a process for improving the proccessability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved substrate.

Abstract: A semiconductor method of manufacturing involving low-k dielectrics is provided. The method includes depositing a hydrocarbon of the general composition CxHy on the surface of a low-k dielectric. The hydrocarbon layer is deposited by reacting a precursor material, preferably C2H4 or (CH3)2CHC6H6CH3, using a PECVD process. In accordance with embodiments of this invention, carbon diffuses into the low-k dielectric, thereby reducing low-k dielectric damage caused by plasma processing or etching. Other embodiments comprise a semiconductor device having a low-k dielectric, wherein the low-k dielectric has carbon-adjusted dielectric region adjacent a trench sidewall and a bulk dielectric region. In preferred embodiments, the carbon-adjusted dielectric region has a carbon concentration not more than about 5% less than in the bulk dielectric region.

Abstract: A transistor having at least one of a source electrode and a drain electrode being formed of a porous film is described. The transistor maintains its characteristics even after being subjected to a high temperature and high humidity environment. The transistor may be used in a circuit board, a display and electronic equipment.

Abstract: Underlying coating compositions are provided that comprise one or more resins comprising one or more modified imide groups. These coating compositions are particularly useful as antireflective layers for an overcoated photoresist layer. Preferred systems can be thermally treated to increase hydrophilicity of the composition coating layer to inhibit undesired intermixing with an overcoated organic composition layer, while rendering the composition coating layer removable with aqueous alkaline photoresist developer.

Abstract: A novel barrier layer which protects electronic devices from adverse environmental effects such as exposure to light, especially white light, is described. The barrier layer comprises a copolymer having an acrylate unit and an acrylate unit with a pendant dye group. Also disclosed are processes for producing such electronic devices.

Abstract: By forming a tensile silicon dioxide layer on the basis of a sub-atmospheric deposition technique, the strain-inducing mechanism of a tensile contact etch stop layer for N-channel transistors may be significantly improved. Consequently, for otherwise identical stress conditions, the performance of a respective N-channel transistor may be significantly enhanced.

Abstract: A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width.

Abstract: A semiconductor structure having a pore sealed portion of a dielectric layer is provided. Exposed pores of the dielectric material are sealed using an anisotropic plasma so that pores along the bottom of the opening are sealed, and pores along sidewalls of the opening remain relatively untreated by the plasma. Thereafter, one or more barrier layers may be formed and the opening may be filled with a conductive material. The barrier layers formed over the sealing layer exhibits a more continuous barrier layer. The pores may be partially or completely sealed by plasma bombardment or ion implantation using a gas selected from one of O2, an O2/N2 mixture, H2O, or combinations thereof.

Abstract: An electrical component includes a conductive substrate, a tin layer formed on the substrate, and a conformal coating formed on the tin layer to impede tin whisker growth. The conformal coating comprises a polymer matrix having gas-filled voids dispersed therethrough. In a method for impeding tin whisker growth from a tin plating or finish formed over an electrical component, a gas is infused into a liquid polymer. The tin plating or finish is then covered with a conformal coating comprising the liquid polymer. Then, one or more of the temperature and pressure of the conformal coating are adjusted to thereby create a dispersion of gas-filled voids comprising the gas in the conformal coating.

Abstract: Low dielectric materials and films comprising same have been identified for improved performance when used as interlevel dielectrics in integrated circuits as well as methods for making same. These materials are characterized as having a dielectric constant (?) a dielectric constant of about 3.7 or less; a normalized wall elastic modulus (E0?), derived in part from the dielectric constant of the material, of about 15 GPa or greater; and a metal impurity level of about 500 ppm or less. Low dielectric materials are also disclosed having a dielectric constant of less than about 1.95 and a normalized wall elastic modulus (E0?), derived in part from the dielectric constant of the material, of greater than about 26 GPa.

Abstract: Systems and methodologies are provided for forming three dimensional memory structures that are fabricated from blocks of individual polymer memory cells stacked on top of each other. Such a polymer memory structure can be formed on top of control component circuitries employed for programming a plurality of memory cells that form the stacked three dimensional structure. Such an arrangement provides for an efficient placement of polymer memory cell on a wafer surface, and increases amount of die space available for circuit design.

Abstract: A semiconductor component has at least one organic semiconductor layer. The component also includes at least one protective layer for at least partially covering the at least one organic semiconductor layer to protect against environmental influences. The at least one protective layer contains a proportion of an alkane with CnH2n+1 and n greater than or equal to 15 or consists entirely of an alkane of this type, or of a mixture of alkanes of this type. In one example, the protective layer is a paraffin wax. This creates a high resistance to moisture.

Abstract: The present invention provides a semiconductor device having a multilayer wiring structure including a lower Cu buried-wiring layer, a SiC film, a SiOC film of 400 nm in thickness functioning as an interlayer insulating film, and an upper Cu buried-wiring layer electrically connected to the lower buried-wiring layer through contact plugs passing through the interlayer insulating film. The contact plugs and the upper Cu buried wiring layer are formed a single burying step of the dual damascene process. The SiOC film has a carbon content of about 12 atomic % and a relative dielectric constant of about 3.0. The upper Cu buried wiring layer is formed by burying a Cu film, through a barrier metal, in wiring grooves which are provided in the inter-wiring insulating film including a laminated film of an organic film, e.g., a PAE film of 200 nm in thickness, and a SiOC film of 150 nm in thickness.

Abstract: The invention concerns an insulator for an organic electronic component, in particular, for an organic field-effect transistor (OFET) or for an organic capacitor. The insulating material is characterized in that it includes an almost constant relative dielectric constant, even in case of frequency variation in wide ranges, for example, between 1 Hz and 100 kHz.

Abstract: A siloxane-based resin having a novel structure and a semiconductor interlayer insulating film using the same. The siloxane-based resins have a low dielectric constant in addition to excellent mechanical properties and are useful materials in an insulating film between interconnect layers of a semiconductor device.

Abstract: Structures employing siloxane epoxy polymers as diffusion barriers adjacent conductive metal layers are disclosed. The siloxane epoxy polymers exhibit excellent adhesion to conductive metals, such as copper, and provide an increase in the electromigration lifetime of metal lines. In addition, the siloxane epoxy polymers have dielectric constants less then 3, and thus, provide improved performance over conventional diffusion barriers.

Abstract: A thin film transistor composed of: (a) a semiconductor layer including a thiophene compound, wherein the thiophene compound comprises one or more substituted thiophene units, one or more unsubstituted thiophene units, and optionally one or more divalent linkages; (b) a gate dielectric; and (c) a layer contacting the gate dielectric disposed between the semiconductor layer and the gate dielectric, wherein the layer comprises a substance comprising a fluorocarbon structure.