Using Reduction Or Decomposition Of Gaseous Compound Yielding Solid Condensate, I.e., Chemical Deposition (epo) Patents (Class 257/E21.101)
  • Patent number: 7517772
    Abstract: A method to selectively etch, and hence pattern, a semiconductor film deposited non-selectively is described. In one embodiment, a carbon-doped silicon film is deposited non-selectively such that the film forms an epitaxial region where deposited on a crystalline surface and an amorphous region where deposited on an amorphous surface. A four-component wet etch mixture is tuned to selectively etch the amorphous region while retaining the epitaxial region, wherein the four-component wet etch mixture comprises an oxidizing agent, an etchant, a buffer and a diluent.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: April 14, 2009
    Assignee: Intel Corporation
    Inventors: Willy Rachmady, Anand Murthy
  • Publication number: 20090068822
    Abstract: Provided is a method for preparing a substrate for growing gallium nitride and a gallium nitride substrate. The method includes performing thermal cleaning on a surface of a silicon substrate, forming a silicon nitride (Si3N4) micro-mask on the surface of the silicon substrate in an in situ manner, and growing a gallium nitride layer through epitaxial lateral overgrowth (ELO) using an opening in the micro-mask. According to the method, by improving the typical ELO, it is possible to simplify the method for preparing the substrate for growing gallium nitride and the gallium nitride substrate and reduce process cost.
    Type: Application
    Filed: July 22, 2008
    Publication date: March 12, 2009
    Inventors: Yong-Jin KIM, Ji-Hoon KIM, Dong-Kun LEE, Doo-Soo KIM, Ho-Jun LEE
  • Publication number: 20090060822
    Abstract: A by-product mixture produced when polycrystalline silicon is deposited on a base material in a CVD reactor is made to react with chlorine to form a tetrachlorosilane (STC) effluent in a chlorination reaction vessel, and the tetrachlorosilane (STC) distillate is made to react with hydrogen in a hydrogenation reaction vessel to be converted into trichlorosilane (TCS). In the chlorination step, poly-silane contained in the above described by-product mixture can be efficiently recycled as a raw material for producing the polycrystalline silicon, which can enhance a yield of the production process. In addition, in the chlorination step, methyl chlorosilanes having boiling points close to TCS are hyper-chlorinated to be converted into hyper-chlorinated methyl chlorosilanes having higher boiling points, which facilitates the hyper-chlorinated methyl chlorosilanes to be separated into high concentration, and reduces carbon contamination of the polycrystalline silicon.
    Type: Application
    Filed: August 12, 2008
    Publication date: March 5, 2009
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Takaaki Shimizu, Kyoji Oguro, Takeshi Aoyama
  • Publication number: 20090047760
    Abstract: Electric characteristics of a thin film transistor including a channel formation region including a microcrystalline semiconductor are improved. The thin film transistor includes a gate electrode, a gate insulating film formed over the gate electrode, a microcrystalline semiconductor layer formed over the gate insulating film, a semiconductor layer which is formed over the microcrystalline semiconductor layer and includes an amorphous semiconductor, and a source region and a drain region which are formed over the semiconductor layer. A channel is formed in the microcrystalline semiconductor layer when the thin film transistor is placed in an on state, and the microcrystalline semiconductor layer includes an impurity element for functioning as an acceptor. The microcrystalline semiconductor layer is formed by a plasma-enhanced chemical vapor deposition method.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 19, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Makoto Furuno
  • Publication number: 20090029530
    Abstract: Disclosed herein is a method of manufacturing a thin film semiconductor device includes the step of forming a silicon thin film including a crystalline structure on a substrate by a plasma CVD process in which a high order silane gas represented by the formula SinH2n+2 (n=2, 3, . . . ) and a hydrogen gas are used as film forming gases.
    Type: Application
    Filed: June 30, 2008
    Publication date: January 29, 2009
    Applicant: SONY CORPORATION
    Inventor: Masafumi Kunii
  • Publication number: 20090023274
    Abstract: Hybrid chemical vapor deposition systems for depositing a semiconductor-containing thin film over a substrate comprise a reaction space, a substrate support member configured to permit movement of a substrate in a longitudinal direction and a plasma-generating apparatus disposed in the reaction space and configured to form plasma-excited species of a vapor phase chemical. The systems further comprise a hot wire unit disposed in the reaction space and configured to heat and decompose a vapor phase chemical. The hot wire unit can be a filament. The systems can further comprise an additional reaction space proximate the reaction space. The additional reaction space can comprise a plasma-generating apparatus configured to form plasma-excited species of a vapor phase chemical and a hot wire unit configured to heat and decompose a vapor phase chemical.
    Type: Application
    Filed: July 7, 2008
    Publication date: January 22, 2009
    Inventors: Xinmin Cao, Xunming Deng, Aarohi Vijh
  • Publication number: 20080308786
    Abstract: State-of-the-art synthesis of carbon nanostructures (25) by chemical vapor deposition involve heating a catalyst material to high temperatures up 700-1000° C. in a furnace and flowing hydrocarbon gases through the reactor over a period of time. In order to enable a self assembly of nanostructures (25) on microchips (10) without damaging the microchip (10) by high temperatures the proposed manufacturing method comprises: A layer (1) contains indentations (3) on which nanostructures (25) are to be integrated and the indentations (3) are heated up by a current (I) conducted to the layer (1) via contact pads (2).
    Type: Application
    Filed: May 26, 2001
    Publication date: December 18, 2008
    Applicant: ETH ZURICH/ ETH TRANSFER
    Inventors: Christofer Hierold, Christoph Stampfer, Alain Jungen
  • Publication number: 20080242059
    Abstract: A method for forming a nickel silicide layer on a MOS device with a low carbon content comprises providing a substrate within an ALD reactor and performing an ALD process cycle to form a nickel layer on the substrate, wherein the ALD process cycle comprises pulsing a nickel precursor into the reactor, purging the reactor after the nickel precursor, pulsing a mixture of hydrogen and silane into the reactor, and purging the reactor after the hydrogen and silane pulse. The ALD process cycle can be repeated until the nickel layer reaches a desired thickness. The silane used in the ALD process functions as a getterer for the advantageous carbon, resulting in a nickel layer that has a low carbon content. The nickel layer may then be annealed to form a nickel silicide layer with a low carbon content.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Inventors: Michael L. McSwiney, Matthew V. Metz
  • Patent number: 7407869
    Abstract: A method for manufacturing a free-standing substrate made of a semiconductor material. A first assembly is provided and it includes a relatively thinner nucleation layer of a first material, a support of a second material, and a removable bonding interface defined between facing surfaces of the nucleation layer and support. A substrate of a relatively thicker layer of a third material is grown, by epitaph on the nucleation layer, to form a second assembly with the substrate attaining a sufficient thickness to be free-standing. The third material is preferably a monocrystalline material. Also, the removable character of the bonding interface is preserved with at least the substrate being heated to an epitaxial growth temperature.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: August 5, 2008
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventors: Bruno Ghyselen, Fabrice Letertre, Carlos Mazure
  • Publication number: 20080171424
    Abstract: A method of fabricating a continuous layer of a defect sensitive material on a silicon substrate includes preparing a silicon substrate; forming a nanostructure array directly on the silicon substrate; depositing a selective growth enhancing layer on the substrate; smoothing the selective growth enhancing layer; and growing a continuous layer of the defect sensitive material on the nanostructure array.
    Type: Application
    Filed: January 16, 2007
    Publication date: July 17, 2008
    Inventors: Tingkai Li, Jer-Shen Maa, Douglas J. Tweet, Wei-Wei Zhuang, Sheng Teng Hsu
  • Publication number: 20080153268
    Abstract: A process for coating a substrate at atmospheric pressure comprises the steps of vaporizing a controlled mass of semiconductor material at substantially atmospheric pressure within a heated inert gas stream, to create a fluid mixture having a temperature above the condensation temperature of the semiconductor material, directing the fluid mixture at substantially atmospheric pressure onto the substrate having a temperature below the condensation temperature of the semiconductor material, and depositing a layer of the semiconductor material onto a surface of the substrate.
    Type: Application
    Filed: August 2, 2005
    Publication date: June 26, 2008
    Applicant: SOLAR FIELDS, LLC
    Inventors: Norman W. Johnston, Kenneth R. Kormanyos, Nicholas A. Reiter
  • Patent number: 7365028
    Abstract: The invention includes methods of forming metal oxide and/or semimetal oxide. The invention can include formation of at least one metal-and-halogen-containing material and/or at least one semimetal-and-halogen-containing material over a semiconductor substrate surface. The material can be subjected to aminolysis followed by oxidation to convert the material to metal oxide and/or semimetal oxide. The aminolysis and oxidation can be separate ALD steps relative to one another, or can be conducted in a reaction chamber in a common processing step.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: April 29, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Publication number: 20080090389
    Abstract: To provide a manufacturing method of a semiconductor device, comprising: loading a substrate, with a silicon surface exposed at a part of the substrate, into a processing chamber; heating an inside of said processing chamber; performing pre-processing of supplying at least silane-based gas, halogen-based gas, and hydrogen gas into said processing chamber, removing at least a natural oxide film or a contaminated matter that exist on a surface of said silicon surface, and growing an epitaxial film on said silicon surface; and supplying gas containing at least silicon into said processing chamber after said pre-processing, and further growing the epitaxial film on said epitaxial film.
    Type: Application
    Filed: September 20, 2007
    Publication date: April 17, 2008
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Jie Wang, Yasuhiro Ogawa, Katsuhiko Yamamoto, Takashi Yokogawa
  • Patent number: 7351668
    Abstract: An insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas containing a silane family gas, a second process gas containing a nitriding or oxynitriding gas, and a third process gas containing a carbon hydride gas. This method alternately includes first to fourth steps. The first step performs supply of the first and third process gases to the field while stopping supply of the second process gas to the process field. The second step stops supply of the first to third process gases to the field. The third step performs supply of the second process gas to the field while stopping supply of the first and third process gases to the field. The fourth step stops supply of the first to third process gases to the field.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: April 1, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Pao-Hwa Chou, Kazuhide Hasebe
  • Patent number: 7329554
    Abstract: A GaAlInP compound semiconductor and a method of producing a GaAlInP compound semiconductor are provided. The apparatus and method comprises a GaAs crystal substrate in a metal organic vapor deposition reactor. Al, Ga, In vapors are prepared by thermally decomposing organometallic compounds. P vapors are prepared by thermally decomposing phospine gas, group II vapors are prepared by thermally decomposing an organometallic group IIA or IIB compound. Group VIB vapors are prepared by thermally decomposing a gaseous compound of group VIB. The Al, Ga, In, P, group II, and group VIB vapors grow a GaAlInP crystal doped with group IIA or IIB and group VIB elements on the substrate wherein the group IIA or IIB and a group VIB vapors produced a codoped GaAlInP compound semiconductor with a group IIA or IIB element serving as a p-type dopant having low group II atomic diffusion.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: February 12, 2008
    Assignee: Midwest Research Institute
    Inventors: Mark Cooper Hanna, Robert Reedy
  • Patent number: 7208412
    Abstract: The invention includes methods of forming metal oxide and/or semimetal oxide. The invention can include formation of at least one metal-and-halogen-containing material and/or at least one semimetal-and-halogen-containing material over a semiconductor substrate surface. The material can be subjected to aminolysis followed by oxidation to convert the material to metal oxide and/or semimetal oxide. The aminolysis and oxidation can be separate ALD steps relative to one another, or can be conducted in a reaction chamber in a common processing step.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: April 24, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 7192888
    Abstract: A deposition method includes forming a nucleation layer over a substrate, forming a layer of a first substance at least one monolayer thick chemisorbed on the nucleation layer, and forming a layer of a second substance at least one monolayer thick chemisorbed on the first substance. The chemisorption product of the first and second substance may include silicon and nitrogen. The nucleation layer may comprise silicon nitride. Further, a deposition method may include forming a first part of a nucleation layer on a first surface of a substrate and forming a second part of a nucleation layer on a second surface of the substrate. A deposition layer may be formed on the first and second parts of the nucleation layer substantially non-selectively on the first part of the nucleation layer compared to the second part. The first surface may be a surface of a borophosphosilicate glass layer. The second surface may be a surface of a rugged polysilicon layer.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: March 20, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Garry A. Mercaldi
  • Patent number: 7183208
    Abstract: The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: February 27, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Trung Tri Doan, Lyle D. Breiner, Er-Xuan Ping, Lingyi A. Zheng
  • Patent number: 7153726
    Abstract: A semiconductor device is attached to a heat sink by glue that is both thermally conductive and magnetically permeable. The glue fills different features in the surface of the semiconductor device so that there is good coupling between the semiconductor device and the heat sink. The glue is filled with magnetic particles so that the glue is magnetically permeable. The semiconductor device is formed with the heat sink at the wafer level and then singulated after attachment of the heat sink with the glue.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: December 26, 2006
    Assignee: Freescale Semiconductor, Inc
    Inventors: Scott K. Pozder, Michelle F. Rasco
  • Patent number: 7135389
    Abstract: A laser irradiation method using a laser crystallization method which can heighten an efficiency of substrate processing as compared to a conventional one and also heighten mobility of a semiconductor film is provided. It is an irradiation method of a laser beam in which, pattern information of a sub-island formed on a substrate is stored, and a beam spot of a laser beam is condensed so as to become linear, and by use of the stored pattern information, a scanning path of the beam spot is determined so as to include the sub-island, and by moving the beam spot along the scanning path, the laser beam is irradiated to the sub-island, characterized in that on the occasion of scanning the beam spot, when the beam spot has reached to the sub-island, the beam spot and the sub-island are contacted at a plurality of points.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: November 14, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Chiho Kokubo, Aiko Shiga, Koichiro Tanaka, Hidekazu Miyairi, Koji Dairiki