Abstract: In one aspect, the invention is formulations comprising both organoaminohafnium and organoaminosilane precursor compounds that allows anchoring both silicon-containing fragments and hafnium-containing fragments onto a given surface having hydroxyl groups to deposit silicon doped hafnium oxide having a silicon doping level ranging from 0.5 to 8 mol %, suitable as ferroelectric material. In another aspect, the invention is methods and systems for depositing the silicon doped hafnium oxide films as ferroelectric materials using the formulations.

Abstract: A method for forming a semiconductor contact structure is provided. The method includes depositing a dielectric layer over a substrate. The method also includes etching the dielectric layer to expose a sidewall of the dielectric layer and a top surface of the substrate. In addition, the method includes forming a silicide region in the substrate. The method also includes applying a plasma treatment to the sidewall of the dielectric layer and the top surface of the substrate to form a nitridation region adjacent to a periphery of the silicide region. The method further includes depositing an adhesion layer on the dielectric layer and the silicide region.

Abstract: In one aspect, the invention is formulations comprising both organoaminohafnium and organoaminosilane precursors that allows anchoring both silicon-containing fragments and hafnium-containing fragments onto a given surface having hydroxyl groups to deposit silicon doped hafnium oxide having a silicon doping level ranging from 0.5 to 8 mol %, preferably 2 to 6 mol %, most preferably 3 to 5 mol %, suitable as ferroelectric material. In another aspect, the invention is methods and systems for depositing the silicon doped hafnium oxide films using the formulations.

Abstract: Examples of a method for manufacturing a semiconductor device include forming an initial film having a film thickness of 1 to 3 nm made of a metal or a metal nitride by applying plasma film formation with plasma power of 0.07 to 0.30 W/cm2 and an RF pulse width within a range of 0.1 to 1 sec, and forming, after forming the initial film, a bulk film made of a metal or metal nitride on the initial film by applying plasma film formation with plasma power higher than the plasma power when the initial film is formed.

Abstract: A gas delivery system for a processing chamber includes a first channel for delivering a first chemistry and a second channel for delivering a second chemistry. The first channel includes a first outlet valve and the second channel includes a second outlet valve. A trickle gas source is connected to both the first and the second channels. A first junction is coupled to the first outlet valve and a second junction is connected to the second outlet valve. A common conduit connects between the first junction and the second junction. The first junction includes an input to provide a push gas from a push gas source and the second junction includes an output to a processing chamber. During operation, one of the first channel or the second channel is active at one time. A trickle gas from a trickle gas source is flowed into an active one and a non-active one of the first or second channels.

Abstract: Providing for a resistive switching memory device is described herein. By way of example, the resistive switching memory device can comprise a bottom electrode, a conductive layer, a resistive switching layer, and a top electrode. Further, two or more layers can be selected to mitigate mechanical stress on the device. In various embodiments, the resistive switching layer and conductive layer can be formed of compatible metal nitride or metal oxide materials having different nitride/oxide concentrations and different electrical resistances. Further, similar materials can mitigate mechanical stress on the resistive switching layer and a conductive filament of the resistive switching memory device.

Abstract: A method for forming a semiconductor device includes forming a barrier layer over a dielectric layer, a concentration of an impurity in the barrier layer increasing as the barrier layer extends away from the dielectric layer; and performing a plasma process to treat the barrier layer.

Abstract: Ultra-low-k dielectric materials used as inter-layer dielectrics in high-performance integrated circuits are prone to be structurally unstable. The Young's modulus of such materials is decreased, resulting in porosity, poor film strength, cracking, and voids. An alternative dual damascene interconnect process incorporates air gaps into a high modulus dielectric material to maintain structural stability while reducing capacitance between adjacent nanowires. Incorporation of an air gap having k=1.0 compensates for the use of a higher modulus film having a dielectric constant greater than the typical ultra-low-k (ULK) dielectric value of about 2.2. The higher modulus film containing the air gap is used as an insulator between adjacent metal lines, while a ULK film is retained to insulate vias. The dielectric layer between two adjacent metal lines thus forms a ULK/high-modulus dielectric bi-layer.

Abstract: A carrying device includes a main body, a grasping portion, a heat-exchanging module and a gas chamber device. The grasping portion is connected to the main body for grasping a semiconductor element. The heat-exchanging module is disposed on the main body. The gas chamber device includes a case body and a gas. The case body is disposed between the grasping portion and the heat-exchanging module, and has a closed chamber therein. The gas fills the closed chamber for transferring heat from the semiconductor element to the heat exchanging module, in which a specific heat capacity of the gas is about between 5000 J/(kg·K)-15000 J/(kg·K).

Abstract: A method of fabricating a semiconductor device includes feeding a suppression gas, a source gas, a reactive gas, and a purge gas including an inert gas, into a process chamber in which a substrate is disposed. The suppression gas suppresses the physical adsorption of the source gas onto the substrate. As a result, a thin film is formed on the substrate.

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, an oxide semiconductor layer, a gate insulating film, a gate electrode, a first insulating film and a second insulating film. The oxide semiconductor layer is provided on the insulating substrate and includes first and second low-resistance regions and a high-resistance region between the first and second low-resistance regions. The gate insulating film is provided on the high-resistance region of the oxide semiconductor layer. The gate electrode is provided on the gate insulating film. The first insulating film is provided above the gate electrode, gate insulating film and first and second low-resistance regions of the oxide semiconductor layer, and contains at least fluorine. The second insulating film is provided on the first insulating film, and contains aluminum.

Abstract: Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×1021 atoms per cubic centimeter (at./cm3). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.

Abstract: Provided herein are methods of tungsten nitride (WN) deposition. Also provided are stacks for tungsten (W) contacts to silicon germanium (SiGe) layers and methods for forming them. The stacks include SiGe/tungsten silicide (WSix)/WN/W layers, with WSix providing an ohmic contact between the SiGe and WN layers. Also provided are methods for reducing fluorine (F) attack of underlying layers in deposition of W-containing films using tungsten hexafluoride (WF6). Apparatuses to perform the methods are also provided.

Abstract: According to embodiments, a semiconductor memory device includes a plurality of control gate electrodes laminated on a substrate. A first semiconductor layer has one end connected to the substrate, has a longitudinal direction in a direction intersecting with the substrate, and is opposed to the plurality of control gate electrodes. An electric charge accumulating layer is positioned between this control gate electrode and the first semiconductor layer. A first contact has one end connected to the substrate and another end connected to a source line. A second contact has one end connected to the substrate and another end connected to a wiring other than the source line. The first contact includes a first silicide layer arranged on the substrate. The second contact includes a second silicide layer arranged on the substrate. The first silicide layer has a higher temperature resistance than the second silicide layer.

Abstract: A method for forming a Boron doped metallic film, such as Titanium Boron Nitride, is disclosed. The method allows for creation of the metallic film with a high work function and low resistivity, while limiting the increase in effective oxide thickness. The method comprises a thin metallic layer deposition step as well as a Boron-based gas pulse step. The Boron-based gas pulse deposits Boron and allows for the removal of excess halogens within the metallic film. The steps may be repeated in order to achieve a desired thickness of the metallic film.

Abstract: A method for manufacturing a semiconductor device includes providing a substrate, performing a nucleation process on the substrate to form a nucleation layer of a metal, performing a first deposition process at a first temperature on the nucleation layer to form a first layer of the metal, etching back the first layer of the metal using a first gas, cleaning the substrate including the etched back first layer of the metal using a second gas, and performing a second deposition process to form a second layer of the metal on the etched back first layer of the metal. By cleaning the substrate and the etched-back first layer of the metal using the second gas, the thickness fluctuation of the deposited metal layer from wafer to wafer is significantly reduced.

Abstract: Methods of fabricating a semiconductor device include forming a lower interlayer insulating layer and a conductive base structure, and forming a middle interlayer insulating layer covering the lower interlayer insulating layer and the conductive base structure. The methods include etching the middle interlayer insulating layer to form a via hole and an interconnection trench vertically aligned with the via hole, and forming a via barrier layer on inner walls of the via hole and an interconnection barrier layer on inner walls and a bottom of the interconnection trench, the via barrier layer not being formed on an upper surface of the conductive base structure The methods include forming a via plug on the via barrier layer to fill the via hole, forming a seed layer on the interconnection trench and the via plug, forming an interconnection electrode on the seed layer, and forming an interconnection capping layer on the interconnection electrode.

Abstract: Methods for depositing a contact metal layer in contact structures of a semiconductor device are provided. In one embodiment, a method for depositing a contact metal layer for forming a contact structure in a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a contact metal layer on a substrate and annealing the contact metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the contact metal layer on the substrate, exposing the portion of the contact metal layer to a plasma treatment process, and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the contact metal layer to a plasma treatment process until a predetermined thickness of the contact metal layer is achieved.

Abstract: Films comprising Aluminum, carbon and a metal, wherein the aluminum is present in an amount greater than about 16% by elemental content and the film has less than about 50% carbon. Methods of forming the films comprise exposing a substrate to a metal halide precursor, purging the metal halide precursor from the processing chamber and then exposing the substrate to an alkyl aluminum precursor and an alane precursor, either sequentially or simultaneously. The alane precrursor comprises an amine-alane and a stabilizing amine selected from one or more of diemthylcyclohexylamine or dicyclomethylhexylamine.

Abstract: In a method of forming a tungsten film, an initial tungsten film and a main tungsten film are formed on an underlying film of a substrate. The initial tungsten film is formed on the underlying film by sequentially supplying a tungsten chloride gas and a reduction gas into a chamber while supplying a purging gas between the supplies of the tungsten chloride gas and the reduction gas, or by simultaneously supplying the tungsten chloride gas and the reduction gas. The main tungsten film is formed on the initial tungsten film by sequentially supplying the tungsten chloride gas and the reduction gas into the chamber while purging an inside of the chamber between the supplies of the tungsten chloride gas and the reduction gas. A supply amount of the tungsten chloride gas in forming the initial film is smaller than that in forming the main tungsten film.

Abstract: A method for forming an isolation member in a trench of a substrate may include the following steps: performing a first deposition process to form a first isolation material set, which is at least partially positioned in the trench; partially removing the first isolation material set, such that a remaining portion of the first isolation material set remains in the trench; after the first isolation material set has been partially removed, performing a fluorine-reduction process on at least the remaining portion of the first isolation material set; after the fluorine-reduction process, performing a second deposition process to form a second isolation material set, which is at least partially positioned in the trench, wherein the second isolation material set includes the remaining portion of the first isolation material set; and processing the second isolation material set for forming the isolation member.

Abstract: A method of fabricating a semiconductor device includes providing a wafer in a chamber of a point-cusp magnetron physical vapor deposition (PCM-PVD) apparatus, the chamber including a metal target. The method further includes providing an inert gas and a reactive gas in the chamber and forming an amorphous conductive layer on the wafer by reacting the reactive gas with a metal atom separated from the metal target by the inert gas.

Abstract: A HKMG device with PMOS eSiGe source/drain regions is provided. Embodiments include forming first and second HKMG gate stacks on a substrate, each including a SiO2 cap, forming extension regions at opposite sides of the first HKMG gate stack, forming a nitride liner and oxide spacers on each side of HKMG gate stack; forming a hardmask over the second HKMG gate stack; forming eSiGe at opposite sides of the first HKMG gate stack, removing the hardmask, forming a conformal liner and nitride spacers on the oxide spacers of each of the first and second HKMG gate stacks, and forming deep source/drain regions at opposite sides of the second HKMG gate stack.

Abstract: A method of sealing a first wafer and a second wafer each made of semiconducting materials, including: implanting a metallic species in at least the first wafer, assembling the first wafer and the second wafer by molecular bonding, and after the molecular bonding, forming a metallic ohmic contact including alloys formed between the implanted metallic species and the semiconducting materials of the first wafer and the second wafer, the metallic ohmic contact being formed at an assembly interface between the first wafer and the second wafer, wherein the forming includes causing the implanted metallic species to diffuse towards the interface between the first wafer with the second wafer and beyond the interface.

Abstract: Semiconductor devices, and a method of manufacturing the same, include a gate insulating film pattern over a semiconductor substrate. A gate electrode is formed over the gate insulating film pattern. A spacer structure is formed on at least one side of the gate electrode and the gate insulating film pattern. The spacer structure includes a first insulating film spacer contacting the gate insulating film pattern, and a second insulating film spacer on an outer side of the first insulating film spacer. The semiconductor device has an air gap between the first insulating film spacer and the second insulating film spacer.

Abstract: A manufacturing method of a semiconductor device includes the following steps. Firstly, a lower electrode is formed over a substrate (semiconductor substrate). Successively, the lower electrode is primarily crystallized. Successively, a capacitance dielectric layer is formed over the lower electrode after primarily crystallized. Successively, the capacitance dielectric layer is secondarily crystallized. Then, an upper electrode is formed over the capacitance dielectric layer.

Abstract: The embodiments of the present invention provide a Ge-based NMOS device structure and a method for fabricating the same. By using the method, double dielectric layers of germanium oxide (GeO2) and metal oxide are deposited between the source/drain region and the substrate. The present invention not only reduces the electron Schottky barrier height of metal/Ge contact, but also improves the current switching ratio of the Ge-based Schottky and therefore, it will improve the performance of the Ge-based Schottky NMOS transistor. In addition, the fabrication process is very easy and completely compatible with the silicon CMOS process. As compared with conventional fabrication method, the Ge-based NMOS device structure and the fabrication method in the present invention can easily and effectively improve the performance of the Ge-based Schottky NMOS transistor.

Abstract: Methods of producing low resistivity tungsten bulk layers having low roughness and associated apparatus are provided. According to various embodiments, the methods involve CVD deposition of tungsten at high pressures and/or high temperatures. In some embodiments, the CVD deposition occurs in the presence of alternating nitrogen gas pulses, such that alternating portions of the film are deposited by CVD in the absence of nitrogen and in the presence of nitrogen.

Abstract: A metal-oxide-metal capacitor comprises a first electrode, a second electrode, a plurality of first fingers and a plurality of second fingers. Each first finger and its corresponding second finger are in parallel and separated by a low k dielectric material. A guard ring is employed to enclose the metal-oxide-metal capacitor so as to prevent moisture from penetrating into the low k dielectric material.

Abstract: A method for fabricating a thin film photovoltaic device. The method includes providing a substrate comprising an absorber layer and an overlying window layer. The substrate is loaded into a chamber and subjected to a vacuum environment. The vacuum environment is at a pressure ranging from 0.1 Torr to about 0.02 Torr. In a specific embodiment, a mixture of reactant species derived from diethylzinc species, water species and a carrier gas is introduced into the chamber. The method further introduces a diborane species using a selected flow rate into the mixture of reactant species. A zinc oxide film is formed overlying the window layer to define a transparent conductive oxide using the selected flow rate to provide a resistivity of about 2.5 milliohm-cm and less and an average grain size of about 3000 to 5000 Angstroms.

Abstract: Disclosed herein is a nanowire including silicon rich oxide and a method for producing the same. The nanowire exhibits excellent electrically conducting properties and optical characteristics, and therefore is effectively used in a variety of applications including, for example, solar cells, sensors, photodetectors, light emitting diodes, laser diodes, EL devices, PL devices, CL devices, FETs, CTFs, surface plasmon waveguides, MOS capacitors and the like.

Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.

Abstract: Novel low-resistivity tungsten film stack schemes and methods for depositing them are provided. The film stacks include a mixed tungsten/tungsten-containing compound (e.g., WC) layer as a base for deposition of tungsten nucleation and/or bulk layers. According to various embodiments, these tungsten rich layers may be used as barrier and/or adhesion layers in tungsten contact metallization and bitlines. Deposition of the tungsten-rich layers involves exposing the substrate to a halogen-free organometallic tungsten precursor. The mixed tungsten/tungsten carbide layer is a thin, low resistivity film with excellent adhesion and a good base for subsequent tungsten plug or line formation.

Abstract: Methods of improving the uniformity and adhesion of low resistivity tungsten films are provided. Low resistivity tungsten films are formed by exposing the tungsten nucleation layer to a reducing agent in a series of pulses before depositing the tungsten bulk layer. According to various embodiments, the methods involve reducing agent pulses with different flow rates, different pulse times and different interval times.

Abstract: A substrate having, on a base material, a barrier film for preventing copper diffusion containing one or more metal elements selected from tungsten, molybdenum and niobium, a metal element having a catalytic function in electroless plating such as ruthenium, rhodium, and iridium, and nitrogen contained in the form of a nitride of the aforementioned one or more metal elements selected from tungsten, molybdenum and niobium. The barrier film for preventing copper diffusion is manufactured by sputtering in a nitrogen atmosphere using a target containing one or more metal elements selected from tungsten, molybdenum and niobium and the aforementioned metal element having a catalytic function in electroless plating.

Abstract: A method for fabricating a thin film photovoltaic device. The method includes providing a substrate comprising an absorber layer and an overlying window layer. The substrate is loaded into a chamber and subjected to a vacuum environment. The vacuum environment is at a pressure ranging from 0.1 Torr to about 0.02 Torr. In a specific embodiment, a mixture of reactant species derived from diethylzinc species, water species and a carrier gas is introduced into the chamber. The method further introduces a diborane species using a selected flow rate into the mixture of reactant species. A zinc oxide film is formed overlying the window layer to define a transparent conductive oxide using the selected flow rate to provide a resistivity of about 2.5 milliohm-cm and less and an average grain size of about 3000 to 5000 Angstroms.

Abstract: A semiconductor device includes: a semiconductor layer composed of one of GaAs based semiconductor, InP-based semiconductor, and GaN-based semiconductor; a first silicon nitride film that is provided on the semiconductor layer, and of which an end portion is in contact with a surface of the semiconductor layer; a protective film that is composed of one of polyimide and benzocyclobutene, and is provided on the semiconductor layer and the first silicon nitride film, the protective film covering the end portion of the first silicon nitride film; and a first metallic layer that is composed of one of titanium, tantalum and platinum, and is continuously provided from a first portion located between the semiconductor layer and the protective film to a second portion located between the end portion of the first silicon nitride film and the protective film, the first metallic layer being in contact with the surface of the semiconductor layer and a surface of the end portion of the first silicon nitride film.

Abstract: Heater elements made of high resistivity ternary and quaternary thin films containing three or more of W, C, O, N and Si are provided. The thin films have resistivities at least about 1000 ??-cm at 50 to 60 Angstroms. The ternary and quaternary films have improved stability over binary films on anneal. Methods of depositing the thin films are also provided. The methods involve depositing the film from an organometallic tungsten precursor under conditions such that a highly resistive, continuous film is formed.

Abstract: Novel low-resistivity tungsten film stack schemes and methods for depositing them are provided. The film stacks include a mixed tungsten/tungsten-containing compound (e.g., WC) layer as a base for deposition of tungsten nucleation and/or bulk layers. According to various embodiments, these tungsten rich layers may be used as barrier and/or adhesion layers in tungsten contact metallization and bitlines. Deposition of the tungsten-rich layers involves exposing the substrate to a halogen-free organometallic tungsten precursor. The mixed tungsten/tungsten carbide layer is a thin, low resistivity film with excellent adhesion and a good base for subsequent tungsten plug or line formation.

Abstract: A method of forming a layer of alpha-tantalum on a substrate including the steps of depositing a layer of titanium nitride on a substrate; and depositing a layer of alpha-tantalum on the layer of titanium nitride, wherein the deposition of the alpha-tantalum is carried out at temperatures below about 300° C.

Abstract: A nitride semiconductor light emitting diode (LED) comprises an n-type nitride semiconductor layer; an electron emitting layer formed on the n-type nitride semiconductor layer, the electron emitting layer being composed of a nitride semiconductor layer including a transition element of group III; an active layer formed on the electron emitting layer; and a p-type nitride semiconductor layer formed on the active layer.

Abstract: A method for forming a semiconductor structure is provided. The method includes providing a substrate; forming a dielectric layer on the substrate; forming a conductor pattern on a main surface of the dielectric layer, the conductor pattern having a top surface and sidewalls; and performing a selective atomic layer deposition (ALD) process to selectively deposit a conformal metal layer onto the top surface and sidewalls of the conductor pattern, but without depositing onto the main surface of the dielectric layer substantially.

Abstract: Provided is a method for manufacturing a dual gate in a semiconductor device. The method includes forming a gate insulating layer and a gate conductive layer on a semiconductor substrate, forming a diffusion barrier layer on the gate conductive layer, forming a barrier metal layer on the diffusion barrier layer, depositing a first gate metal layer on the barrier metal layer, forming a metal nitride barrier layer on a surface of the first gate metal layer by supplying nitrogen (N2) plasma on the first gate metal layer, forming a second gate metal layer on the metal nitride barrier layer, and forming a hard mask layer on the second gate metal layer.

Abstract: We disclose a method of depositing a metal seed layer on a wafer substrate comprising a plurality of recessed device features. The method comprises depositing a first portion of a copper seed layer on a wafer substrate without excessive build-up on the openings of each of the plurality of recessed device features, while obtaining bottom coverage without substantial sputtering of the bottom surface. The method also comprises depositing a second portion of the metal seed layer while redistributing at least a portion of the bottom coverage material to the sidewalls of each recessed device feature, to provide a uniform seed layer coverage over the interior surface of the recessed device features.

Abstract: Electronic apparatus and methods of forming the electronic apparatus include a hafnium lanthanide oxynitride film on a substrate for use in a variety of electronic systems. The hafnium lanthanide oxynitride film may be structured as one or more monolayers. Metal electrodes may be disposed on a dielectric containing a hafnium lanthanide oxynitride film.

Abstract: A method for forming a semiconductor device decouples NMOS and PMOS silicide processing and thereby allows independent optimization of at least one characteristic of both NMOS and PMOS devices, and eliminates constraints of using the same silicide process for both NMOS and PMOS, which limits the degree to which the process can be optimized for either technology.

Abstract: A semiconductor device provided with: a first interconnection layer provided on a semiconductor substrate; an interlevel insulation film provided over the first interconnection layer; a second interconnection layer of gold provided as an uppermost interconnection layer on the interlevel insulation film; and a barrier layer provided between the first interconnection layer and the second interconnection layer in an interlevel connection opening formed in the interlevel insulation film. The barrier layer includes a first sublayer provided in contact with the first interconnection layer to reduce a contact resistance, a second sublayer provided in contact with the second interconnection layer to improve a bonding strength, and a third sublayer provided between the first sublayer and the second sublayer. The first sublayer, the second sublayer and the third sublayer are, for example, a first tantalum sublayer, a second tantalum sublayer and a tantalum nitride sublayer, respectively.

Abstract: The invention provides a manufacturing method for a semiconductor photoelectrochemical cell, comprising the steps of burning a base made of titanium or a titanium alloy in an atmosphere of 700° C. to 1000° C. at a rate of temperature increase of no lower than 5° C./second so that a titanium oxide layer is formed on the surface, and thus, mixing titanium metal into said titanium oxide layer.

Abstract: Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain tungsten and monolayers that contain indium are deposited onto a substrate and subsequently processed to form tungsten-doped indium oxide. The resulting transparent conducing oxide includes properties such as an amorphous or nanocrystalline microstructure. Devices that include transparent conducing oxides formed with these methods have better step coverage over substrate topography and more robust film mechanical properties.

Abstract: We have used the state-of-the-art computational chemistry techniques to identify adhesion promoting layer materials that provide good adhesion of copper seed layer to the adhesion promoting layer and the adhesion promoting layer to the barrier layer. We have identified factors responsible for providing good adhesion of copper layer on various metallic surfaces and circumstances under which agglomeration of copper film occur. Several promising adhesion promoting layer materials based on chromium alloys have been predicted to be able to significantly enhance the adhesion of copper films. Chromium containing complexes of a polydentate ?-ketoiminate have been identified as chromium containing precursors to make the alloys with chromium.