Abstract: A method and computer readable medium for treating a dielectric film on one or more substrates includes disposing the one or more substrates in a process chamber configured to perform plural treatment processes on a dielectric film. The dielectric film is formed on at least one of said one or more substrates, wherein the dielectric film includes an initial dielectric constant having a value less than the dielectric constant of SiO2. A thermal treatment process that includes annealing the one or more substrates is performed in order to remove volatile constituents from the dielectric film on the one or more substrates and a chemical treatment process is performed on the one or more substrates, including: introducing a treating compound to the dielectric film on the one or more substrates, and heating the one or more substrates.
Abstract: A method for making a semiconductor device is provided which comprises (a) providing a semiconductor structure equipped with a gate and a channel region, said channel region being associated with the gate; (b) depositing a first sub-layer (131) of a first stressor material over the semiconductor structure, said first stressor material containing silicon-nitrogen bonds and imparting tensile stress to the semiconductor structure; (c) curing the first stressor material through exposure to a radiation source; (d) depositing a second sub-layer (133) of a second stressor material over the first sub-layer, said second stressor material containing silicon-nitrogen bonds and imparting tensile stress to the semiconductor structure; and (e) curing the second sub-layer of stressor material through exposure to a radiation source.
Type:
Application
Filed:
January 19, 2007
Publication date:
July 24, 2008
Inventors:
Kurt H. Junker, Paul A. Grudowski, Xiang-Zheng Bo, Tien Ying Luo
Abstract: Methods of fabricating a semiconductor device including a dual-hybrid liner in which an underlying silicide layer is protected from photoresist stripping chemicals by using a hard mask as a pattern during etching, rather than using a photoresist. The hard mask prevents exposure of a silicide layer to photoresist stripping chemicals and provides very good lateral dimension control such that the two nitride liners are well aligned.
Type:
Grant
Filed:
March 31, 2005
Date of Patent:
July 8, 2008
Assignees:
International Business Machines Corporation, Chartered Semiconductor Manufacturing Ltd.
Inventors:
Victor Chan, Haining S. Yang, Yong M. Lee, Eng H. Lim
Abstract: A manufacturing process technology creates a pattern on a first layer using a focused ion beam process. The pattern is transferred to a second layer, which may act as a traditional etch stop layer. The pattern can be formed on the second layer without irradiation by light through a reticle and without wet chemical developing, thereby enabling conformal coverage and very fine critical feature control. Both dark field patterns and light field patterns are disclosed, which may enable reduced or minimal exposure by the focused ion beam.
Type:
Application
Filed:
November 21, 2007
Publication date:
July 3, 2008
Inventors:
Jeffrey Scott, Michael Zani, Mark Bennahmias, Mark Mayse
Abstract: A method for etching features in an etch layer disposed below a mask on a process wafer is provided. A hydrocarbon based glue layer is deposited. The etch layer on the process wafer is etched with at least one cycle, wherein each cycle comprises depositing a hydrofluorocarbon layer over the mask and on the hydrocarbon based glue layer, wherein the hydrocarbon based glue layer increases adhesion of the hydrofluorocarbon layer and etching the etch layer.
Type:
Application
Filed:
December 14, 2006
Publication date:
June 19, 2008
Inventors:
Ji Soo Kim, Sangheon Lee, Deepak K. Gupta, S. M. Reza Sadjadi
Abstract: A method for providing a dielectric film having enhanced adhesion and stability. The method includes a post deposition treatment that densifies the film in a reducing atmosphere to enhance stability if the film is to be cured ex-situ. The densification generally takes place in a reducing environment while heating the substrate. The densification treatment is particularly suitable for silicon-oxygen-carbon low dielectric constant films that have been deposited at low temperature.
Type:
Application
Filed:
January 11, 2008
Publication date:
June 5, 2008
Applicant:
Applied Materials, Inc.
Inventors:
Li-Qun Xia, Frederic Gaillard, Ellie Yieh, Tian H. Lim
Abstract: Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
Type:
Application
Filed:
October 31, 2007
Publication date:
February 28, 2008
Applicant:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Malcolm Bevan, Haowen Bu, Hiroaki Niimi, Husam Alshareef
Abstract: A method of forming an insulating film according to one embodiment of the present invention, which is a method of forming an insulating film for use in a semiconductor device, performs thermal oxidation of a tantalum nitride film at a temperature range of 200 to 400 degrees centigrade by a wet oxidation process, whereby a tantalum oxide film is formed as the insulating film.
Abstract: A method and apparatus are disclosed for reducing the concentration of chlorine and/or other bound contaminants within a semiconductor oxide composition that is formed by chemical vapor deposition (CVD) using a semiconductor-element-providing reactant such as dichlorosilane (DCS) and an oxygen-providing reactant such as N2O. In one embodiment, a DCS-HTO film is annealed by heating N2O gas to a temperature in the range of about 825° C. to about 950° C. so as to trigger exothermic decomposition of the N2O gas and flowing the heated gas across the DCS-HTO film so that disassociated atomic oxygen radicals within the heated N2O gas can transfer disassociating energy to chlorine atoms bound within the DCS-HTO film and so that the atomic oxygen radicals can fill oxygen vacancies within the semiconductor-oxide matrix of DCS-HTO film. An improved ONO structure may be formed with the annealed DCS-HTO film for use in floating gate or other memory applications.
Abstract: A method of manufacturing a MOS transistor incorporating a silicon oxide film serving as a gate insulating film and containing nitrogen and a polycrystalline silicon film serving as a gate electrode and containing a dopant and arranged such that the gate electrode is formed on the gate electrode insulating film, and an oxidation process using ozone is performed to sufficiently round the shape of the lower edge of the gate electrode.
Abstract: A method of processing a substrate comprising depositing a layer comprising amorphous carbon on the substrate and then exposing the substrate to electromagnetic radiation have one or more wavelengths between about 600 nm and about 1000 nm under conditions sufficient to heat the layer to a temperature of at least about 300° C. is provided. Optionally, the layer further comprises a dopant selected from the group consisting of nitrogen, boron, phosphorus, fluorine, and combinations thereof. In one aspect, the layer comprising amorphous carbon is an anti-reflective coating and an absorber layer that absorbs the electromagnetic radiation and anneals a top surface layer of the substrate. In one aspect, the substrate is exposed to the electromagnetic radiation in a laser annealing process.
Type:
Application
Filed:
June 14, 2007
Publication date:
October 18, 2007
Inventors:
LUC AUTRYVE, Christopher Bencher, Dean Jennings, Haifan Liang, Abhilash Mayur, Mark Yam, Wendy Yeh, Richard Brough
Abstract: The semiconductor device fabrication method comprises the step of forming a first porous insulation film 38 over a semiconductor substrate 10; the step of forming a second insulation film 40 whose density is higher than that of the first porous insulation film 38; and the step of applying electron beams, UV rays or plasmas with the second insulation film 40 present to the first porous insulation film 38 to cure the first porous insulation film 38. The electron rays, etc. are applied to the first porous insulation film 38 through the denser second insulation film 40, whereby the first porous insulation film 38 can be cured without being damaged. The first porous insulation film 38 can be kept from being damaged, whereby the moisture absorbency and density increase can be prevented, and resultantly the dielectric constant increase can be prevented. Thus, the present invention can provide a semiconductor device including an insulation film of low dielectric constant and high mechanical strength.
Type:
Grant
Filed:
October 27, 2005
Date of Patent:
August 28, 2007
Assignee:
Fujitsu Limited
Inventors:
Yoshihiro Nakata, Shirou Ozaki, Ei Yano
Abstract: A method of modifying the porosity of a thickness of a layer of porous dielectric material having a surface and formed on a semiconductor substrate is provided by exposing the porous dielectric material to a sufficient temperature in the presence of a first gas to drive moisture particles out of the pores. Modifying also includes, exposing the porous dielectric material to a radio frequency stimulus of sufficient power in the presence of a second gas to densify a thickness of the porous dielectric material to reduce or prohibit subsequent absorption of moisture or reactant gas particles by the thickness or porous dielectric material.
Abstract: A plasma treatment process for increasing the tensile stress of a silicon wafer is described. Following deposition of a dielectric layer on a substrate, the substrate is lifted to an elevated position above the substrate receiving surface and exposed to a plasma treatment process which treats both the top and bottom surface of the wafer and increases the tensile stress of the deposited layer. Another embodiment of the invention involves biasing of the substrate prior to plasma treatment to bombard the wafer with plasma ions and raise the temperature of the substrate. In another embodiment of the invention, a two-step plasma treatment process can be used where the substrate is first exposed to a plasma at a processing position directly after deposition, and then raised to an elevated position where both the top and bottom of the wafer are exposed to the plasma.
Abstract: A semiconductor device includes a low dielectric constant insulating film exhibiting an Si—H Fourier Transform Infrared (FTIR) doublet defined by a first and a second peak, wherein the first peak is located at a higher wave number than the second peak, and wherein the ratio of the first peak to the second peak is greater than unity. A method of producing such a semiconductor device includes depositing a dielectric layer over a substrate and treating the dielectric layer in a hydrogen containing plasma such that the dielectric layer exhibits an Si—H Fourier Transform Infrared (FTIR) doublet defined by a first and a second peak, wherein the first peak is located at a higher wave number than the second peak, and wherein the ratio of the first peak to the second peak is greater than unity.