In A Repetitive Configuration, E.g. Planar Multi-junction Solar Cells (epo) Patents (Class 257/E27.124)
  • Patent number: 9991401
    Abstract: A solar cell is discussed. A solar cell includes a semiconductor substrate, a conductive type region on one surface of the semiconductor substrate, and an electrode connected to the conductive type region. The electrode includes an electrode layer on the conductive type region and a printed electrode layer on the electrode layer.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: June 5, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Kisu Kim, Giwon Lee, Ilhyoung Jung, Jeongbeom Nam
  • Patent number: 9029181
    Abstract: Methods and apparatus relating to providing a collection grid suitable for use in PV modules. The disclosed collection grid may be at least partially applied to a protective laminate sheet in a manner that removes the high temperature requirements of conventional screen printed collection grids, to avoid unwanted heat-related deformation of the laminate sheet.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: May 12, 2015
    Assignee: Hanergy Hi-Tech Power (HK) Limited
    Inventors: Zulima Rhodes, Darren Verebelyi
  • Patent number: 8993366
    Abstract: The method of the invention includes the sequential steps of providing a plurality of solar cells, interconnecting the solar cells using one or more interconnect tabs, attaching the interconnect tabs to a top side of the solar cell to interconnect the plurality of solar cells by coupling an exposed top surface of a first solar cell to a top surface of an adjacent second solar cell, attaching one or more bypass diodes to a top side of the solar cell, then next applying an adhesive to a first film layer, placing the plurality of solar cells onto the first film layer, then next applying an adhesive to a second film layer, placing the plurality of solar cells and first film layer onto the second film layer to form a sheet assembly, and then forming the solar sheet from the sheet assembly.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: March 31, 2015
    Assignee: MicroLink Devices, Inc.
    Inventors: Raymond Chan, Haruki Miyamoto
  • Patent number: 8962378
    Abstract: A method for manufacturing a photodiode including the steps of providing a substrate, solution depositing a quantum nanomaterial layer onto the substrate, the quantum nanomaterial layer including a number of quantum nanomaterials having a ligand coating, and applying a thin-film oxide layer over the quantum nanomaterial layer.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: February 24, 2015
    Assignee: The Boeing Company
    Inventors: Larken E. Euliss, G. Michael Granger, Keith J. Davis, Nicole L. Abueg, Peter D. Brewer, Brett Nosho
  • Patent number: 8945978
    Abstract: A metal contact of a solar cell is formed by electroplating copper using an electroplating seed that is formed on a dielectric layer. The electroplating seed includes an aluminum layer that connects to a diffusion region of the solar cell through a contact hole in the dielectric layer. A nickel layer is formed on the aluminum layer, with the nickel layer-aluminum layer stack forming the electroplating seed. The copper is electroplated in a copper plating bath that has methanesulfonic acid instead of sulfuric acid as the supporting electrolyte.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: February 3, 2015
    Assignee: SunPower Corporation
    Inventor: Joseph Frederick Behnke
  • Patent number: 8916905
    Abstract: It is an object to provide a photoelectric conversion device with high photoelectric conversion efficiency that improves reliability by increasing contact force between a light absorbing layer and an electrode layer. The photoelectric conversion device includes an electrode layer, and a light absorbing layer located on the electrode layer. The light absorbing layer contains a compound semiconductor. The light absorbing layer comprises a first layer close to the electrode layer and a second layer located on the first layer. The first layer has a void ratio lower than that of the second layer.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: December 23, 2014
    Assignee: KYOCERA Corporation
    Inventors: Shintaro Kubo, Shuji Nakazawa, Rui Kamada, Seiji Oguri, Shinnosuke Ushio, Shuichi Kasai, Seiichiro Inai
  • Patent number: 8900908
    Abstract: The invention relates to a method for local high-doping and contacting of a semiconductor structure which is a solar cell or a precursor of a solar cell and has a silicon semiconductor substrate (1) of a base doping type. The high-doping and contacting is effected by producing a plurality of local high-doping regions of the base doping type in the semiconductor substrate (1) on a contacting side (1a) of the semiconductor substrate and applying a metal contacting layer (7) to the contacting side (1a) or, if applicable, one or more intermediate layers wholly or partially covering the contacting side (1a), to form electrically conductive connections between the metal contacting layer (7) and the semiconductor substrate (1) at the high doping regions.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: December 2, 2014
    Assignees: Fraunhofer-Gesellschaft zur Förderung der Angewandten Forschung E.V., Albert-Ludwigs-Universität Freiburg
    Inventors: Dominik Suwito, Jan Benick, Ulrich Jager
  • Patent number: 8883543
    Abstract: Provided is a method of producing a wafer for a solar cell that can produce the solar cell with high conversion efficiency. A method of producing a wafer for a solar cell according to the present invention comprises a first step of contacting lower alcohol to at least one surface of the semiconductor wafer and a second step, after the first step, of contacting hydrofluoric acid containing metal ion to the at least one surface of the semiconductor wafer, and a third step that is, after the second step, a step of contacting alkali solution to the at least one surface of the semiconductor wafer, a step of contacting acid solution containing hydrofluoric acid and nitric acid to the at least one surface of the semiconductor wafer, or a step of carrying out an oxidation treatment to the at least one surface of the semiconductor wafer.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: November 11, 2014
    Assignee: SUMCO Corporation
    Inventor: Shigeru Okuuchi
  • Patent number: 8871533
    Abstract: A solar cell making method includes steps of making a round P-N junction preform by (a) stacking a P-type silicon layer and a N-type silicon layer on top of each other, and (b) forming a P-N junction near an interface between the P-type silicon layer and the N-type silicon layer, wherein the round P-N junction preform defines a first surface and a second surface; forming a first electrode preform on the first surface and forming a second electrode preform on the second surface, thereby forming a round solar cell preform; and forming a photoreceptive surface with the P-N junction exposed on the photoreceptive surface by cutting the round solar cell preform into a plurality of arc shaped solar cells, the photoreceptive surface being on a curved surface of the arc shaped solar cell and being configured to receive incident light beams.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: October 28, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 8835980
    Abstract: Provided is a semiconductor wafer including: a base wafer containing silicon; an inhibitor that has been formed on the base wafer, has an aperture in which a surface of the base wafer is exposed, and inhibits crystal growth; and a light-absorptive structure that has been formed inside the aperture in contact with a surface of the base wafer exposed inside the aperture, where the light-absorptive structure includes a first semiconductor and a second semiconductor.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: September 16, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Masahiko Hata, Taro Itatani
  • Patent number: 8790948
    Abstract: In the existent method for manufacturing a solar cell, manufacture of a solar cell having a quantum well having a crystalline well layer and capable of controlling the thickness of the well layer was difficult. A quantum well having an amorphous well layer, comprising a barrier layer and an amorphous well layer is formed and then the quantum well having the amorphous well layer is annealed thereby crystallizing the amorphous well layer to form a quantum well having a crystalline well layer. By applying energy density applied to the amorphous well layer at an energy density of 1.26 J/mm2 or more and 28.8 J/mm2 or less, the crystalline well layer can be formed and the lamination structure of the quantum well can be maintained simultaneously.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: July 29, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Watanabe, Toshiyuki Mine, Akio Shima, Tomoko Sekiguchi, Ryuta Tsuchiya
  • Patent number: 8778787
    Abstract: Methods of forming contacts for solar cells are described. In one embodiment, a method includes forming a silicon layer above a substrate, forming and patterning a solid-state p-type dopant source on the silicon layer, forming an n-type dopant source layer over exposed regions of the silicon layer and over a plurality of regions of the solid-state p-type dopant source, and heating the substrate to provide a plurality of n-type doped silicon regions among a plurality of p-type doped silicon regions.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: July 15, 2014
    Assignee: SunPower Corporation
    Inventor: Jane Manning
  • Patent number: 8748310
    Abstract: A method for producing a metal contact structure of a photovoltaic solar cell, including: applying an electrically non-conductive insulating layer to a semiconductor substrate, applying a metal contact layer to the insulating layer, and generating a plurality of local electrically conductive connections between the semiconductor substrate and the contact layer right through the insulating layer. The metal contact layer is formed using two pastes containing metal particles: the first paste containing metal particles is applied to local regions, and the second paste containing metal particles is applied covering at least the regions covered with the first paste and partial regions located therebetween.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: June 10, 2014
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung E.V.
    Inventors: Daniel Biro, Benjamin Thaidigsmann, Florian Clement, Robert Woehl, Edgar-Allan Wotke
  • Patent number: 8715814
    Abstract: A method, apparatus and material produced thereby in an amorphous or crystalline form having multiple elements with a uniform molecular distribution of elements at the molecular level.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: May 6, 2014
    Inventor: L. Pierre de Rochemont
  • Patent number: 8703520
    Abstract: Disclosed are: a printing plate having improved productivity; and a method for manufacturing a solar cell element, which uses the printing plate. A printing plate according to one embodiment of the present invention comprises: a metal plate; a buffer layer that is arranged on one main surface of the metal plate; and a slit that penetrates through the metal plate and the buffer layer. The slit has a first penetrating part that is located in the metal plate, a second penetrating part that is located in the buffer layer, and a bridge that is arranged inside and across the first penetrating part. When viewed in plan from the above-mentioned main surface side, the buffer layer-side opening edge of the first penetrating part is inside the metal plate-side opening edge of the second penetrating part.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: April 22, 2014
    Assignee: Kyocera Corporation
    Inventors: Yuta Shinike, Tomonari Sakamoto
  • Patent number: 8691694
    Abstract: In order to better and more efficiently assemble back contact solar cells into modules, the cell to cell soldering and other soldered connections are replaced by electro and/or electroless plating. Back contact solar cells, diodes and external leads can be first laminated to the module front glass for support and stability. Conductive materials are deposited selectively to create a plating seed pattern for the entire module circuit. Subsequent plating steps create an integrated cell and module metallization. This avoids stringing and tabbing and the associated soldering steps. This process is easier for mass manufacturing and is advantageous for handling fragile silicon solar cells. Additionally, since highly corrosion resistant metals can be plated, the moisture barrier requirements of the back side materials can be greatly relaxed. This can simplify and reduce the cost of the back side of the module.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: April 8, 2014
    Inventor: Henry Hieslmair
  • Patent number: 8552519
    Abstract: In order to collect a plurality of semiconductor elements easily from a semiconductor module where a plurality of rod-like semiconductor elements for power generation or light emission are built in and to reuse or repair them, two split modules 61 are arranged in series in a containing case 62 in a semiconductor module 60. In each split module 61, power generating semiconductor elements 1 arranged in a matrix of a plurality of rows and columns, and a conductive connection mechanism for connecting the plurality of semiconductor elements 1 in each row in series and the plurality of semiconductor elements 1 in each column in parallel are molded with transparent synthetic resin, and a connection conductor 67 is allowed to project at the end. A conductive waved spring 70 and an external terminal 76 are provided on the end side of the containing case 62, and series connection of the two split modules 61 is ensured by mechanical pressing force of the conductive waved spring 70.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: October 8, 2013
    Assignee: Kyosemi Corporation
    Inventor: Josuke Nakata
  • Patent number: 8519435
    Abstract: A photovoltaic cell is fabricated onto a polyimide film using an unbalanced RF magnetron sputtering process. The sputtering process includes the addition of 0.05% to 0.5% oxygen to an inert gas stream. Portions of the photovoltaic cell are exposed to an elevated temperature CdCl2 treatment which is at or below the glass transition temperature of the polyimide film.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: August 27, 2013
    Assignee: The University of Toledo
    Inventors: Anthony Vasko, Kristopher Wieland, James Walker, Alvin Compaan
  • Patent number: 8513104
    Abstract: A method of forming a floating junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front surface and a rear surface. The method also includes depositing a set of masking particles on the rear surface in a set of patterns; and heating the substrate in a baking ambient to a first temperature and for a first time period in order to create a particle masking layer. The method further includes exposing the substrate to a phosphorous deposition ambient at a second temperature and for a second time period, wherein a front surface PSG layer, a front surface phosphorous diffusion, a rear surface PSG layer, and a rear surface phosphorous diffusion are formed, and wherein a first phosphorous dopant surface concentration in the substrate proximate to the set of patterns is less than a second dopant surface concentration in the substrate not proximate to the set of patterns.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: August 20, 2013
    Assignee: Innovalight, Inc.
    Inventors: Malcolm Abbott, Maxim Kelman, Eric Rosenfeld, Elena Rogojina, Giuseppe Scardera
  • Publication number: 20130171758
    Abstract: A solar cell making method includes steps of making a round P-N junction preform by (a) stacking a P-type silicon layer and a N-type silicon layer on top of each other, and (b) forming a P-N junction near an interface between the P-type silicon layer and the N-type silicon layer, wherein the round P-N junction preform defines a first surface and a second surface; forming a first electrode preform on the first surface and forming a second electrode preform on the second surface, thereby forming a round solar cell perform; and forming a photoreceptive surface with the P-N junction exposed on the photoreceptive surface by cutting the round solar cell preform into a plurality of arc shaped solar cells, the photoreceptive surface being on a curved surface of the arc shaped solar cell and being configured to receive incident light beams.
    Type: Application
    Filed: July 24, 2012
    Publication date: July 4, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Patent number: 8440492
    Abstract: An assembly technique for assembling solar cell arrays is provided. During the fabrication of a solar cell, openings through the semiconductor layer are etched through to a top surface of the backmetal layer. The solar cells include an exposed top surface of the backmetal layer. A plurality of solar cells are assembled into a solar cell array where adjacent cells are interconnected in an electrically serial or parallel fashion solely from the top surface of the solar cells.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: May 14, 2013
    Assignee: MicroLink Devices, Inc.
    Inventors: Raymond Chan, Christopher Youtsey
  • Patent number: 8420517
    Abstract: A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front substrate surface. The method further includes depositing an ink on the front substrate surface in a ink pattern, the ink comprising a set of silicon-containing particles and a set of solvents. The method also includes heating the substrate in a baking ambient to a first temperature and for a first time period in order to create a densified film ink pattern.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: April 16, 2013
    Assignee: Innovalight, Inc.
    Inventors: Giuseppe Scardera, Shihai Kan, Maxim Kelman, Dmitry Poplavskyy
  • Patent number: 8410355
    Abstract: This invention intends to develop a technique for forming an interlayer with excellent optical characteristics and to provide a photoelectric conversion device having high conversion efficiency. To realize this purpose, a series connection through an intermediate layer is formed in the thin-film photoelectric conversion device of the invention, and the interlayer is a transparent oxide layer in its front surface and n pairs of layers stacked therebehind (n is an integer of 1 or more), wherein each of the pair of layers is a carbon layer and a transparent oxide layer stacked in this order. Film thicknesses of each layer are optimized to improve wavelength selectivity and stress resistance while keeping the series resistance.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: April 2, 2013
    Assignee: Kaneka Corporation
    Inventors: Tomomi Meguro, Mitsuru Ichikawa, Fumiyasu Sezaki, Kunta Yoshikawa, Takashi Kuchiyama, Kenji Yamamoto
  • Patent number: 8409898
    Abstract: Assembly system for photovoltaic packages. According an embodiment, the present invention provides a system for assembling photovoltaic packages. The system includes a base plate member, which comprises a plurality of coupling elements. The plurality of coupling elements are characterized by a first length. The plurality of coupling elements is aligned according to a predetermined configuration. The plurality of coupling elements includes first and second coupling elements. The system also includes a top plate member, which includes a plurality of openings and a plurality of locator elements. The plurality of openings is characterized by a second length. The second length is greater than the first length. The openings and the locator elements are aligned according to the first predetermined configurations. The top plate member is disengageably coupled to the base plate member by the coupling elements and the openings.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: April 2, 2013
    Assignee: Solaria Corporation
    Inventors: Douglas R. Battaglia, Jr., Ziehl-Neelsen L. Co
  • Patent number: 8394650
    Abstract: A laminated module or panel of solar cells and a laminating method for making same comprise a top layer of melt flowable optically transparent molecularly flexible thermoplastic and a rear sheet of melt flowable insulating molecularly flexible thermoplastic both melt flowing at a temperature between about 80° C. and 250° C. and having a low glass transition temperature. Solar cells are encapsulated by melt flowing the top layer and rear sheet, and electrical connections are provided between front and back contacts thereof. Light passing through the transparent top layer impinges upon the solar cells and the laminated module exhibits sufficient flexural modulus without cross-linking chemical curing. Electrical connections may be provided by melt flowable electrically conductive molecularly flexible thermoplastic adhesive or by metal strips or by both.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: March 12, 2013
    Assignee: Amerasia International Technology, Inc.
    Inventor: Kevin Kwong-Tai Chung
  • Patent number: 8361827
    Abstract: An assembly technique for assembling solar cell arrays is provided. During the fabrication of a solar cell, openings through the semiconductor layer are etched through to a top surface of the backmetal layer. The solar cells include an exposed top surface of the backmetal layer. A plurality of solar cells are assembled into a solar cell array where adjacent cells are interconnected in an electrically serial or parallel fashion solely from the top surface of the solar cells.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: January 29, 2013
    Assignee: MicroLink Devices, Inc.
    Inventors: Raymond Chan, Christopher Youtsey
  • Patent number: 8349623
    Abstract: A method for manufacturing a thin film photoelectric conversion module comprising the steps of: (A) forming a plurality of divided strings by dividing a string, in which thin film photoelectric conversion elements provided by sequentially laminating a first electrode layer, a photoelectric conversion layer and a second electrode layer on the surface of an insulating substrate are electrically connected in series, into a plurality of strings by dividing grooves, electrically insulating and separating the first electrode layer and the second electrode layer one from the other and extending in a serial connection direction; and (B) performing reverse biasing by applying a reverse bias voltage to each of thin film photoelectric conversion elements of the divided string.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: January 8, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinsuke Tachibana, Takanori Nakano
  • Patent number: 8338215
    Abstract: A solar cell module and a method of manufacturing the solar cell module are disclosed. The method in accordance with an embodiment of the present invention includes forming a conductive bump on a conductive pad formed on one surface of a solar cell, forming a circuit pattern on one surface of a transparent substrate, in which the circuit pattern corresponds to a position of the conductive bump, adhering the solar cell to the transparent substrate in such a way that the conductive bump is in direct contact with the circuit pattern, and forming a protective resin layer on one surface of the transparent substrate in such a way that the solar cell is covered. By using the above steps, a thinner solar cell module can be implemented while improving the manufacturing efficiency.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: December 25, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin-Mun Ryu, Ho-Seop Jeong, Tae-Young Kim, Byung-Jae Kim, In-Taek Song
  • Patent number: 8334161
    Abstract: Methods of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: December 18, 2012
    Assignee: SunPower Corporation
    Inventors: Tim Dennis, Scott Harrington, Jane Manning, David Smith, Ann Waldhauer
  • Patent number: 8329495
    Abstract: A method of forming a PV module includes forming conductors on a top surface of a PV coated substrate; forming insulators on the top surface of the PV coated substrate; and cutting the PV coated substrate to form a plurality of individual PV cells. The PV coated substrate is cut so that each of the PV cells has some of the conductors and an insulator on its top surface. Multiple PV cells are then joined to form a PV module by attaching an edge of a first one of the PV cells under an edge of a second one of the PV cells so that at least a portion of the conductors on the first PV cell electrically contacts a bottom surface of the second PV cell.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: December 11, 2012
    Assignee: Preco, Inc.
    Inventor: Chris Walker
  • Publication number: 20120306040
    Abstract: An insulating metal substrate is used for a semiconductor device such as a solar cell. The substrate includes a metal base made of steel, iron-based alloy steel or titanium, an aluminum layer and an insulating layer obtained by anodizing aluminum. An alloy layer primarily made of an alloy of a composition expressed by Al3X (where X is at least one kind of element selected from Fe, Cr, and Ti) exists in an interface between the metal base and the aluminum layer, and has a thickness of 0.01 to 10 micrometers. The aluminum layer has a thickness of 1 micrometer or more and equal to or less than a thickness of the metal base.
    Type: Application
    Filed: January 26, 2011
    Publication date: December 6, 2012
    Applicant: FUJIFILM CORPORATION
    Inventor: Shigenori Yuya
  • Publication number: 20120240975
    Abstract: A photoelectric conversion device includes: a porous electrode and a counter electrode provided on a substrate; an electrolyte layer provided between the porous electrode and the counter electrode; a collecting wiring line provided on a face of the substrate on which the porous electrode is provided; and a light guiding structure provided on the light incidence side of the substrate.
    Type: Application
    Filed: March 12, 2012
    Publication date: September 27, 2012
    Applicant: Sony Corporation
    Inventor: Akira Ono
  • Patent number: 8252620
    Abstract: The present invention provides a process for preparing a photoanode of a dye-sensitized solar cell (DSSC) by pressure swing impregnation, which includes impregnating a metal oxide layer on a conductive substrate in a photosensitizing dye solution in a vessel; introducing a pressurized inert gas into the vessel to maintain a first pressure therein for a period of time, wherein the first pressure can be lower or higher than the critical pressure of the inert gas and the solution is expanded by the inert gas; further pressurizing the vessel with the inert gas and maintaining at a second pressure higher than the first pressure for a period of time, wherein the inert gas becomes sub-critical or supercritical fluid and dissolves more in the solution, creating an anti-solvent effect, so that the photosensitizing dye further deposits onto the metal oxide layer due to the anti-solvent effect.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: August 28, 2012
    Assignee: National Tsing Hua University
    Inventors: Chung-Sung Tan, I-Hsiang Lin, Jan-Min Yang
  • Patent number: 8241945
    Abstract: Solar cells and methods for fabrication thereof are provided. A method may include forming a via through at least one dielectric layer formed on a semiconductor wafer by using a laser to ablate a region of the at least one dielectric layer such that at least a portion of the surface of the semiconductor wafer is exposed by the via. The method may further include applying a self-doping metal paste to the via. The method may additionally include heating the semiconductor wafer and self-doping metal paste to a temperature sufficient to drive at least some dopant from the self-doping metal paste into the portion of the surface of the semiconductor wafer exposed by the via to form a selective emitter region and a contact overlying and self-aligned to the selective emitter region.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: August 14, 2012
    Assignee: Suniva, Inc.
    Inventors: Adam M. Payne, Daniel L. Meier, Vinodh Chandrasekaran
  • Patent number: 8222129
    Abstract: A method for manufacturing a solar cell according to an exemplary embodiment includes: forming a first doping film on a substrate; patterning the first doping film so as to form a first doping film pattern and so as to expose a portion of the substrate; forming a diffusion prevention film on the first doping film pattern so as to cover the exposed portion of the substrate; etching the diffusion prevention film so as to form spacers on lateral surfaces of the first doping film pattern; forming a second doping film on the first doping film pattern so as to cover the spacer and exposed substrate; forming a first doping region on the substrate surface by diffusing an impurity from the first doping film pattern into the substrate; and forming a second doping region on the substrate surface by diffusing an impurity from the second doping film pattern into the substrate.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: July 17, 2012
    Assignees: Samsung Electronics Co., Ltd., Samsung SDI Co., Ltd.
    Inventors: Young Su Kim, Doo-Youl Lee
  • Patent number: 8217403
    Abstract: An electronic device includes a substrate and an electronic component. The substrate has a metallized trace. The metallized trace has a metallized layer and an insulation layer. The metallized layer has a high melting point metal component and a low melting point metal component, the high melting point metal component and the low melting point metal component being diffusion bonded together. The insulation layer is formed simultaneously with the metallized layer to cover an outer surface of the metallized layer. The electronic component is electrically connected to the metallized layer.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: July 10, 2012
    Assignee: Napra Co., Ltd.
    Inventors: Shigenobu Sekine, Yurina Sekine
  • Publication number: 20120145225
    Abstract: Provided is a trench line for the disconnection of a solar cell, capable of effectively insulating a semiconductor layer at an upper portion of a substrate from a semiconductor layer at a side portion of the substrate and improving disconnection reliability. The trench line for the disconnection of a solar cell according to the disclosure which electrically insulates the semiconductor layers formed at the upper portion and the side portion of the substrate of the solar cell from each other, includes a plurality of unit trench lines which are disposed to intersect at an upper surface of the substrate of the solar cell. Intersecting points of the intersecting unit trench lines are positioned on the unit trench lines and are positioned at points spaced inwardly from starting points or ending points of the unit trench lines by a predetermined distance.
    Type: Application
    Filed: August 13, 2010
    Publication date: June 14, 2012
    Applicant: HYUNDAI HEAVY INDUSTRIES CO., LTD.
    Inventors: Sang Seop Lee, Seok Hyun Song, Gil Joo Kang, Jun Young PARK, Jong-Su Shin
  • Patent number: 8187907
    Abstract: A method of manufacturing a solar cell by providing a first substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell including a top subcell and a bottom subcell; forming a metal back contact over the bottom subcell; forming a group of discrete, spaced-apart first bonding elements over the surface of the back metal contact; attaching a surrogate substrate on top of the back metal contact using the bonding elements; and removing the first substrate to expose the surface of the top subcell.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: May 29, 2012
    Assignee: Emcore Solar Power, Inc.
    Inventor: Fred Newman
  • Patent number: 8148796
    Abstract: Disclosed are a solar cell and a manufacturing method thereof. The solar cell in accordance with an embodiment of the present invention includes: a substrate having a plurality of holes formed on one surface thereof; a metal layer formed on an inner wall of the hole and on one surface of the substrate; a p-type semiconductor coated on the metal layer; an n-type semiconductor formed inside the hole and on one surface of the substrate; a transparent conductive oxide formed on the n-type semiconductor; and an electrode terminal formed on the p-type semiconductor and on the transparent conductive oxide.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: April 3, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ro-Woon Lee, Jae-Woo Joung, Shang-Hoon Seo, Tae-Gu Kim
  • Patent number: 8129822
    Abstract: A template 100 for three-dimensional thin-film solar cell substrate formation for use in three-dimensional thin-film solar cells. The template 100 comprises a substrate which comprises a plurality of posts 102 and a plurality of trenches 104 between said plurality of posts 102. The template 100 forms an environment for three-dimensional thin-film solar cell substrate formation.
    Type: Grant
    Filed: October 6, 2007
    Date of Patent: March 6, 2012
    Assignee: Solexel, Inc.
    Inventor: Mehrdad Moslehi
  • Patent number: 8119438
    Abstract: A method of manufacturing a solar cell having a texture on a surface of a silicon substrate includes first forming a porous layer on the surface of the silicon substrate by dipping the silicon substrate into a mixed aqueous solution of oxidizing reagent containing metal ions and hydrofluoric acid. Second, a texture is formed by etching the surface of the silicon substrate after the porous layer is formed, by dipping the silicon substrate into a mixed acid mainly containing hydrofluoric acid and nitric acid.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: February 21, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yoichiro Nishimoto
  • Patent number: 8120132
    Abstract: A photovoltaic cell and a method of forming an electrode grid on a photovoltaic semiconductor substrate of a photovoltaic cell are disclosed. In one embodiment, the photovoltaic cell comprises a photovoltaic semiconductor substrate; a back electrode electrically connected to a back surface of the substrate; and a front electrode electrically connected to a front surface of the substrate. The substrate, back electrode, and front electrode form an electric circuit for generating an electric current when said substrate absorbs light. The front electrode is comprised of a metal grid defining a multitude of holes. These holes may be periodic, aperiodic, or partially periodic. The front electrode may be formed by depositing nanospheres on the substrate; forming a metallic layer on the substrate, around the nanospheres; and removing the nanospheres, leaving an electrode grid defining a multitude of holes on the substrate.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Oki Gunawan
  • Publication number: 20110272750
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit with a semiconductor region of a first conduction type, an amplifying transistor, and a contact. The contact supplies, via a semiconductor region of a second conduction type arranged along a side surface and a bottom surface of an element isolation region, a reference voltage to the semiconductor region of the second conduction-type arranged below source and drain regions of the amplifying transistor in a region below a gate electrode of the amplifying transistor.
    Type: Application
    Filed: July 19, 2011
    Publication date: November 10, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Koichiro Iwata, Hidekazu Takahashi
  • Patent number: 8053343
    Abstract: A method for forming a selective emitter of a solar cell and a diffusion apparatus for forming the same are provided. The method includes texturing a surface of a silicon substrate by etching the silicon substrate, coating an impurity solution on the surface of the silicon substrate, injecting a first thermal energy into the whole surface of the silicon substrate, and, while the first thermal energy is injected into the whole surface of the silicon substrate, injecting a second thermal energy by irradiating a laser beam into a partial region of the surface of the silicon substrate.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: November 8, 2011
    Assignee: SNT. Co., Ltd.
    Inventors: Yusung Huh, Seungil Park, Mangeun Lee
  • Patent number: 8048706
    Abstract: Provided herein are improved methods of laser scribing photovoltaic structures to form monolithically integrated photovoltaic modules. The methods involve forming P1, P2 or P3 scribes by an ablative scribing mechanism having low melting, and in certain embodiments, substantially no melting. In certain embodiments, the methods involve generating an ablation shockwave at an interface of the film to be removed and the underlying layer. The film is then removed by mechanical shock. According to various embodiments, the ablation shockwave is generated by using a laser beam having a wavelength providing an optical penetration depth on the order of the film thickness and a minimum threshold intensity. In one embodiment, material including an absorber layer is scribed using an infrared laser source and a picosecond pulse width.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: November 1, 2011
    Assignee: Miasole
    Inventors: Osman Ghandour, Alex Austin, Daebong Lee, Jason Stephen Corneille, James Teixeira
  • Patent number: 8034654
    Abstract: The method is disclosed that Si+ is implanted on Si substrate to enhance strain relaxation at the interface between the metamorphic GexSi1?x buffer layers and Si substrate, in order to facilitate the growth of a high quality Ge on Si substrate. And several GexSi1?x buffer layers (Si/Ge0.8Si0.2/Ge0.9Si0.1/Ge) are grown on top of Si substrate by UHVCVD. Then grow pure Ge layer of low dislocation density on GexSi1?x buffer layer. Finally, grow up high efficiency III-V solar cell on GexSi1?x buffer layer.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: October 11, 2011
    Assignee: National Chiao Tung University
    Inventors: Edward Yi Chang, Shih-Hsuan Tang, Yue-Cin Lin
  • Publication number: 20110220181
    Abstract: A photoelectric conversion module includes first and second substrates on which first and second electrodes are respectively formed and which are disposed to face each other; an electrolyte injected through an electrolyte inlet formed in the first substrate, and filled between the first and second substrates; and a conductive sealing member for sealing the electrolyte inlet and electrically connected to at least one of the first and second electrodes. As such and according to an embodiment of the present invention, the photoelectric conversion module has a simple structure and/or may be easily mounted.
    Type: Application
    Filed: July 20, 2010
    Publication date: September 15, 2011
    Inventor: Nam-Choul Yang
  • Patent number: 7994032
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: August 9, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yi Chiang, Chung Wang, Shou-Gwo Wuu, Dun-Nian Yaung
  • Publication number: 20110168237
    Abstract: An integrated thin-film solar battery, comprising: a plurality of strings having a plurality of thin-film photoelectric conversion elements formed on a transparent insulating substrate, the thin-film photoelectric conversion elements being electrically connected in series to each other, wherein the thin-film photoelectric conversion elements have a first transparent electrode layer laminated on the transparent insulating substrate, a photoelectric conversion layer laminated on the first electrode layer and a second electrode layer laminated on the photoelectric conversion layer, the plurality of strings are arranged in parallel on the same transparent insulating substrate in a direction perpendicular to the series-connecting direction across one or more string separating grooves extending to the series-connecting direction, the string separating groove includes a first groove formed by removing the first electrode layer, and a second groove formed by removing the photoelectric conversion layer and the seco
    Type: Application
    Filed: September 14, 2009
    Publication date: July 14, 2011
    Inventors: Tohru Takeda, Yoshiyuki Nasuno
  • Publication number: 20110139222
    Abstract: A method of making a semiconductor device includes providing a web substrate, forming a first semiconductor layer of a first conductivity type over the web substrate, forming a second semiconductor layer of a second conductivity type over a first side of the first semiconductor layer, forming a first electrode layer over the second semiconductor layer, forming a handle web substrate over the first electrode layer, delaminating the web substrate from the first semiconductor layer after the step of forming the handle web substrate, where at least one opening extends through the first and the second semiconductor layers, and forming a second electrode layer over a second side of the first semiconductor layer such that the first and second electrode layers are in electrical contact with each other.
    Type: Application
    Filed: December 14, 2009
    Publication date: June 16, 2011
    Inventor: Timothy Kueper