In A Repetitive Configuration, E.g. Planar Multi-junction Solar Cells (epo) Patents (Class 257/E27.124)
E Subclasses
-
Patent number: 7936019Abstract: A power source and methods thereof includes a structure comprising one or more p type layers, one or more n type layers, and one or more intrinsic layers and at least one source of radiation is disposed on at least a portion of the structure. Each of the p type layers is separated from each of the n type layers by one of the intrinsic layers.Type: GrantFiled: July 13, 2005Date of Patent: May 3, 2011Assignees: Rochester Institute of Technology, Glenn Research CenterInventors: Ryne P. Raffaelle, David Wilt
-
Patent number: 7932404Abstract: A dye sensitized solar cell, comprising a-heteroleptic polypyridil complex of Ru, Os or Fe. The donating ligand has an extended conjugated n-system increasing the light absorbance and keeing the LUMO energy level higher than that of the anchoring ligand. A compacting compound whose molecular structure comprises a terminal group, a hydrophobic part and an anchoring? group may be co-adsorbed together with the dye on the semi-conductive metal oxide layer of the photoanode, forming a dense mixed self-assembled monolayer.Type: GrantFiled: July 29, 2005Date of Patent: April 26, 2011Assignee: Ecole Polytechnique Federale de Lausanne (EPFL)Inventors: Shaik Mohammad Zakeeruddin, Cédric Klein, Peng Wang, Michaël Graetzel
-
Patent number: 7932184Abstract: A method of manufacturing a solar cell module, including: forming a laminated body including a first protective member, a first sealing member having a first melting point, a plurality of solar cells, a second sealing member having a second melting point higher than the first melting point, and the second protective member; heating the first sealing member to a temperature equal to or higher than the first melting point but lower than the second melting point; and heating the second sealing member to a temperature equal to or higher than the second melting point. In forming the laminated body, the second sealing member is arranged to form a surface including a plurality of convex portions faces the first sealing member.Type: GrantFiled: September 16, 2008Date of Patent: April 26, 2011Assignee: Sanyo Electric Co., Ltd.Inventor: Yousuke Ishii
-
Patent number: 7888160Abstract: A process of manufacturing a solar cell is disclosed. The process comprises steps of (a) providing a semiconductor substrate, (b) forming a dielectric layer with amorphous silicon structure on the semiconductor substrate, (c) partially removing the dielectric layer with amorphous silicon structure to expose parts of the semiconductor substrate, (d) simultaneously forming a heavily doped region on a surface of the exposed semiconductor substrate and a lightly doped region on a surface of the unexposed semiconductor substrate using the dielectric layer with amorphous silicon structure as a translucent barrier layer, (e) removing the dielectric layer with amorphous silicon structure, (f) forming an anti-reflection coating on the semiconductor substrate, and (g) forming a first electrode on the anti-reflection coating and coupled with the heavily doped region.Type: GrantFiled: December 11, 2008Date of Patent: February 15, 2011Assignee: Mosel Vitelic Inc.Inventors: Chang Hong Shen, Pei Ting Lo
-
Publication number: 20100291729Abstract: A method of manufacturing a photoelectric conversion device having a semiconductor substrate, comprises a first step of forming an insulating film on the semiconductor substrate, a second step of forming first holes in the insulating film, a third step of forming, in the insulating film, second holes shallower than the first holes, a fourth step of forming electrically conductive portions by embedding an electrically conductive material in the first holes, and forming planarization assisting portions by embedding the electrically conductive material in the second holes, and a fifth step of polishing the electrically conductive portions, the insulating film, and the planarization assisting portions until the planarization assisting portions are removed, thereby planarizing upper surfaces of the electrically conductive portions and the insulating film.Type: ApplicationFiled: April 5, 2010Publication date: November 18, 2010Applicant: CANON KABUSHIKI KAISHAInventor: Akihiro Kawano
-
Publication number: 20100236606Abstract: A photoelectric conversion device wherein a lower electrode, a photoelectric-conversion semiconductor layer of a compound semiconductor material, and an upper electrode are formed in this order on an anodized substrate in which an anodized oxide film as an insulating film is formed on an aluminum base arranged at at least one surface of a metal substrate. The lower electrode is formed on the anodized oxide film. The main component of the photoelectric-conversion semiconductor layer is a compound semiconductor material with a chalcopyrite structure of Group Ib, IIIb and VIb elements. The photoelectric conversion device includes at least one insulative alkali supply layer formed between the anodized substrate and the lower electrode, and at least one insulative antidiffusion layer being formed between the anodized substrate and the at least one alkali supply layer, and suppressing diffusion, toward the anodized substrate, of one or more alkali and/or alkaline earth metal elements.Type: ApplicationFiled: March 10, 2010Publication date: September 23, 2010Applicant: FUJIFILM CorporationInventors: Hiroyuki Kobayashi, Shinya Suzuki, Toshiaki Fukunaga, Atsushi Mukai
-
Publication number: 20100224228Abstract: A charge transferor of a solar cell, which collects and transfer charges generated from a semiconductor substrate, includes at least one electrode collecting the charges; and at least one collector transferring the charges collected by the at least one electrode, the at least one collector being included in at least one collector region on the substrate, wherein the at least one collector region in a first direction comprises at least one deletion portion where the at least one collector is not formed.Type: ApplicationFiled: March 2, 2010Publication date: September 9, 2010Inventors: Jinah KIM, Jonghwan Kim, Younghyun Lee, Ilhyoung Jung, Seongeun Lee, Jeongbeom Nam, Minho Choi, Sungjin Kim, Juhwan Yun
-
Publication number: 20100224240Abstract: Methods of counterdoping a solar cell, particularly an IBC solar cell are disclosed. One surface of a solar cell may require portions to be n-doped, while other portions are p-doped. Traditionally, a plurality of lithography and doping steps are required to achieve this desired configuration. In contrast, one lithography step can be eliminated by the use of a blanket doping of one conductivity and a mask patterned counterdoping process of the opposite conductivity. The areas dosed during the masked patterned doping receive a sufficient dose so as to completely reverse the effect of the blanket doping and achieve a conductivity that is opposite the blanket doping. In another embodiment, the counterdoping is performed by means of a direct patterning technique, thereby eliminating the remaining lithography step. Various methods of direct counterdoping processes are disclosed.Type: ApplicationFiled: May 17, 2010Publication date: September 9, 2010Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Nicholas BATEMAN, Atul GUPTA, Paul SULLIVAN
-
Publication number: 20100200047Abstract: A method of producing a thin film photovoltaic system (2) having a two-dimensional metal chalcogenide compound semiconductor layer (7) as an absorber of sunlight and a metal layer (8) applied to the metal chalcogenide compound semiconductor layer is provided, wherein the metal chalcogenide compound semiconductor layer (7) and the metal layer (8) form a Schottky contact at their contact face. The method is characterized in that the metal chalcogenide compound semiconductor layer (7) is produced by applying a dispersion containing nanoscale particles having a diameter of about 3 nm to about 30 nm to a transparent substrate material (12), wherein the layer thickness of the metal chalcogenide compound semiconductor layer (7) applied to the substrate material ranges from about 150 nm to about 2500 nm.Type: ApplicationFiled: February 5, 2010Publication date: August 12, 2010Applicant: Zylum Beteiligungsgesellschaft mbH & Co. Patente II KGInventor: Dieter OSTERMANN
-
Patent number: 7763917Abstract: A photovoltaic device and method of manufacture provides a P-N junction formed between doped semiconductor materials and adapted to produce photovoltaic current in response to radiant energy reaching the P-N junction, and a silicon dioxide protective window layer located in proximity to doped semiconductor material and adapted to allow radiant energy to pass therethrough en route to the P-N junction, the protective layer including a high optical transparency layer of amorphous silica, having a silicon dioxide chemistry greater than 75 molar percent (75 mol %).Type: GrantFiled: January 24, 2007Date of Patent: July 27, 2010Inventor: L. Pierre de Rochemont
-
Publication number: 20100116311Abstract: A dye-sensitized solar cell module comprising: at least two dye-sensitized solar cells each formed by layering, on a light transmitting substrate, a transparent conductive layer, a grid electrode, a photoelectric conversion layer in which a dye is adsorbed in a porous semiconductor layer and the porous semiconductor layer is filled with a carrier transporting material, and a counter electrode, the at least two dye-sensitized solar cells being arranged on the same light transmitting substrate via an inter-cell insulating layer, one dye-sensitized solar cell and its neighboring dye-sensitized solar cell being connected in series via a connection layer.Type: ApplicationFiled: March 19, 2008Publication date: May 13, 2010Inventor: Atsushi FUKUI
-
Patent number: 7709288Abstract: The present invention provides a method for manufacturing a multi-junction solar cell which makes it possible to implement a 4-junction solar cell and to increase the area of a device. A nucleus generation site is disposed on a substrate 2 made of a first semiconductor. A first material gas is fed to the nucleus generation site to form a wire-like semiconductor 3 in the nucleus generation site. A third material gas and a fourth material gas are fed to form a wire-like semiconductor 4 on the semiconductor 3 and a wire-like semiconductor 5 on the semiconductor 4. A nucleus generation site is disposed on a substrate 6. The first material gas is fed to the nucleus generation site to form a wire-like semiconductor 2a in the nucleus generation site. A second material gas to the fourth material gas are fed to form the wire-like semiconductor 3 on the semiconductor 2a, the wire-like semiconductor 4 on the semiconductor 3, and the wire-like semiconductor 5 on the semiconductor 4.Type: GrantFiled: July 17, 2007Date of Patent: May 4, 2010Assignee: Honda Motor Co., Ltd.Inventor: Hajime Goto
-
Publication number: 20100071743Abstract: A dye-sensitized solar cell module comprising: a plurality of electrically series-connected solar cells having a first conductive layer formed on an insulating substrate; a photoelectric conversion device formed on the first conductive layer; and a second conductive layer formed on the photoelectric conversion device, wherein the photoelectric conversion device has a photoelectric conversion layer having a porous semiconductor layer adsorbing a dye, a carrier transporting layer and a catalyst layer and the dye-sensitized solar cell module is characterized in that the second conductive layer of the above-described one solar cell contacts the first conductive layer of an adjacent another solar cell and the photoelectric conversion device of the above-described adjacent another solar cell contacts the second conductive layer of the above-described one solar cell.Type: ApplicationFiled: July 3, 2007Publication date: March 25, 2010Inventors: Ryohsuke Yamanaka, Nobuhiro Fuke, Atsushi Fukui
-
Patent number: 7659542Abstract: A polycrystalline silicon plate has grain boundary lines on a surface thereof, and at least one of the grain boundary lines is a quasi-linear grain boundary line (1). The silicon plate is used to produce a solar cell. The silicon plate is formed using a base substrate having an irregular surface provided with dotted or linear protrusions, which makes it possible to control the grain boundary lines. As such, an inexpensive and high-quality silicon plate can be provided. Further, by employing this silicon plate to produce a solar cell, an inexpensive and high-quality solar cell can be provided as well.Type: GrantFiled: April 28, 2006Date of Patent: February 9, 2010Assignee: Sharp Kabushiki KaishaInventor: Yoshihiro Tsukuda
-
Publication number: 20090217966Abstract: The present invention relates to a photovoltaic conversion apparatus including a by-pass diode and a manufacturing method thereof. The photovoltaic conversion apparatus of the present invention comprises at least one unit solar cell module configured of at least one unit solar cell; and a by-pass solar cell module including at least one solar cell electrically connected to the unit solar cell to by-pass current. According to the present invention, a photovoltaic conversion apparatus having high photoelectric conversion efficiency can be manufactured. Also, the photovoltaic conversion apparatus will contribute to earths environmental conservation as the next clean energy source and can be directly applied to private facilities, public facilities, military facilities, etc., to create enormous economic value.Type: ApplicationFiled: September 3, 2007Publication date: September 3, 2009Applicant: LG Electronics Inc.Inventors: Young-Joo Eo, Hwa-Nyeon Kim, Seh-Won Ahn, Hae-Seok Lee, Heon-Min Lee, Jung-Heum Yun, Kwang-Sun Ji, Bum-Sung Kim
-
Publication number: 20070257280Abstract: A charge transfer transistor includes: a first diffusion region and a second diffusion region; a gate for controlling a charge transfer from the first diffusion region to the second diffusion region by a control signal; and a potential well incorporated under the gate, wherein the first diffusion region is a pinned photodiode. A pixel of an image sensor includes: a photodiode for generating and collecting a photo generated charge; a floating diffusion region for serving as a photo generated charge sensing node; a transfer gate for controlling a charge transfer from the photodiode to the floating diffusion region by a control signal; and a potential well incorporated under the transfer gate.Type: ApplicationFiled: February 28, 2007Publication date: November 8, 2007Inventor: Jaroslav Hynecek
-
Publication number: 20070221919Abstract: The object of the present invention is to provide a diode that acts as a cell string bypass diode or a reverse-current preventive diode, has excellent heat dissipativity, and are preferably sealed integrally in a solar cell module. An N terminal 11 has an N substrate part 12 having an even thickness of 0.8 mm or more, an N thin part 13, which is one thin part, and an N connecting wire receiving part 14, which is the other thin part. A P terminal 21 has a P substrate part 22, a P thin part 23, and a P connecting wire receiving part 24. In a state where said diode chip 31 is connected, the thickness of the entire lead terminal is almost the same as that of the substrate part, i.e. the terminal, and the total of plane area of the N substrate part and that of the P substrate part is 200 mm2 or more. Said diode, together with the solar cell, is sealed between a front surface material and a rear surface material where the solar cell is to be sealed.Type: ApplicationFiled: May 19, 2005Publication date: September 27, 2007Applicant: ANGEL CO., LTD.Inventors: Hirofumi Sato, Kazunari Sato, Koichi Fujii
-
Publication number: 20070169685Abstract: Methods and apparatuses are provided for casting silicon for photovoltaic cells and other applications. With such methods and apparatuses, a cast body of geometrically ordered multi-crystalline silicon may be formed that is free or substantially free of radially-distributed impurities and defects and having at least two dimensions that are each at least about 10 cm is provided.Type: ApplicationFiled: January 18, 2007Publication date: July 26, 2007Applicant: BP Corporation North America Inc.Inventor: Nathan G. Stoddard
-
Publication number: 20070169684Abstract: Methods and apparatuses are provided for casting silicon for photovoltaic cells and other applications. With such methods and apparatuses, a cast body of monocrystalline silicon may be formed that is free of, or substantially free of, radially-distributed impurities and defects and having at least two dimensions that are each at least about 35 cm is provided.Type: ApplicationFiled: January 18, 2007Publication date: July 26, 2007Applicant: BP Corporation North America Inc.Inventor: Nathan G. Stoddard
-
Patent number: 7141834Abstract: Ge/Si and other nonsilicon film heterostructures are formed by hydrogen-induced exfoliation of the Ge film which is wafer bonded to a cheaper substrate, such as Si. A thin, single-crystal layer of Ge is transferred to Si substrate. The bond at the interface of the Ge/Si heterostructures is covalent to ensure good thermal contact, mechanical strength, and to enable the formation of an ohmic contact between the Si substrate and Ge layers. To accomplish this type of bond, hydrophobic wafer bonding is used, because as the invention demonstrates the hydrogen-surface-terminating species that facilitate van der Waals bonding evolves at temperatures above 600° C. into covalent bonding in hydrophobically bound Ge/Si layer transferred systems.Type: GrantFiled: June 24, 2005Date of Patent: November 28, 2006Assignee: California Institute of TechnologyInventors: Harry A. Atwater, Jr., James M. Zahler
-
Patent number: 7135350Abstract: In one embodiment, a method of forming doped regions in a substrate of a back side contact solar cell includes the steps of depositing a first doped oxide layer on a back side of a substrate, depositing a first undoped oxide layer over the first doped oxide layer, diffusing a first dopant from the first doped oxide layer into the substrate to form a first doped region in the substrate, and diffusing a second dopant into the substrate by way of a front side of the substrate, wherein the diffusion of the first dopant and the second dopant into the substrate are performed in-situ. The method may further include the steps of patterning the first doped and undoped oxide layers to expose portions of the back side of the substrate and depositing a second doped and undoped oxide layers on the back side of the substrate.Type: GrantFiled: January 9, 2006Date of Patent: November 14, 2006Assignee: Sunpower CorporationInventors: David D. Smith, Michael J. Cudzinovic, Keith R. McIntosh, Bharatkumar Gamanlal Mehta