Including Only Thin Film Solar Cells Deposited On A Substrate (epo) Patents (Class 257/E27.125)
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Patent number: 8187907Abstract: A method of manufacturing a solar cell by providing a first substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell including a top subcell and a bottom subcell; forming a metal back contact over the bottom subcell; forming a group of discrete, spaced-apart first bonding elements over the surface of the back metal contact; attaching a surrogate substrate on top of the back metal contact using the bonding elements; and removing the first substrate to expose the surface of the top subcell.Type: GrantFiled: May 7, 2010Date of Patent: May 29, 2012Assignee: Emcore Solar Power, Inc.Inventor: Fred Newman
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Patent number: 8183097Abstract: A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased.Type: GrantFiled: August 6, 2008Date of Patent: May 22, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Ki Kwak, Hyang-Shik Kong, Sun-Il Kim
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Patent number: 8168467Abstract: The present invention provides improved solar cells. This patent teaches a particularly efficient method of device manufacture based on incorporating the solar cell fabrication into the widely used, high temperature, Float Glass manufacture process.Type: GrantFiled: March 17, 2010Date of Patent: May 1, 2012Inventors: James P Campbell, Harry R Campbell, Ann B Campbell, Joel F Farber
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Patent number: 8148796Abstract: Disclosed are a solar cell and a manufacturing method thereof. The solar cell in accordance with an embodiment of the present invention includes: a substrate having a plurality of holes formed on one surface thereof; a metal layer formed on an inner wall of the hole and on one surface of the substrate; a p-type semiconductor coated on the metal layer; an n-type semiconductor formed inside the hole and on one surface of the substrate; a transparent conductive oxide formed on the n-type semiconductor; and an electrode terminal formed on the p-type semiconductor and on the transparent conductive oxide.Type: GrantFiled: May 28, 2009Date of Patent: April 3, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Ro-Woon Lee, Jae-Woo Joung, Shang-Hoon Seo, Tae-Gu Kim
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Patent number: 8148192Abstract: The present invention provides improved devices such as transparent solar cells. This patent teaches a particularly efficient method of device manufacture based on incorporating the solar cell fabrication into the widely used, high temperature, Float Glass manufacture process.Type: GrantFiled: February 22, 2010Date of Patent: April 3, 2012Inventors: James P Campbell, Harry R Campbell, Ann B Campbell, Joel F Farber
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Patent number: 8129822Abstract: A template 100 for three-dimensional thin-film solar cell substrate formation for use in three-dimensional thin-film solar cells. The template 100 comprises a substrate which comprises a plurality of posts 102 and a plurality of trenches 104 between said plurality of posts 102. The template 100 forms an environment for three-dimensional thin-film solar cell substrate formation.Type: GrantFiled: October 6, 2007Date of Patent: March 6, 2012Assignee: Solexel, Inc.Inventor: Mehrdad Moslehi
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Publication number: 20110300663Abstract: The invention provides a method of manufacturing a monolithic thin-film photovoltaic cell or module with enhanced output voltage as high as 100 V or higher in a single microelectronic process without connecting in series a plurality of premanufactured solar cells. The method consists of forming a plurality of adjacent individual TSCs arranged on a common transparent substrate in the longitudinal direction of the substrate. Each TSC consists of a pair of PV cells having PIN and NIP structures, respectively, with substantially coplanar position of a P-doped layer of one of the cells with respect to an N-doped layer of another cell of the pair. A tunnel junction is formed between the cells of the pair by overlapping P-doped and N-doped layers in the area near the common transparent substrate.Type: ApplicationFiled: June 7, 2010Publication date: December 8, 2011Inventor: Boris Gilman
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Patent number: 8049255Abstract: A semiconductor device includes an insulating substrate and a TFT element disposed on the substrate. The TFT element includes a gate electrode, a gate insulating film, a semiconductor layer, and a source electrode and a drain electrode arranged in that order on the insulating substrate. The semiconductor layer includes an active layer composed of polycrystalline semiconductor and a contact layer segment interposed between the active layer and the source electrode and another contact layer segment interposed between the active layer and the drain electrode. The source and drain electrodes each have a first face facing the opposite face of the active layer from the interface with the gate insulating layer and a second face facing an etched side face of the active layer. Each contact layer segment is disposed between the active layer and each of the first and second faces of the source or drain electrode.Type: GrantFiled: June 5, 2008Date of Patent: November 1, 2011Assignee: Hitachi Displays, Ltd.Inventors: Takeshi Sakai, Toshio Miyazawa, Takuo Kaitoh, Hidekazu Miyake
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Patent number: 8039927Abstract: The linear semiconductor substrate 1 or 2 of the present invention comprises at least one desired thin film 4 formed on a linear substrate 3 having a length ten or more times greater than a width, thickness, or diameter of the linear substrate itself. Adopting semiconductor as the thin film 4 forms a linear semiconductor thin film. The linear semiconductor substrate 1 or 2 of the present invention is produced by utilizing a fiber-drawing technique which is a fabricating technique of optical fibers.Type: GrantFiled: March 23, 2006Date of Patent: October 18, 2011Assignee: The Furukawa Electric Co., Ltd.Inventors: Toshihiro Nakamura, Nobuaki Orita, Hisashi Koaizawa, Kenkichi Suzuki, Hiroshi Kuraseko, Michio Kondo
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Patent number: 8034654Abstract: The method is disclosed that Si+ is implanted on Si substrate to enhance strain relaxation at the interface between the metamorphic GexSi1?x buffer layers and Si substrate, in order to facilitate the growth of a high quality Ge on Si substrate. And several GexSi1?x buffer layers (Si/Ge0.8Si0.2/Ge0.9Si0.1/Ge) are grown on top of Si substrate by UHVCVD. Then grow pure Ge layer of low dislocation density on GexSi1?x buffer layer. Finally, grow up high efficiency III-V solar cell on GexSi1?x buffer layer.Type: GrantFiled: August 4, 2009Date of Patent: October 11, 2011Assignee: National Chiao Tung UniversityInventors: Edward Yi Chang, Shih-Hsuan Tang, Yue-Cin Lin
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Patent number: 8026565Abstract: A thin film semiconductor in the form of a metal semiconductor field effect transistor, includes a substrate 10 of paper sheet material and a number of thin film active inorganic layers that are deposited in layers on the substrate. The active layers are printed using an offset lithography printing process. A first active layer comprises source 12.1 and drain 12.2 conductors of colloidal silver ink, that are printed directly onto the paper substrate. A second active layer is an intrinsic semiconductor layer 14 of colloidal nanocrystalline silicon ink which is printed onto the first layer. A third active layer comprises a metallic conductor 16 of colloidal silver which is printed onto the second layer to form a gate electrode. This invention extends to other thin film semiconductors such as photovoltaic cells and to a method of manufacturing semiconductors.Type: GrantFiled: January 30, 2004Date of Patent: September 27, 2011Assignee: University of Cape TownInventors: Margit Harting, David Thomas Britton
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Patent number: 7943405Abstract: A liquid crystal display panel and a fabricating method thereof comprising an image sensing capability, image scanning, and touch inputting. In the liquid crystal display device, a gate line and a data line are formed to intersect each other on a substrate to define a pixel area in which a pixel electrode is positioned. A first thin film transistor is positioned at an intersection area of the gate line and the data line. A sensor thin film transistor senses light having image information and supplied with a first driving voltage from the data line. A driving voltage supply line is positioned in parallel to the gate line to supply a second driving voltage to the sensor thin film transistor.Type: GrantFiled: May 20, 2010Date of Patent: May 17, 2011Assignee: LG Display Co., Ltd.Inventors: Hee Kwang Kang, Kyo Seop Choo
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Patent number: 7932184Abstract: A method of manufacturing a solar cell module, including: forming a laminated body including a first protective member, a first sealing member having a first melting point, a plurality of solar cells, a second sealing member having a second melting point higher than the first melting point, and the second protective member; heating the first sealing member to a temperature equal to or higher than the first melting point but lower than the second melting point; and heating the second sealing member to a temperature equal to or higher than the second melting point. In forming the laminated body, the second sealing member is arranged to form a surface including a plurality of convex portions faces the first sealing member.Type: GrantFiled: September 16, 2008Date of Patent: April 26, 2011Assignee: Sanyo Electric Co., Ltd.Inventor: Yousuke Ishii
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Patent number: 7927497Abstract: The present invention relates to integrated thin film solar cells, and more particularly, to integrated thin film solar cells, which minimize the loss of integrated solar cells caused at the time of a manufacturing process and become available at a low cost process, and a method of manufacturing thereof, a processing method of a transparent electrode for integrated thin film solar cells, which widens an effective area and reduces manufacturing costs by minimizing a (insulating) gap between unit cells of the integrated thin film solar cells, and a structure thereof, and a transparent substrate having the transparent electrode.Type: GrantFiled: March 16, 2006Date of Patent: April 19, 2011Assignee: Korea Advanced Institute of Science and TechnologyInventors: Koeng Su Lim, Seong Won Kwon, Jeong Hwan Kwak, Sang Il Park, Jun-Bo Yoon, Gun-Woo Moon
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Patent number: 7923733Abstract: A semiconductor device includes a semiconductor layer including a channel region, and a first region and a second region to which an impurity element is introduced to make the first region and the second region a source and a drain, a third region, and a gate electrode provided to partly overlap with the semiconductor layer with a gate insulating film interposed therebetween In the semiconductor layer, the first region is electrically connected to the gate electrode through a first electrode to which an AC signal is input, the second region is electrically connected to a capacitor element through a second electrode, the third region overlaps with the gate electrode and contains an impurity element at lower concentrations than each of the first region and the second region.Type: GrantFiled: January 12, 2009Date of Patent: April 12, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Koichiro Kamata
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Patent number: 7888160Abstract: A process of manufacturing a solar cell is disclosed. The process comprises steps of (a) providing a semiconductor substrate, (b) forming a dielectric layer with amorphous silicon structure on the semiconductor substrate, (c) partially removing the dielectric layer with amorphous silicon structure to expose parts of the semiconductor substrate, (d) simultaneously forming a heavily doped region on a surface of the exposed semiconductor substrate and a lightly doped region on a surface of the unexposed semiconductor substrate using the dielectric layer with amorphous silicon structure as a translucent barrier layer, (e) removing the dielectric layer with amorphous silicon structure, (f) forming an anti-reflection coating on the semiconductor substrate, and (g) forming a first electrode on the anti-reflection coating and coupled with the heavily doped region.Type: GrantFiled: December 11, 2008Date of Patent: February 15, 2011Assignee: Mosel Vitelic Inc.Inventors: Chang Hong Shen, Pei Ting Lo
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Patent number: 7866035Abstract: Embodiments in accordance with the present invention relate to the design and manufacturing of inexpensive photovoltaic or thermal receivers for cost-effective solar energy conversion of concentrated light. Particular embodiments in accordance with the present invention disclose the design of a photovoltaic receiver and a low-pressure, low-flow-rate liquid cooler. Embodiment of the present invention also disclose a preferred low-cost and scalable manufacturing approach.Type: GrantFiled: August 24, 2007Date of Patent: January 11, 2011Assignee: CoolEarth SolarInventors: Eric Bryant Cummings, Kevin Christopher Moore
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Patent number: 7858983Abstract: An electrochromic display is disclosed which comprises an array-side substrate (10) wherein a TFT (14) and a pixel electrode (15) connected with the TFT (14) are formed, a color filter-side substrate (50) wherein a counter electrode (53) is formed, and an electrolyte layer (80) injected between the array-side substrate (10) and the color filter-side substrate (50). In this electrochromic display, the TFT (14) is formed to have an area not less than 30% of the area of the pixel, thereby supplying a larger current. Consequently, oxidation-reduction reaction in the electrochromic phenomenon proceeds at a higher rate, thereby enabling a high-speed response.Type: GrantFiled: January 31, 2006Date of Patent: December 28, 2010Inventors: Satoshi Morita, Takao Yamauchi, Yutaka Sano
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Patent number: 7846750Abstract: A photovoltaic device including a rear electrode which may also function as a rear reflector. In certain example embodiments, the rear electrode comprises a reflective film (e.g., of Mo or the like) including one or more layers provided on an interior surface of a rear glass substrate of the photovoltaic device. In certain example embodiments, the interior surface(s) of the rear glass substrate and/or reflective film is/are textured so as to provide desirable electrical and reflective characteristics. The rear glass substrate and textured rear electrode/reflector are used in a photovoltaic device (e.g., CIS or CIGS solar cell) where an active semiconductor film is provided between the rear electrode/reflector and a front electrode(s).Type: GrantFiled: June 12, 2007Date of Patent: December 7, 2010Assignee: Guardian Industries Corp.Inventor: Leonard L. Boyer, Jr.
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Patent number: 7833808Abstract: Methods for forming a photovoltaic cell electrode structure, wherein the photovoltaic cell includes a semiconductor substrate having a passivation layer thereon, includes providing a plurality of contact openings through the passivation layer to the semiconductor substrate, selectively plating a contact metal into the plurality of contact openings to deposit the contact metal, depositing a metal containing material on the deposited contact metal, and firing the deposited contact metal and the deposited metal containing material. The metal containing material may include a paste containing a silver or silver alloy along with a glass frit and is substantially free to completely free of lead. The methods may also use light activation of the passivation layer or use seed layers to assist in the plating.Type: GrantFiled: March 24, 2008Date of Patent: November 16, 2010Assignee: Palo Alto Research Center IncorporatedInventors: Baomin Xu, Karl A. Littau, David K. Fork
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Publication number: 20100282305Abstract: A method of manufacturing a solar cell comprising providing a growth substrate; depositing on said growth substrate a sequence of layers of semiconductor material forming a solar cell, including at least one subcell composed of a group IV/III-V hybrid alloy such as GeSiSn; and removing the semiconductor substrate.Type: ApplicationFiled: May 8, 2009Publication date: November 11, 2010Applicant: Emcore Solar Power, Inc.Inventors: Paul Sharps, Fred Newman
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Publication number: 20100282303Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, the thin film type solar cell comprising a substrate; a plurality of front electrodes on the substrate at fixed intervals by each first separating part interposed in-between; a plurality of semiconductor layers on the front electrodes at fixed intervals by each contact part interposed in-between; and a plurality of rear electrodes connected with the front electrodes through the contact part, provided at fixed intervals by each second separating part interposed in-between, wherein a main isolating part is formed in the outermost front electrode, the outermost semiconductor layer, and the outermost rear electrode, wherein an auxiliary isolating part is formed in at least one of the outermost front electrode and the outermost rear electrode, wherein the auxiliary isolating part is positioned on the inside of the main isolating part.Type: ApplicationFiled: December 29, 2008Publication date: November 11, 2010Inventors: Won Seok Park, Yong Woo Shin, Seong Ryong Hwang
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Patent number: 7816712Abstract: A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.Type: GrantFiled: November 20, 2007Date of Patent: October 19, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Hyun Choung, Hong-Sick Park, Joo-Ae Youn, Sun-Young Hong, Bong-Kyun Kim, Won-Suk Shin, Byeong-Jin Lee
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Patent number: 7812355Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device having a semiconductor element capable of reducing a cost and improving a throughput with a minute structure, and further, a method for manufacturing a liquid crystal television and an EL television. According to one feature of the invention, a method for manufacturing a semiconductor device comprises the steps of: forming a light absorption layer over a substrate, forming a first region over the light absorption layer by using a solution, generating heat by irradiating the light absorption layer with laser light, and forming a first film pattern by heating the first region with the heat.Type: GrantFiled: December 8, 2008Date of Patent: October 12, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hiroko Shiroguchi, Yoshiaki Yamamoto
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Patent number: 7763917Abstract: A photovoltaic device and method of manufacture provides a P-N junction formed between doped semiconductor materials and adapted to produce photovoltaic current in response to radiant energy reaching the P-N junction, and a silicon dioxide protective window layer located in proximity to doped semiconductor material and adapted to allow radiant energy to pass therethrough en route to the P-N junction, the protective layer including a high optical transparency layer of amorphous silica, having a silicon dioxide chemistry greater than 75 molar percent (75 mol %).Type: GrantFiled: January 24, 2007Date of Patent: July 27, 2010Inventor: L. Pierre de Rochemont
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Publication number: 20100180925Abstract: To provide a thin-film solar cell module capable of preventing damage to a cell and a contact line. A thin-film solar cell module of the present invention has a characteristic that it provides a cell module having a plurality of cell strings bidirectionally connected to each other in parallel, the cell strings each having a plurality of cells connected to each other in series via a contact line, wherein when an output from the cell module is P (W), an output from one of the cell strings is Ps (W), and an area of the contact line is Sc (cm2) under a condition of light source: xenon lamp, irradiance: 100 mW/cm2, AM: 1.5, and temperature: 25° C., (P?Ps)/Sc is 10.7 (kW/cm2) or less, Ps is 12 W or less, and P is 385 W or less.Type: ApplicationFiled: May 29, 2008Publication date: July 22, 2010Inventors: Yoshiyuki Nasuno, Akira Shimizu
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Patent number: 7741646Abstract: A liquid crystal display panel and a fabricating method thereof comprising an image sensing capability, image scanning, and touch inputting. In the liquid crystal display device, a gate line and a data line are formed to intersect each other on a substrate to define a pixel area in which a pixel electrode is positioned. A first thin film transistor is positioned at an intersection area of the gate line and the data line. A sensor thin film transistor senses light having image information and supplied with a first driving voltage from the data line. A driving voltage supply line is positioned in parallel to the gate line to supply a second driving voltage to the sensor thin film transistor.Type: GrantFiled: June 13, 2006Date of Patent: June 22, 2010Assignee: LG Display Co., Ltd.Inventors: Hee Kwang Kang, Kyo Seop Choo
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Patent number: 7741144Abstract: Embodiments of the present invention include an improved method of forming a thin film solar cell device using a plasma processing treatment between two or more deposition steps. Embodiments of the invention also generally provide a method and apparatus for forming the same. The present invention may be used to advantage to form other single junction, tandem junction, or multi-junction solar cell devices.Type: GrantFiled: October 31, 2008Date of Patent: June 22, 2010Assignee: Applied Materials, Inc.Inventors: Soo Young Choi, Yong-Kee Chae, Shuran Sheng, Liwei Li
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Patent number: 7709288Abstract: The present invention provides a method for manufacturing a multi-junction solar cell which makes it possible to implement a 4-junction solar cell and to increase the area of a device. A nucleus generation site is disposed on a substrate 2 made of a first semiconductor. A first material gas is fed to the nucleus generation site to form a wire-like semiconductor 3 in the nucleus generation site. A third material gas and a fourth material gas are fed to form a wire-like semiconductor 4 on the semiconductor 3 and a wire-like semiconductor 5 on the semiconductor 4. A nucleus generation site is disposed on a substrate 6. The first material gas is fed to the nucleus generation site to form a wire-like semiconductor 2a in the nucleus generation site. A second material gas to the fourth material gas are fed to form the wire-like semiconductor 3 on the semiconductor 2a, the wire-like semiconductor 4 on the semiconductor 3, and the wire-like semiconductor 5 on the semiconductor 4.Type: GrantFiled: July 17, 2007Date of Patent: May 4, 2010Assignee: Honda Motor Co., Ltd.Inventor: Hajime Goto
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Patent number: 7704863Abstract: Chemical bath deposition (CBD) has proved top be the most favorable method for application of a buffer layer to semiconductor substrates, for example, chalcopyrite thin-film solar cells, whereby previously cadmium sulphide (CdS) was deposited and as cadmium is a highly toxic heavy metal, alternatives have been required. According to the invention, the semiconductor substrate is dipped in a solution for approximately 10 minutes, produced by the dissolution of zinc sulphate (0.05-0.5 mol/l) and thiourea (0.2 to 1.5 mol/l) in distilled water at a temperature being held essentially constant throughout said period. For the first time, the ZnS layer permits comparable or higher efficiencies than conventionally only achieved with toxic cadmium compounds. The method is hence much more environmentally-friendly with the same result.Type: GrantFiled: August 11, 2005Date of Patent: April 27, 2010Assignee: Helmholtz-Zentrum Berlin fuer Materialien und Energie GmbHInventors: Ahmed Ennaoui, Timo Kropp, Martha Christina Lux-Steiner
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Patent number: 7635954Abstract: A structural configuration of a failsafe OLED chain with multiple OLED lighting components in series connection is described. During the manufacture of the lighting component a weak spot is specifically installed at an appropriate location of the structure in the form of a break-through layer, which in the event of a failure of the lighting component breaks down and bypasses the component with a bypass layer.Type: GrantFiled: November 30, 2007Date of Patent: December 22, 2009Assignee: Osram Opto Semiconductors GmbHInventor: Peter Niedermeier
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Patent number: 7586123Abstract: A thin film transistor array substrate and a fabricating method thereof are disclosed. The thin film transistor array substrate protects a thin film transistor without a protective film and accordingly reduces the manufacturing cost. In the thin film transistor array substrate, a gate electrode is connected to a gate line. A source electrode is connected to a data line crossing the gate line to define a pixel area. A drain electrode is opposed to the source electrode with a channel therebetween. A semiconductor layer is in the channel. A pixel electrode in the pixel area contacts the drain electrode over substantially the entire overlapping area between the two. A channel protective film is provided on-the semiconductor layer corresponding to the channel to protect the semiconductor layer.Type: GrantFiled: June 10, 2005Date of Patent: September 8, 2009Assignee: LG. Display Co., Ltd.Inventors: Young Seok Choi, Byung Yong Ahn, Ki Sul Cho, Hong Woo Yu
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Patent number: 7485477Abstract: In order to obtain a thin plate manufacturing method capable of extremely increasing manufacturing efficiency by enlarging the production scale and remarkably reducing the manufacturing cost per unit area and an apparatus for manufacturing this thin plate, a method and an apparatus performing introduction of a substrate into a main chamber and discharge of the substrate from the main chamber through at least one subsidiary chamber (3, 4) adjacent to the main chamber (1) are employed when manufacturing a silicon thin plate by dipping a surface layer part of the substrate into a silicon melt (7) in a crucible (2) arranged in the main chamber (1) for bonding silicon (5) to the surface of the substrate.Type: GrantFiled: October 10, 2006Date of Patent: February 3, 2009Assignees: Sharp Kabushiki Kaisha, Shinko Electric Co., Ltd.Inventors: Shuji Goma, Hirozumi Gokaku, Kozaburo Yano, Masahiro Tadokoro, Yasuhiro Nakai
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Publication number: 20090011535Abstract: The present invention relates to the field of thin film solar cells and particularly to an apparatus and method for manufacturing thin film solar cells. At least one material is deposited onto a substrate, whereby the deposited material is heated by means of heating means on a limited area of the deposited material. The substrate and the heating means are continuously moved in relation to each other until a predetermined area of the deposited material is heated, whereby the heated material is cooled in a controlled way, thus, obtaining a desired crystalline structure of the deposited material.Type: ApplicationFiled: October 6, 2005Publication date: January 8, 2009Inventor: Sven Lindstrom
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Patent number: 7468537Abstract: Semiconductor devices (102) and drain extended PMOS transistors (CT1a) are provided, as well as fabrication methods (202) therefor, in which a p-type separation region (130) is formed between an n-buried layer (108) and the transistor backgate (126) to increase breakdown voltage performance without increasing epitaxial thickness.Type: GrantFiled: December 15, 2004Date of Patent: December 23, 2008Assignee: Texas Instruments IncorporatedInventor: Sameer Pendharkar
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Patent number: 7439600Abstract: The invention concerns a photovoltaic device (1) comprising a plurality of p-i-n type photovoltaic cells (2) arranged on a substrate (3), wherein said cells (2) are arranged, in the form of a single layer, parallel to one another and the electrical conductive layer (7) is arranged between the n layer (6) and the p layer (5) of each consecutive cell (2) so as to electrically connect said cells (2) in series. The invention also concerns the use of such a device (1) as glazing, a method for making such a device (1), a method for controlling a transparent photovoltaic device (1) as well as an installation for implementing said control method.Type: GrantFiled: December 20, 2001Date of Patent: October 21, 2008Inventor: Adrianus De Ruiter
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Patent number: 7425728Abstract: A surface light source control device has a plane light source control circuit for setting a current amount to a plurality of diode arrays. The light source control circuit comprises a constant current circuit for holding currents respectively flowing in the plurality of diode arrays constant at the same current value; and a power supply voltage control loop for selecting a notable diode array with a minimum reference voltage, among reference voltages appearing at each terminal of the plurality of diode arrays, appeared thereon to select the minimum reference voltage by a voltage selection circuit and adjusting a common power supply voltage so that the reference voltage becomes a prescribed value.Type: GrantFiled: November 21, 2005Date of Patent: September 16, 2008Assignee: Toshiba Matsushita Display Technology Co., Ltd.Inventor: Kenshi Tsuchiya
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Patent number: 7368755Abstract: Provided is an array substrate of an LCD that includes a substrate, an active layer, a first insulating layer, and a gate electrode sequentially formed on the substrate. A source region and a drain region reside in predetermined regions of the active layer and each is doped with impurity ions. A second insulating layer overlies an entire surface of the substrate including the gate electrode. A pixel electrode resides on the second insulating layer. First and second contact holes reside in the first and second insulating layer and expose portions of the source region and the drain region, respectively. A portion of a source electrode contacts the source region through the first contact hole and a first portion of a drain electrode contacts the drain region and a second portion contacts the pixel electrode.Type: GrantFiled: September 21, 2004Date of Patent: May 6, 2008Assignee: LG. Philips LCD. Co., LtdInventors: Hun Jeoung, Jeong Woo Jang
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Publication number: 20080020503Abstract: Series interconnection of optoelectronic device modules is disclosed. Each device module includes an active layer disposed between a bottom electrode and a transparent conducting layer. An insulating layer is disposed between the bottom electrode of a first device module and a backside top electrode of the first device module. One or more vias are formed through the active layer, transparent conducting layer and insulating layer of the first device module. Sidewalls of the vias are coated with an insulating material such that a channel is formed through the insulating material to the backside top electrode of the first device module. The channel is at least partially filled with an electrically conductive material to form a plug that makes electrical contact between the transparent conducting layer and the backside top electrode of the first device module.Type: ApplicationFiled: October 1, 2007Publication date: January 24, 2008Inventors: James Sheats, Sam Kao, Gregory Miller, Martin Roscheisen
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Publication number: 20070169685Abstract: Methods and apparatuses are provided for casting silicon for photovoltaic cells and other applications. With such methods and apparatuses, a cast body of geometrically ordered multi-crystalline silicon may be formed that is free or substantially free of radially-distributed impurities and defects and having at least two dimensions that are each at least about 10 cm is provided.Type: ApplicationFiled: January 18, 2007Publication date: July 26, 2007Applicant: BP Corporation North America Inc.Inventor: Nathan G. Stoddard
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Publication number: 20070169684Abstract: Methods and apparatuses are provided for casting silicon for photovoltaic cells and other applications. With such methods and apparatuses, a cast body of monocrystalline silicon may be formed that is free of, or substantially free of, radially-distributed impurities and defects and having at least two dimensions that are each at least about 35 cm is provided.Type: ApplicationFiled: January 18, 2007Publication date: July 26, 2007Applicant: BP Corporation North America Inc.Inventor: Nathan G. Stoddard
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Patent number: 7176542Abstract: A photo-EMF detector including a shield to prevent a portion of the detector from illumination. The shield prevents the generation of unwanted noise-currents, thus increasing the performance of the photo-EMF detector.Type: GrantFiled: April 22, 2004Date of Patent: February 13, 2007Inventors: Gilmore J. Dunning, Marko Sokolich, Deborah Vogel, David M. Pepper
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Patent number: 7141834Abstract: Ge/Si and other nonsilicon film heterostructures are formed by hydrogen-induced exfoliation of the Ge film which is wafer bonded to a cheaper substrate, such as Si. A thin, single-crystal layer of Ge is transferred to Si substrate. The bond at the interface of the Ge/Si heterostructures is covalent to ensure good thermal contact, mechanical strength, and to enable the formation of an ohmic contact between the Si substrate and Ge layers. To accomplish this type of bond, hydrophobic wafer bonding is used, because as the invention demonstrates the hydrogen-surface-terminating species that facilitate van der Waals bonding evolves at temperatures above 600° C. into covalent bonding in hydrophobically bound Ge/Si layer transferred systems.Type: GrantFiled: June 24, 2005Date of Patent: November 28, 2006Assignee: California Institute of TechnologyInventors: Harry A. Atwater, Jr., James M. Zahler