Three-phase Ccd (epo) Patents (Class 257/E29.239)
  • Patent number: 8963261
    Abstract: Provided are a capacitive transducer, and methods of manufacturing and operating the same. The capacitive transducer includes: a monolithic substrate comprising a first doping region, a second doping region that is opposite in conductivity to the first doping region, and a vibrating portion; and an empty space that is disposed between the first doping region and the vibrating portion. The vibrating portion includes a plurality of through-holes, and a material film for sealing the plurality of through-holes is disposed on the vibrating portion.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Che-heung Kim
  • Patent number: 8669620
    Abstract: A semiconductor device is provided, which includes a circuit including a first MOS transistor having a gate connected to a first signal line, a second MOS transistor having a gate connected to a second signal line, and the circuit outputting an output signal according to a difference in potential between the first signal line and the second signal line, wherein channel regions of the first and second MOS transistors include no maximum impurity concentration at an area, which is shallower than a depth indicating a maximum concentration of one conduction type impurity that forms source and drain regions of the MOS transistors.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: March 11, 2014
    Inventor: Mika Nishisaka
  • Patent number: 8637927
    Abstract: Semiconductor devices and methods of forming the same may be provided. The semiconductor devices may include a trench in a substrate. The semiconductor devices may also include a bulk electrode within opposing sidewalls of the trench. The semiconductor devices may further include a liner electrode between the bulk electrode and the opposing sidewalls of the trench. The liner electrode may include a sidewall portion between a sidewall of the bulk electrode and one of the opposing sidewalls of the trench.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: January 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heedon Hwang, Ji-Young Min, Jongchul Park, Insang Jeon, Woogwan Shim
  • Patent number: 7851822
    Abstract: A charge-coupled device includes a photosensitive region for collecting charge in response to incident light; a first and third gate electrode made of a transmissive material spanning at least a portion of the photosensitive region; and a second gate electrode made of a transmissive material that is less transmissive than the first and third gates and spans at least a portion of the photosensitive region; wherein the first, second and third gates are arranged symmetrically within an area that spans the photosensitive region.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: December 14, 2010
    Assignee: Eastman Kodak Company
    Inventor: Eric J. Meisenzahl
  • Patent number: 7715248
    Abstract: The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: May 11, 2010
    Assignee: International Business Machines Corporation
    Inventors: John M. Aitken, Fen Chen, Kai D. Feng
  • Patent number: 7605411
    Abstract: An HCCD includes a channel 21 that transfers electric charges in an X direction, a channel 25 that transfers the electric charges in a Z1 direction, a channel 23 that transfers the electric charges in a Z2 direction, and a channel 22 that connects the channels 23, 25 to the channel 21. The following relation is satisfied in impurity concentration of the channels: channel 21 channel 22 channel 23, 25. A fixed DC voltage is applied to branch electrodes 12a, 12b above the channel 22. The channel 22 has protrusion portions 19 that protrude inward from an outer circumference, which connects T1 and T2, and an outer circumference, which connects T3 and T4. The protrusion portions 19 causes charges below the transfer electrode 11b to move near the center of the channel 22 in a Y direction. Thereby, the travel distance of the charges in the channel 22 is reduced.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: October 20, 2009
    Assignee: Fujifilm Corporation
    Inventors: Hirokazu Shiraki, Makoto Kobayashi, Katsumi Ikeda
  • Patent number: 7381981
    Abstract: The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: June 3, 2008
    Assignee: International Business Machines Corporation
    Inventors: John M. Aitken, Fen Chen, Kai D. Feng