Charge Transfer Device (epo) Patents (Class 257/E29.227)
  • Patent number: 8574941
    Abstract: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator. The method includes the steps of: forming an oxygen-feed film capable of feeding oxygen on the detection plane of the charge generator; forming a metal film that covers the oxygen-feed film on the detection plane of the charge generator; and performing heat treatment for the metal film in an inactive atmosphere to thereby form an oxide of the metal film between the metal film and the oxygen-feed film on the detection plane of the charge generator, the oxide being to serve as the negative-charge accumulated layer.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: November 5, 2013
    Assignee: Sony Corporation
    Inventors: Susumu Hiyama, Tomoyuki Hirano
  • Patent number: 8293561
    Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: October 23, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Mahito Shinohara
  • Patent number: 8247847
    Abstract: A solid-state imaging device including a first transfer electrode portion and a second transfer electrode portion having a pattern area ratio higher than that of the first transfer electrode portion. The first transfer electrode portion includes a plurality of first transfer electrodes having a single-layer structure of metal material. The second transfer electrode portion includes a plurality of second transfer electrodes having a single-layer structure of polycrystalline silicon or amorphous silicon.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: August 21, 2012
    Assignee: Sony Corporation
    Inventors: Kaori Takimoto, Masayuki Okada, Takeshi Takeda
  • Publication number: 20120205723
    Abstract: A range image sensor capable of improving its aperture ratio and yielding a range image with a favorable S/N ratio is provided. A range image sensor RS has an imaging region constituted by a plurality of one-dimensionally arranged units on a semiconductor substrate 1 and yields a range image according to a charge amount issued from the units.
    Type: Application
    Filed: November 18, 2010
    Publication date: August 16, 2012
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Takashi Suzuki, Mitsuhito Mase
  • Patent number: 8173476
    Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: May 8, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Mahito Shinohara
  • Publication number: 20120001234
    Abstract: An image sensor includes first impurity regions formed in a substrate, second impurity regions formed in the first impurity regions, wherein the second impurity regions has a junction with the first impurity regions, recess patterns formed over the first impurity regions in contact with the second impurity regions, and transfer gates filling the recess patterns.
    Type: Application
    Filed: November 2, 2010
    Publication date: January 5, 2012
    Inventors: Sung-Won LIM, Jin-Woong Kim, Hyo-Seok Lee
  • Publication number: 20100140668
    Abstract: An image sensor includes an imaging area that includes a plurality of pixels, with each pixel including a photosensitive charge storage region formed in a substrate. A passivation implantation region contiguously surrounds the side wall and bottom surfaces of each trench in the one or more trench isolation regions. A portion of each passivation implantation region is laterally adjacent to a respective charge storage region and resides only in an isolation gap disposed between the respective charge storage region and a respective trench isolation region and does not substantially reside under the charge storage region. Each passivation implantation region is formed by implanting one or more dopants at a low energy into the side wall and bottom surfaces of each trench after annealing the image sensor and prior to filling the trenches with an insulating material.
    Type: Application
    Filed: November 11, 2009
    Publication date: June 10, 2010
    Inventor: Eric G. Stevens
  • Patent number: 7683388
    Abstract: An image pickup device is characterized by including a plurality of pixels having a plurality of photoelectric conversion units, convex interlayer lenses with respect to incident light, the convex interlayer lenses being arranged correspondingly to a photoelectric conversion devices and color filters being arranged for each color on the interlayer lenses correspondingly to the photoelectric conversion devices, wherein the color filter is formed to match the shape of the interlayer lens and the top surface thereof is substantially flat. This configuration reduces the amount of light which is incident on the gaps between adjacent microlenses and passes through the color filters at the boundary of pixels, decreasing color mixture of camera image.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: March 23, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shigeki Mori
  • Publication number: 20090321800
    Abstract: A semiconductor device includes: a plurality of pixel units disposed in a matrix shape, each of the plurality of pixel units including: a first photoelectric conversion element for converting incident light of a first color into signal charges; a second photoelectric conversion element for converting incident light of a second color into signal charges; a third photoelectric conversion element for converting incident light of a third color into signal charges; and a detector circuit shared by the first to third photoelectric conversion elements for detecting the signal charges converted by each of the first to third photoelectric conversion elements, wherein the plurality of pixel units are pixel units adjacently disposing a row (column) juxtaposing the first photoelectric conversion element and detector circuit and a row (column) juxtaposing the second and third photoelectric conversion elements.
    Type: Application
    Filed: March 6, 2009
    Publication date: December 31, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Narumi OHKAWA
  • Patent number: 7605411
    Abstract: An HCCD includes a channel 21 that transfers electric charges in an X direction, a channel 25 that transfers the electric charges in a Z1 direction, a channel 23 that transfers the electric charges in a Z2 direction, and a channel 22 that connects the channels 23, 25 to the channel 21. The following relation is satisfied in impurity concentration of the channels: channel 21 channel 22 channel 23, 25. A fixed DC voltage is applied to branch electrodes 12a, 12b above the channel 22. The channel 22 has protrusion portions 19 that protrude inward from an outer circumference, which connects T1 and T2, and an outer circumference, which connects T3 and T4. The protrusion portions 19 causes charges below the transfer electrode 11b to move near the center of the channel 22 in a Y direction. Thereby, the travel distance of the charges in the channel 22 is reduced.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: October 20, 2009
    Assignee: Fujifilm Corporation
    Inventors: Hirokazu Shiraki, Makoto Kobayashi, Katsumi Ikeda
  • Patent number: 7601992
    Abstract: A light detecting element 1 including an element formation layer 22 which contains a well region 31. A surface electrode 25 is formed on the layer 22 through an insulating layer 24. The region 31 contains an electron holding region 32. The region 32 contains a hole holding region 33. The layer 24 contains a control electrode 26 facing the region 33 through the layer 24. Electrons and holes are generated at the layer 22. There are two selected states. In one state, by controlling each electric potential applied to the electrodes 25, 26, electrons are gathered at the region 32, while holes are held at the region 33. In another state, recombination is stimulated between the electrons and the holes. After the recombination, the remaining electrons are picked out as received light output.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: October 13, 2009
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Yusuke Hashimoto, Yuji Takada, Fumikazu Kurihara, Fumi Tsunesada
  • Patent number: 7586133
    Abstract: A solid state imaging apparatus comprises a semiconductor substrate, photoelectric conversion elements, a vertical electric charge transferring device, a horizontal electric charge transferring device that temporarily stores the signal electric charges transferred from the vertical electric charge transferring device and transfers the signal electric charges to a horizontal direction in a sequential order, wherein the horizontal electric charge transferring device comprises at least two lines of horizontal shift registers and an electrode structure with which one-- shift register can transfer the signal electric charges to a direction that is 180 degrees different from another shift register and also can transfer the signal electric charges to a same direction as the another shift register continuously with the other shift register by changing driving of at least one of the shift registers, and output detecting devices.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: September 8, 2009
    Assignee: Fujifilm Corporation
    Inventor: Katsumi Ikeda
  • Patent number: 7557390
    Abstract: A solid image capturing element comprising a plurality of vertical shift registers arranged to each correspond to a column of a plurality of light receiving pixels in a matrix arrangement, a horizontal shift register provided on an output side of the plurality of vertical shift registers, and an output section provided on an output side of the horizontal shift register. In this solid image capturing element, a reverse conductive semiconductor region is formed over one major surface of one conductive semiconductor substrate, the plurality of light receiving pixels, the plurality of vertical shift registers, the horizontal shift register, and the output section are formed in the semiconductor region, and a portion of the semiconductor region where the output section is formed has a higher dopant concentration than the portion of the semiconductor region where the horizontal shift register is formed.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: July 7, 2009
    Assignee: Sanyo Electric co., Ltd.
    Inventors: Yoshihiro Okada, Yuzo Otsuru
  • Publication number: 20080290390
    Abstract: A semiconductor device and a method for manufacturing the same are disclosed. The semiconductor device suitable for preventing a threshold voltage of a recess gate from decreasing due to a voltage of an adjacent storage node comprises a semiconductor substrate having an active region which includes a gate area and a storage node contact area and is recess in the gate area; a device isolation structure formed in the semiconductor substrate to define the active region and having a shield layer therein; a recess gate formed in the gate area of the semiconductor substrate; and a storage node formed to be connected with the storage node contact area of the active region.
    Type: Application
    Filed: September 10, 2007
    Publication date: November 27, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventor: Seon Yong Cha
  • Publication number: 20080237651
    Abstract: A charge transfer device 1 has an P-type region, an N-type well provided to the surficial portion of the P-type region, and transfer electrodes having P-type conductivity, provided over the N-type substrate while placing an insulating film in between.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 2, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Eiji MATSUYAMA
  • Publication number: 20080237650
    Abstract: A semiconductor device, including: a semiconductor material and an electrode structure electrically coupled to the semiconductor material. The electrode structure includes: a first portion formed of a first conductive material and a second portion formed of a second conductive material. Both the first portion and the second portion of the electrode structure are in direct contact with the semiconductor material. The first conductive material has a first work function and the second conductive material has a second work function that is different from the first work function, so that the second portion of the electrode structure forms a junction with the first portion. The first portion and the second portion of the electrode structure are arranged such that the fringe field from the edge of this junction between the first portion and the second portion extends into the semiconductor material.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicants: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., CORNELL RESEARCH FOUNDATION, INC.
    Inventors: George G. Malliaras, Kiyotaka Mori, Hon Hang Fong
  • Publication number: 20080054310
    Abstract: The capacitorless DRAM memory cell is constituted by a partially-depleted MOSFET device successively comprising a base substrate, a buried insulator, a floating substrate from semiconducting material including a channel, the gate insulator and a gate. The gate comprises a first zone doped by a first type of dopant and a second zone doped by a second type of dopant. The channel is doped by the second type of dopant. The gate insulator comprises a first part corresponding to the first doped zone and a second part corresponding to the second doped zone of the gate. The first part of the gate insulator has a higher tunnel resistance than the second part. Data storage is realized by means of charge carrier transportation from the gate to the floating substrate through the lower tunnel resistance part of the gate insulator.
    Type: Application
    Filed: August 16, 2007
    Publication date: March 6, 2008
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventor: Georges Guegan
  • Publication number: 20070228442
    Abstract: In a thin film capacitor, reducing a leak current by suppressing concentration of an electric filed. Forming a zirconium oxide layer (26A) on a lower electrode (22) made of a conductive material. Forming a buffer layer (28) made of an amorphous material on the first zirconium oxide layer (26A).
    Type: Application
    Filed: September 9, 2005
    Publication date: October 4, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Akinobu Kakimoto
  • Patent number: 7157754
    Abstract: A high-performance solid-state imaging device is provided. The solid-state imaging device includes: a plurality of pixel cells; and a driving unit. Each of the plurality of pixel cells includes: a photodiode that converts incident light into a signal charge and stores the signal charge; a MOS transistor that is provided for reading out the signal charge stored in the photodiode; an element isolation portion that is formed of a STI that is a grooved portion of the semiconductor substrate so that the photodiode and the MOS transistor are isolated from each other; and a deep-portion isolation implantation layer that is formed under the element isolation portion for preventing a flow of a charge from the photodiode to the MOS transistor.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: January 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Nagasaki, Syouji Tanaka, Yoshiyuki Matsunaga