Abstract: A method for testing network devices for networks with a large traffic load utilizes one or more traffic load amplifiers to amplify the traffic load. The load amplifiers connected to the device may receive packets of an initial traffic load, multiply or copy the received packet, alter the destination address information in the header of the copied packets to generate packets with different destination addresses, and transmit the altered packets back to the device for further routing. The altered or copied packets may then be routed via the device back to the load amplifier for further amplification. Through this amplification process, a small initial load of packets may be amplified over and over by the load amplifiers until a target traffic load is achieved at the device to test the device performance at a large traffic load.

Abstract: Techniques and structures to facilitate automatic adjustment of a database connection pool, including calculating a first value indicating a number of connections of to be provided by a first of a plurality of application servers, determining whether the first value is equal to a second value previously calculated to indicate the number of connections to be provided by the first application server and adjusting the database connection pool by providing the number of connections to access the database as indicated by the first value upon a determination that the first value is not equal to the second value.

Abstract: To provide a semiconductor device in which a rectifying element capable of reducing a leak current in reverse bias when a high voltage is applied and reducing a forward voltage drop Vf and a transistor element are integrally formed on a single substrate. A semiconductor device has a transistor element and a rectifying element on a single substrate. The transistor element has an active layer formed on the substrate and three electrodes (source electrode, drain electrode, and gate electrode) disposed on the active layer. The rectifying element has an anode electrode disposed on the active layer, a cathode electrode which is the drain electrode, and a first auxiliary electrode between the anode electrode and cathode electrode.

Abstract: A method for fabricating a compound semiconductor epitaxial structure includes the following steps. Firstly, a first compound epitaxial layer is formed on a substrate. Then, a continuous epitaxial deposition process is performed to form a second compound epitaxial layer on the first compound epitaxial layer, so that the second compound epitaxial layer has a linearly-decreased concentration gradient of metal. Afterwards, a semiconductor material layer is formed on the second compound epitaxial layer.

Abstract: The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.

Abstract: An image pickup device is characterized by including a plurality of pixels having a plurality of photoelectric conversion units, convex interlayer lenses with respect to incident light, the convex interlayer lenses being arranged correspondingly to a photoelectric conversion devices and color filters being arranged for each color on the interlayer lenses correspondingly to the photoelectric conversion devices, wherein the color filter is formed to match the shape of the interlayer lens and the top surface thereof is substantially flat. This configuration reduces the amount of light which is incident on the gaps between adjacent microlenses and passes through the color filters at the boundary of pixels, decreasing color mixture of camera image.

Abstract: An HCCD includes a channel 21 that transfers electric charges in an X direction, a channel 25 that transfers the electric charges in a Z1 direction, a channel 23 that transfers the electric charges in a Z2 direction, and a channel 22 that connects the channels 23, 25 to the channel 21. The following relation is satisfied in impurity concentration of the channels: channel 21 channel 22 channel 23, 25. A fixed DC voltage is applied to branch electrodes 12a, 12b above the channel 22. The channel 22 has protrusion portions 19 that protrude inward from an outer circumference, which connects T1 and T2, and an outer circumference, which connects T3 and T4. The protrusion portions 19 causes charges below the transfer electrode 11b to move near the center of the channel 22 in a Y direction. Thereby, the travel distance of the charges in the channel 22 is reduced.

Abstract: A light detecting element 1 including an element formation layer 22 which contains a well region 31. A surface electrode 25 is formed on the layer 22 through an insulating layer 24. The region 31 contains an electron holding region 32. The region 32 contains a hole holding region 33. The layer 24 contains a control electrode 26 facing the region 33 through the layer 24. Electrons and holes are generated at the layer 22. There are two selected states. In one state, by controlling each electric potential applied to the electrodes 25, 26, electrons are gathered at the region 32, while holes are held at the region 33. In another state, recombination is stimulated between the electrons and the holes. After the recombination, the remaining electrons are picked out as received light output.

Abstract: The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.