Using Group Iii-v Semiconductor Material (epo) Patents (Class 257/E29.249)
  • Patent number: 7352008
    Abstract: The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and channel or the region around the boundary interface between the channel and capping layer is doped in a manner such that the piezocharges occurring at the respective boundary interface are compensated.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: April 1, 2008
    Assignee: Microgan GmbH
    Inventors: Erhard Kohn, Ingo Daumiller, Markus Kamp, Matthias Seyboth
  • Patent number: 7253454
    Abstract: A HEMT device including a GaN channel structure including a very thin (Al,In,Ga)N subchannel layer that is disposed between a first GaN channel layer and a second GaN channel layer, to effect band bending induced from the piezoelectric and spontaneous charges associated with the (Al,In,Ga)N subchannel layer. This GaN channel/(Al,In,Ga)N subchannel arrangement effectively disperses the 2DEG throughout the channel of the device, thereby rendering the device more linear in character (relative to a corresponding device lacking the subchannel (Al,In,Ga)N sub-layer), without substantial loss of electron mobility.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: August 7, 2007
    Assignee: Cree, Inc.
    Inventor: Adam William Saxler
  • Patent number: 7247893
    Abstract: A method for fabricating a non-planar heterostructure field effect transistor using group III-nitride materials with consistent repeatable results is disclosed. The method provides a substrate on which at least one layer of semiconductor material is deposited. An AlN layer is deposited on the at least one layer of semiconductor material. A portion of the AlN layer is removed using a solvent to create a non-planar region with consistent and repeatable results. The at least one layer beneath the AlN layer is insoluble in the solvent and therefore acts as an etch stop, preventing any damage to the at least one layer beneath the AlN layer. Furthermore, should the AlN layer incur any surface damage as a result of the reactive ion etching, the damage will be removed when exposed to the solvent to create the non-planar region.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: July 24, 2007
    Assignee: HRL Laboratories, LLC
    Inventors: Jeong Sun Moon, Paul Hashimoto, Wah S. Wong, David E. Grider
  • Patent number: 7244973
    Abstract: A method for making a filed-effect semiconductor device includes the steps of forming a gate electrode on a semiconductor layer composed of a gallium nitride-based compound semiconductor represented by the formula AlxInyGa1?x?yN, wherein x+y=1, 0?x?1, and 0?y?1; and forming a source electrode and a drain electrode by self-alignment using the gate electrode as a mask. A field-effect semiconductor device fabricated by the method is also disclosed.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: July 17, 2007
    Assignee: Sony Corporation
    Inventors: Satoshi Taniguchi, Toshikazu Suzuki, Hideki Ono, Jun Araseki
  • Patent number: 7199408
    Abstract: A semiconductor device includes an underlying layer made of a group-III nitride containing at least Al and formed on a substrate, and a group of stacked semiconductor layers including a first semiconductor layer made of a group-III nitride, preferably GaN, a second semiconductor layer made of AlN and a third semiconductor layer made of a group-III nitride containing at least Al, preferably AlxGa1-xN where x?0.2. The semiconductor device suppresses the reduction in electron mobility resulting from lattice defects and crystal lattice randomness. This achieves a HEMT device having a sheet carrier density of not less than 1×1013/cm2 and an electron mobility of not less than 20000 cm2/V·s at a temperature of 15 K.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: April 3, 2007
    Assignee: NGK Insulators, Ltd.
    Inventor: Makoto Miyoshi
  • Publication number: 20060231860
    Abstract: Novel GaN/AlGaN metal-semiconductor field-effect transistor (MESFET) structures grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge is created by grading the channel region linearly from GaN to Al0.3Ga0.7N over a distance, e.g., 1000 ?. A polarization-doped field effect transistor (PolFET) was fabricated and tested under DC and RF conditions. A current density of 850 mA/mm and transconductance of 93 mS/mm was observed under DC conditions. Small-signal characterization of 0.7 ?m gate length devices had a cutoff frequency, ƒ?=19 GHz, and a maximum oscillation of ƒmax=46 GHz. The PolFETs perform better than comparable MESFETs with impurity-doped channels, and are suitable for high microwave power applications. An important advantage of these devices over AlGaN/GaN HEMTs is that the transconductance vs. gate voltage profile can be tailored by compositional grading for better large-signal linearity.
    Type: Application
    Filed: September 29, 2005
    Publication date: October 19, 2006
    Applicant: The Regents of the University of California Office of Technology Transfer
    Inventors: Umesh Mishra, Huili Xing, Debdeep Jena, Siddharth Rajan
  • Publication number: 20060175633
    Abstract: A III-nitride power device that includes a Schottky electrode integrated with a power switch. The combination is used in power supply circuits such as a boost converter circuit.
    Type: Application
    Filed: February 2, 2006
    Publication date: August 10, 2006
    Inventor: Daniel Kinzer