Amorphous Silicon Transistor (epo) Patents (Class 257/E29.289)
  • Publication number: 20110309364
    Abstract: It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulating film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film.
    Type: Application
    Filed: August 25, 2011
    Publication date: December 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Satoshi MURAKAMI, Masahiko HAYAKAWA, Kiyoshi KATO, Mitsuaki OSAME
  • Publication number: 20110303919
    Abstract: To provide a display device including a thin film transistor in which high electric characteristics and reduction in off-current can be achieved. The display device having a thin film transistor includes a substrate, a gate electrode provided over the substrate, a gate insulating film provided over the gate electrode, a microcrystalline semiconductor film provided over the gate electrode with the gate insulating film interposed therebetween, a channel protection layer which is provided over and in contact with the microcrystalline semiconductor film, an amorphous semiconductor film provided over the gate insulating film and on a side surface of the microcrystalline semiconductor film and the channel protection layer, an impurity semiconductor layer provided over the amorphous semiconductor film, and a source electrode and a drain electrode provided over and in contact with the impurity semiconductor layer.
    Type: Application
    Filed: August 23, 2011
    Publication date: December 15, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi KOBAYASHI, Atsushi MIYAGUCHI, Yoshitaka MORIYA, Yoshiyuki KUROKAWA, Daisuke KAWAE
  • Publication number: 20110297940
    Abstract: A semiconductor element of the electric circuit includes a semiconductor layer over a gate electrode. The semiconductor layer of the semiconductor element is formed of a layer including polycrystalline silicon which is obtained by crystallizing amorphous silicon by heat treatment or laser irradiation, over a substrate. The obtained layer including polycrystalline silicon is also used for a structure layer such as a movable electrode of a structure body. Therefore, the structure body and the electric circuit for controlling the structure body can be formed over one substrate. As a result, a micromachine can be miniaturized. Further, assembly and packaging are unnecessary, so that manufacturing cost can be reduced.
    Type: Application
    Filed: August 22, 2011
    Publication date: December 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mayumi Yamaguchi, Konami Izumi
  • Publication number: 20110272691
    Abstract: The invention relates to a printable precursor comprising an organometallic aluminium, gallium, neodymium, ruthenium, magnesium, hafnium, zirconium, indium and/or tin complex or a mixture thereof which contains at least one ligand from the class of the oximates, for electronic components, and to a preparation process. The invention furthermore relates to corresponding printed electronic components, preferably field-effect transistors.
    Type: Application
    Filed: December 10, 2009
    Publication date: November 10, 2011
    Inventors: Ralf Kuegler, Andreas Klyszcz, Sabine Renker, Joerg J. Schneider, Rudolf Hoffmann
  • Patent number: 8053817
    Abstract: A vertical transistor and a method for forming the same. The vertical transistor includes a semiconductor substrate having pillar type active patterns formed on a surface thereof; first junction regions formed in the surface of the semiconductor substrate on both sides of the active patterns; screening layers formed on sidewalls of the first junction regions; second junction regions formed on upper surfaces of the active patterns; and gates formed on sidewalls of the active patterns including the second junction regions to overlap with at least portions of the first junction regions.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: November 8, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seon Yong Cha
  • Publication number: 20110260165
    Abstract: An object is to provide a semiconductor device which is not easily broken even if stressed externally and a method for manufacturing such a semiconductor device. A semiconductor device includes an element layer including a transistor in which a channel is formed in a semiconductor layer and insulating layers which are formed as an upper layer and a lower layer of the transistor respectively, and a plurality of projecting members provided at intervals of from 2 to 200 ?m on a surface of the element layer. The longitudinal elastic modulus of the material for forming the plurality of projecting members is lower than that of the materials of the insulating layers.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 27, 2011
    Inventor: Hideto Ohnuma
  • Publication number: 20110255021
    Abstract: Disclosed is an array substrate (12) for liquid crystal panel, in which a thin film transistor (30) has a multi-layered structure including a gate electrode (32), an insulating layer (34), a semiconductor layer (35), a source electrode (36), and a drain electrode (37), which are disposed over a substrate main body (12a). Respective portions of the gate electrode (32) located under the source electrode (36) and the drain electrode (37) are formed as recessed portions (33a and 33b), which concave in from the surrounding portion, and the source electrode (36) and the drain electrode (37) are respectively formed above the recessed portions (33a and 33b).
    Type: Application
    Filed: December 25, 2009
    Publication date: October 20, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Ryoh Ohue
  • Publication number: 20110248274
    Abstract: A method for manufacturing a thin film transistor array panel is disclosed. A gate wiring pattern is formed on an insulating substrate. A gate insulating layer is formed on the gate wiring pattern. A semiconductor pattern is formed on the gate insulating layer. A transparent conductive layer is formed on the gate insulating layer. The transparent conductive layer is patterned to form a pixel electrode. An opening is formed at a circumference of the pixel electrode. The opening minimizes misalignment during the manufacturing process and prevents shorts between a data line and the pixel electrode.
    Type: Application
    Filed: June 16, 2011
    Publication date: October 13, 2011
    Inventors: Dong-Gyu KIM, Jun-Ho Song, Jong-Woong Chang, Jae-Ho Choi, Byoung-Sun Na, Young-Bae Park, Sung-Wook Huh
  • Publication number: 20110241007
    Abstract: The present invention provides a light-emitting element having a structure in which the drive voltage is comparatively low and a light-emitting element in which the increase in the drive voltage over time is small. Further, the present invention provides a display device in which the drive voltage and the increase in the drive voltage over time are small and which can resist long-term use. A layer in contact with an electrode in a light-emitting element is a layer containing a P-type semiconductor or a hole-generating layer such as an organic compound layer containing a material having electron-accepting properties. The light-emitting layer is sandwiched between the hole-generating layers, and an electron-generating layer is sandwiched between the light-emitting layer and the hole-generating layer on a cathode side.
    Type: Application
    Filed: June 16, 2011
    Publication date: October 6, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Daisuke KUMAKI, Satoshi SEO
  • Publication number: 20110227085
    Abstract: The present invention is a substrate for use in a display panel. According to the substrate, lines (102, 106, 107, and 113) provided in a display region on the substrate are made up of multiple layers whose uppermost layers (102c, 106c, 107c, and 113c) are each made from (i) an oxide of first metal selected from the group consisting of copper, titanium, and molybdenum or (ii) a nitride of copper. This can prevent external light from being reflected and thereby improve a contrast in a bright room.
    Type: Application
    Filed: November 5, 2009
    Publication date: September 22, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Wataru Nakamura, Kenichi Kitoh, Tetsunori Tanaka, Takeshi Hara, Yuya Nakano
  • Publication number: 20110220895
    Abstract: The present invention makes it possible to prepare a thin film transistor fitted with a resin substrate by lowering a process temperature during formation of an oxide semiconductor, and further makes it possible to improve manufacturing efficiency and reduce variations in thin film transistor performance. Disclosed is a thin film transistor of the present invention possessing a semiconductor containing metal oxide, the semiconductor comprising a coating film made from a solution or a dispersion of a precursor, wherein the metal oxide contains indium as a first metal element, gallium or aluminum as a second metal element, and zinc or tin as a third metal element, and a ratio of the third metal element to total metal elements in the metal oxide is 25 at % or less, or 0 at %.
    Type: Application
    Filed: November 10, 2009
    Publication date: September 15, 2011
    Applicant: KONICA MINOLTA HOLDINGS, INC.
    Inventors: Katsura Hirai, Makoto Honda, Masaki Miyoshi
  • Publication number: 20110220891
    Abstract: A semiconductor device includes a wiring embedded in an insulating layer, an oxide semiconductor layer over the insulating layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate electrode provided to overlap with the oxide semiconductor layer, and a gate insulating layer provided between the oxide semiconductor layer and the gate electrode. The insulating layer is formed so that part of a top surface of the wiring is exposed. The part of the top surface of the wiring is positioned higher than part of a surface of the insulating layer. The wiring in a region exposed from the insulating layer is electrically connected to the source electrode or the drain electrode. The root-mean-square roughness of a region which is part of the surface of the insulating layer and in contact with the oxide semiconductor layer is 1 nm or less.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 15, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Teruyuki FUJII, Ryota IMAHAYASHI
  • Publication number: 20110215324
    Abstract: A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.
    Type: Application
    Filed: May 14, 2010
    Publication date: September 8, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Guang-Ren Shen, Pei-Ming Chen, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20110210336
    Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
    Type: Application
    Filed: May 10, 2011
    Publication date: September 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro Kusuyama
  • Publication number: 20110210333
    Abstract: To realize a semiconductor device including a capacitor element capable of obtaining a sufficient capacitor without reducing an opening ratio, in which a pixel electrode is flattened in order to control a defect in orientation of liquid crystal. A semiconductor device of the present invention includes a light-shielding film formed on the thin film transistor, a capacitor insulating film formed on the light-shielding film, a conductive layer formed on the capacitor insulating film, and a pixel electrode that is formed so as to be electrically connected to the conductive layer, in which a storage capacitor element comprises the light-shielding film, the capacitor insulating film, and the conductive layer, whereby an area of a region serving as the capacitor element can be increased.
    Type: Application
    Filed: May 9, 2011
    Publication date: September 1, 2011
    Inventor: Tatsuya Arao
  • Publication number: 20110198599
    Abstract: A source-drain voltage of one of two transistors connected in series becomes quite small in a set operation (write signal), thus the set operation is performed to the other transistor. In an output operation, two transistors operate as a multi-gate transistor, therefore, a current value can be small in the output operation. In other words, a current can be large in the set operation. Therefore, the set operation can be performed rapidly without being easily influenced by an intersection capacitance and a wiring resistance which are parasitic on a wiring and the like. Further, an influence of variations between adjacent ones can be small as one same transistor is used in the set operation and the output operation.
    Type: Application
    Filed: April 25, 2011
    Publication date: August 18, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hajime Kimura
  • Publication number: 20110186844
    Abstract: A display substrate includes a substrate, a pixel electrode and a dummy pattern part. The substrate includes a display area and a peripheral area surrounding the display area. The pixel electrode is disposed in the display area and electrically connected to gate and data lines. The dummy pattern part is disposed in the peripheral area and includes a plurality of first dummy electrodes connected to each other in a network form through connection electrodes and a plurality of second dummy electrodes respectively disposed over the first dummy electrodes.
    Type: Application
    Filed: June 23, 2010
    Publication date: August 4, 2011
    Inventor: BON-YONG KOO
  • Publication number: 20110180789
    Abstract: Thin-film transistors are made using an organosilicate glass (OSG) as an insulator material. The organosilicate glasses may be SiO2-silicone hybrid materials deposited by plasma-enhanced chemical vapor deposition from siloxanes and oxygen. These hybrid materials may be employed as the gate dielectric, as a subbing layer, and/or as a back channel passivating layer. The transistors may be made in any conventional TFT geometry.
    Type: Application
    Filed: July 30, 2009
    Publication date: July 28, 2011
    Inventors: Lin Han, Prashant Mandlik, Sigurd Wagner
  • Publication number: 20110180797
    Abstract: It is an object of the present invention to provide a semiconductor device capable of preventing deterioration due to penetration of moisture or oxygen, for example, a light-emitting apparatus having an organic light-emitting device that is formed over a plastic substrate, and a liquid crystal display apparatus using a plastic substrate. According to the present invention, devices formed on a glass substrate or a quartz substrate (a TFT, a light-emitting device having an organic compound, a liquid crystal device, a memory device, a thin-film diode, a pin-junction silicon photoelectric converter, a silicon resistance element, or the like) are separated from the substrate, and transferred to a plastic substrate having high thermal conductivity.
    Type: Application
    Filed: January 21, 2011
    Publication date: July 28, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
  • Publication number: 20110163315
    Abstract: The present invention provides an active matrix type display device having a high aperture ratio and a required auxiliary capacitor. A source line and a gate line are overlapped with part of a pixel electrode. This overlapped region functions to be a black matrix. Further, an electrode pattern made of the same material as the pixel electrode is disposed to form the auxiliary capacitor by utilizing the pixel electrode. It allows a required value of auxiliary capacitor to be obtained without dropping the aperture ratio. Also, it allows the electrode pattern to function as a electrically shielding film for suppressing the cross-talk between the source and gate lines and the pixel electrode.
    Type: Application
    Filed: December 30, 2010
    Publication date: July 7, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hongyong Zhang, Satoshi Teramoto
  • Publication number: 20110156044
    Abstract: There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
    Type: Application
    Filed: February 14, 2011
    Publication date: June 30, 2011
    Applicant: SanDisk 3D LLC
    Inventors: Thomas H. Lee, Vivek Subramanian, James M. Cleeves, Andrew J. Walker, Christopher J. Petti, Igor G. Kouznetzov, Mark G. Johnson, Paul Michael Farmwald, Brad Herner
  • Publication number: 20110147744
    Abstract: An object is to increase the on-state current of a thin film transistor. A solution is to provide a projection in a back-channel portion of the thin film transistor. The projection is provided so as to be off a tangent in the back-channel portion between a source or a drain and a channel formation region. With the projection, a portion where electric charge is trapped and a path of the on-state current can be apart from each other, so that the on-state current can be increased. The shape of a side surface of the back-channel portion may be curved, or may be represented as straight lines in a cross section. Further, a method for forming such a shape by performing one etching step is provided.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 23, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuhiro Jinbo, Hideomi Suzawa, Hiromichi Godo, Shinya Sasagawa
  • Publication number: 20110121298
    Abstract: A method includes the steps of preparing a multilayer film 80 formed by sequentially stacking a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40; forming a source electrode 42s and a drain electrode 42d comprised of the second metal layer 40 by etching the second metal layer 40; pressure-bonding a resin layer 50 onto a surface of the multilayer film 80 provided with the source electrode 42s and the drain electrode 42d to burry the source electrode 42s and the drain electrode 42d in the resin layer 50; and forming a gate electrode 10g comprised of the first metal layer 10 by etching the first metal layer 10. The inorganic insulating layer 20g functions as a gate insulating film. The semiconductor layer 30 functions as a channel.
    Type: Application
    Filed: February 5, 2010
    Publication date: May 26, 2011
    Inventors: Takashi Ichiryu, Seiichi Nakatani, Koichi Hirano
  • Publication number: 20110114957
    Abstract: A thin film transistor (TFT) and an organic light emitting display apparatus are provided. The TFT includes: a substrate; a gate electrode on the substrate; an active layer insulated from the gate electrode; source/drain electrodes electrically connected to the active layer; a first insulating film on the source/drain electrodes; a light blocking layer on the first insulating film; and a second insulating film on the light blocking layer.
    Type: Application
    Filed: November 10, 2010
    Publication date: May 19, 2011
    Inventors: Eun-Hyun Kim, Jong-Han Jeong, Yeon-Gon Mo
  • Publication number: 20110073860
    Abstract: A thin film transistor comprising an insulating film, a gate electrode embedded in a superficial portion of the insulating film, a gate insulating film on the gate electrode and the insulating film, a semiconductor film on the gate insulating film, a channel protection film on a portion of the semiconductor film with end surfaces which have a forward tapered slope, a first electrode on the semiconductor film which mounts onto one tapered side of the channel protection film, and a second electrode on the semiconductor film which mounts onto the other tapered side of the channel protection film, where an edge of the gate electrode closest to the first electrode is offset towards the second electrode from the point where the first electrode abuts the semiconductor film.
    Type: Application
    Filed: September 21, 2010
    Publication date: March 31, 2011
    Applicant: SONY CORPORATION
    Inventors: Michihiro Kanno, Takahiro Kawamura
  • Patent number: 7915103
    Abstract: The method for fabricating a flat panel display includes performing a first crystallization process to re-crystallize an amorphous silicon layer on a glass substrate to make the amorphous silicon layer become a polysilicon layer, forming a patterned absorbing layer to cover an active area pattern of a driving TFT and to expose portions of the polysilicon layer, performing a second crystallization process to re-crystallization the exposed portions of the polysilicon layer so that the exposed portions of the polysilicon layer has a different grain structure from the grain structure of the driving TFT, removing the patterned absorbing layer, and removing portions of the polysilicon layer to form an active area of the driving TFT and an active area of a switching TFT area in the exposed portions of the polysilicon layer of each sub-pixel.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: March 29, 2011
    Assignee: Chimei Innolux Corporation
    Inventors: Chun-Yen Liu, Chang-Ho Tseng
  • Patent number: 7915689
    Abstract: A thin film transistor, a display device, and a manufacturing method thereof. The thin film transistor includes a control electrode, a semiconductor overlapping the control electrode, and an input electrode and an output electrode disposed on or under the semiconductor and opposite to each other. The semiconductor includes a first portion disposed between the input electrode and the output electrode and having a first crystallinity, and a second portion connected with the first portion, which overlaps the input electrode or the output electrode, and having a second crystallinity. The first crystallinity is higher than the second crystallinity.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: March 29, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Haeng Cho, Ki-Hun Jeong, Jun-Ho Song, Joo-Han Kim, Hyung-Jun Kim, Seung-Hwan Shim
  • Publication number: 20110062443
    Abstract: Embodiments of a method for fabricating a semiconductor device are provided. In one embodiment, the method includes the step of producing a partially-completed semiconductor device including a substrate, source/drain (S/D) regions, a channel region between the S/D regions, a gate stack over the channel region, and sidewall spacers laterally adjacent the gate stack. The method further includes the steps of amorphizing the S/D regions, depositing a silicide-forming material over the amorphized S/D regions, and heating the partially-completed semiconductor device to a predetermined temperature at which the silicide-forming material reacts with the amorphized S/D regions.
    Type: Application
    Filed: September 16, 2009
    Publication date: March 17, 2011
    Applicant: GLOBALFOUNDRIES INC.
    Inventor: Witold MASZARA
  • Patent number: 7906777
    Abstract: The present invention provides a semiconductor thin film which can be manufactured at a relatively low temperature even on a flexible resin substrate. As a semiconductor thin film having a low carrier concentration, a high Hall mobility and a large energy band gap, an amorphous film containing zinc oxide and tin oxide is formed to obtain a carrier density of 10+17 cm?3 or less, a Hall mobility of 2 cm2/V·sec or higher, and an energy band gap of 2.4 eV or more. Then, the amorphous film is oxidized to form a transparent semiconductor thin film 40.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: March 15, 2011
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Koki Yano, Kazuyoshi Inoue, Nobuo Tanaka, Tokie Tanaka, legal representative
  • Publication number: 20100320468
    Abstract: In a portion of a gate signal line and a portion of a common signal line, cutouts which are arranged perpendicular to the extending direction of these lines and open to face each other in an opposed manner are formed. A cruciform shape in appearance is formed by combining a gap defined between the gate signal line and the common signal line extending parallel to each other and the cutouts to each other. The cruciform portion formed in this manner is used as an alignment mark in the exposure of a photolithography step of a layer formed later. Due to such a constitution, in manufacturing a thin film transistor substrate, it is possible to realize the highly accurate alignment without forming a pattern only used for alignment.
    Type: Application
    Filed: June 16, 2010
    Publication date: December 23, 2010
    Inventors: Yuuki KAMATA, Yuuichi NISHIMURA, Kunihiko WATANABE
  • Publication number: 20100301338
    Abstract: A thin film device includes: a substrate; an electric field shielding plate formed above the substrate, the electric filed shielding plate having a conductive material; and a thin film element formed on the electric field shielding plate, the, the electric field shielding plate being connected to a potential of any electrode of the thin film element or a ground potential.
    Type: Application
    Filed: May 20, 2010
    Publication date: December 2, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Daisuke ABE
  • Publication number: 20100283054
    Abstract: There is provided a method for manufacturing a flexible semiconductor device characterized by comprising (i) a step of forming an insulating film on the upper surface of metal foil, (ii) a step of forming an extraction electrode pattern on the upper surface of the metal foil, (iii) a step of forming a semiconductor layer on the insulating film in such a manner that the semiconductor layer is in contact with the extraction electrode pattern, (iv) a step of forming a sealing resin layer on the upper surface of the metal foil in such a manner that the sealing resin layer covers the semiconductor layer and the extraction electrode pattern, and (v) a step of forming electrodes by etching the metal foil, wherein the metal foil is used as a support for the insulating film, the extraction electrode pattern, the semiconductor layer, and the sealing resin layer formed in (i) to (iv) and used as a constituent material for the electrodes in (v).
    Type: Application
    Filed: July 30, 2009
    Publication date: November 11, 2010
    Inventors: Koichi Hirano, Seiichi Nakatani, Tatsuo Ogawa, Takashi Ichiryu, Takeshi Suzuki
  • Publication number: 20100264416
    Abstract: Provided is a crystalline silicon thin film semiconductor device which is capable of reducing off-state leakage current and has excellent current rising characteristics. The thin film transistor includes a semiconductor layer formed of an amorphous silicon layer and a crystalline silicon layer. A drain electrode is provided in direct contact with the crystalline silicon layer of the semiconductor layer, to thereby improve the current rising characteristics.
    Type: Application
    Filed: March 18, 2010
    Publication date: October 21, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Masahiro Tamura
  • Publication number: 20100264418
    Abstract: A control substrate comprising: a substrate main body; a base layer provided on one surface perpendicular to a thickness direction of the substrate main body; and a switching element provided on the base layer's surface located on the opposite side to the substrate main body, so as to perform switching between an electric connection and an electric disconnection, wherein the switching element comprises an electrode formed on the surface of the base layer by an application method, the surface being opposite to the substrate main body, and the base layer is formed of a member whose adhesiveness to the electrode is higher than the adhesiveness of the substrate main body to an electrode when forming the electrode on a base layer side surface of the substrate main body by an application method.
    Type: Application
    Filed: December 5, 2008
    Publication date: October 21, 2010
    Applicant: Sumitomo Chemical Company, Limited
    Inventors: Yukiya Nishioka, Tomonori Matsumuro, Kenji Kasahara
  • Publication number: 20100258801
    Abstract: A semiconductor component including a lateral transistor component is disclosed. One embodiment provides an electrically insulating carrier layer. On the carrier layer a first and a second semiconductor layer are arranged on above another and are separated from another by a dielectric layer and from which at least the first semiconductor layer includes a polycrystalline semiconductor material, an amorphous semiconductor material or an organic semiconductor material. In the first semiconductor layer: a source zone, a body zone, a drift zone and a drain zone are provided. In the second semiconductor layer; a drift control zone is arranged adjacent to the drift zone, including a control terminal at a first lateral end for applying a control potential, and is coupled to the drain zone via a rectifying element at a second lateral end. A gate electrode is arranged adjacent to the body zone and is dielectrically insulated from the body zone by a gate dielectric layer.
    Type: Application
    Filed: April 9, 2009
    Publication date: October 14, 2010
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Joachim Weyers, Anton Mauder, Franz Hirler, Paul Kuepper
  • Publication number: 20100244034
    Abstract: A thin film transistor includes a gate electrode; a gate insulating layer which is provided to cover the gate electrode; a semiconductor layer which is provided over the gate insulating layer to overlap with the gate electrode; an impurity semiconductor layer which is partly provided over the semiconductor layer and which forms a source region and a drain region; and a wiring layer which is provided over the impurity semiconductor layer, where a width of the source region and the drain region is narrower than a width of the semiconductor layer, and where the width of the semiconductor layer is increased at least in a portion between the source region and the drain region.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 30, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hidekazu Miyairi
  • Patent number: 7790582
    Abstract: A method for fabricating a polysilicon liquid crystal display device includes: forming a first amorphous silicon layer on a substrate; forming a photoresist pattern on the first amorphous silicon layer; forming a second amorphous silicon layer over the photoresist pattern and the first amorphous silicon layer; defining a channel region on the first amorphous silicon layer; crystallizing the first and second silicon layers; forming an active layer by patterning the crystallized silicon layers; forming a first insulating layer on the active layer; forming a gate electrode on the first insulating layer; forming source and drain electrodes electrically connected to the active layer; and forming a pixel electrode electrically connected to the drain electrode.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: September 7, 2010
    Assignee: LG Display Co., Ltd.
    Inventor: Kum-Mi Oh
  • Publication number: 20100219413
    Abstract: An object is to provide a method for manufacturing a highly-reliable semiconductor device with an improved material use efficiency and with a simplified manufacturing process. The method includes the steps of forming a conductive layer over a substrate, forming a light-transmitting layer over the conductive layer, and selectively removing the conductive layer and the light-transmitting layer by irradiation with a femtosecond laser beam from above the light-transmitting layer. Note that the conductive layer and the light-transmitting layer may be removed so that an end portion of the light-transmitting layer is located on an inner side than an end portion of the conductive layer. Before the irradiation with a femtosecond laser beam, a surface of the light-transmitting layer may be subjected to liquid-repellent treatment.
    Type: Application
    Filed: May 11, 2010
    Publication date: September 2, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masafumi MORISUE, Koichiro TANAKA
  • Publication number: 20100207121
    Abstract: A substrate supporting thin film transistors thereon, each including a semiconductor layer and source-drain electrodes, wherein the source-drain electrodes are formed from a nitrogen-containing layer or oxygen/nitrogen-containing layer and a thin film of pure copper or copper alloy. The nitrogen-containing layer or oxygen/nitrogen-containing layer has respectively part or all of its nitrogen or part or all of its oxygen or nitrogen connected to silicon in the semiconductor layer of the thin film transistor, and the thin film of pure copper or copper alloy is connected to the semiconductor layer of said thin film transistor through the nitrogen-containing layer or oxygen/nitrogen-containing layer.
    Type: Application
    Filed: October 12, 2007
    Publication date: August 19, 2010
    Applicant: Kabushiki Kaisha Kobe Seiko Sho(Kobe Steel, Ltd)
    Inventors: Aya Hino, Hiroshi Gotou
  • Publication number: 20100193792
    Abstract: A production method for a semiconductor film according to the present invention includes: step (a) of forming a first film 103 supported by a substrate 101; step (b) of forming a second film 102 being supported by the substrate and having a lower thermal conductivity than that of the first film 103; step (c) of depositing a semiconductor film 104 in an amorphous state above the first film 103 and the second film 102; and step (d) of irradiating portions of the semiconductor film 104 that are located above the first film 103 and the second film 102 with an energy beam of the same intensity, thereby crystallize the portion of the semiconductor film 104 that is located above the second film 102 and leaving the portion of the semiconductor film 104 that is located above the first film 103 in the amorphous state.
    Type: Application
    Filed: July 14, 2008
    Publication date: August 5, 2010
    Inventor: Toshiaki Miyajima
  • Publication number: 20100193789
    Abstract: An object is to provide a semiconductor device mounted with memory which can be driven in the ranges of a current value and a voltage value which can be generated from a wireless signal. Another object is to provide write-once read-many memory to which data can be written anytime after manufacture of a semiconductor device. An antenna, antifuse-type ROM, and a driver circuit are formed over an insulating substrate. Of a pair of electrodes included in the antifuse-type ROM, the other of the pair of the electrodes is also formed through the same step and of the same material as a source electrode and a drain electrode of a transistor included in the driver circuit.
    Type: Application
    Filed: April 6, 2010
    Publication date: August 5, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Hajime TOKUNAGA
  • Publication number: 20100181571
    Abstract: A laminate structure is disclosed that has a region having high surface free energy and a region having low surface free energy that are well separated, has high adhesiveness between an underlying layer and a conductive layer, and can be formed easily with low cost. The laminate structure includes a wettability-variable layer including a first surface free energy region of a first film thickness and a second surface free energy region of a second film thickness, and a conductive layer formed on the second surface free energy region of the wettability-variable layer. The second film thickness is less than the first film thickness and the surface free energy of the second surface free energy region is made higher than the surface free energy of the first surface free energy region by applying a predetermined amount of energy on the second surface free energy region.
    Type: Application
    Filed: July 15, 2008
    Publication date: July 22, 2010
    Inventors: Takanori TANO, Atsushi Onodera, Koei Suzuki, Hidenori Tomono
  • Publication number: 20100163856
    Abstract: A thin film transistor, a method of fabricating the thin film transistor, and an organic light emitting diode (OLED) display device including the thin film transistor, the thin film transistor including: a substrate; a buffer layer formed on the substrate; a first semiconductor layer disposed on the buffer layer; a second semiconductor layer disposed on the first semiconductor layer, which is larger than the first semiconductor layer; a gate electrode insulated from the first semiconductor layer and the second semiconductor layer; a gate insulating layer to insulate the gate electrode from the first semiconductor layer and the second semiconductor layer; source and drain electrodes insulated from the gate electrode and connected to the second semiconductor layer; an insulating layer disposed on the source and drain electrodes, and an organic light emitting diode connected to one of the source and drain electrodes.
    Type: Application
    Filed: December 30, 2009
    Publication date: July 1, 2010
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Byoung-Keon PARK, Dong-Hyun Lee, Kil-Won Lee, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Ji-Su Ahn, Maxim Lisachenko
  • Publication number: 20100148178
    Abstract: A thin film transistor includes: a gate electrode layer; a first semiconductor layer; a second semiconductor layer having lower carrier mobility than the first semiconductor layer, which is provided over and in contact with the first semiconductor layer; a gate insulating layer which is provided between and in contact with the gate electrode layer and the first semiconductor layer; first impurity semiconductor layers which are provided so as to be in contact with the second semiconductor layer; second impurity semiconductor layers which are provided so as to be partially in contact with the first impurity semiconductor layers and the first and second semiconductor layers; and source and drain electrode layers which are provided so as to be in contact with entire surfaces of the second impurity semiconductor layers, in which an entire surface of the first semiconductor layer on the gate electrode layer side overlaps with the gate electrode layer.
    Type: Application
    Filed: December 8, 2009
    Publication date: June 17, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiromichi GODO, Satoshi KOBAYASHI
  • Publication number: 20100127267
    Abstract: Alternative thin film transistors for liquid crystal displays are disclosed. The alternative transistors can be used for panels of displays such as liquid crystal displays (LCDs), especially those having alternative pixel arrangements. These transistors can be oriented on a panel of an LCD using different, non-traditional configurations, while addressing misalignment and parasitic capacitance.
    Type: Application
    Filed: January 26, 2010
    Publication date: May 27, 2010
    Inventors: Candice Hellen Brown Elliott, Thomas Lloyd Credelle, Matthew Osborne Schlegel
  • Publication number: 20100102311
    Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than or equal to 1 and less than 50. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
    Type: Application
    Filed: October 19, 2009
    Publication date: April 29, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunichi ITO, Toshinari SASAKI, Miyuki HOSOBA, Junichiro SAKATA
  • Publication number: 20100090220
    Abstract: The present invention aims at providing a high-performance semiconductor device such as display, IC tag, sensor or the like at a low cost by using an organic thin film transistor most members of which can be formed by printing, as a switching element. The present invention relates to a thin film transistor composed of members on a dielectric substrate, which are a gate electrode, a dielectric film, source/drain electrodes, and a semiconductor layer, wherein on said semiconductor layer there are formed at least two passivation films of a first passivation film capping said semiconductor layer to protect it and a second passivation film covering larger area than that of said first passivation film to protect all of said members.
    Type: Application
    Filed: December 15, 2009
    Publication date: April 15, 2010
    Applicant: HITACHI, LTD.
    Inventors: Masahiro KAWASAKI, Shuji Imazeki, Masahiko Ando, Yoshifumi Sekiguchi, Shoichi Hirota
  • Publication number: 20100072976
    Abstract: A sensing element includes a field-effect transistor (FET) with an ultra-thin channel, a reference electrode, a first and a second passivation layer, and a microchannel. The first and the second passivation layer enclose a first and a second portion of the FET, respectively. The microchannel is bonded to the first and the second passivation layer, such that the microchannel is extended across the channel of the ultra-thin channel FET. The ultra-thin channel has a chemically or physically modified surface. When an analyte to be tested passes through the microchannel and is in contact with the modified surface of the ultra-thin channel, it results in changes in the conductance of the ultra-thin channel FET. Trace detection may be conducted on the analyte by observing changes in the conductance. A method for manufacturing the sensing element and a biological detection system employing the sensing element are also provided.
    Type: Application
    Filed: July 2, 2009
    Publication date: March 25, 2010
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Jeng-Tzong Sheu, Chen-Chia Chen, Yaw-Kuen Li, Ko-Shing Chang
  • Publication number: 20100038646
    Abstract: A thin film transistor having a crystalline silicon film that is formed over an insulating substrate with a gate electrode and a gate insulating film in between, and has a channel region in a region corresponding to the gate electrode; an insulating channel protective film that is selectively formed in a region corresponding to the channel region on the crystalline silicon film; an n+ silicon film having a source region and a drain region that sandwich a region corresponding to the channel region on the channel protective film and the crystalline silicon film; and a metal film having a source electrode and a drain electrode that respectively correspond to the source region and the drain region.
    Type: Application
    Filed: October 21, 2009
    Publication date: February 18, 2010
    Applicant: SONY CORPORATION
    Inventors: Toshiaki Arai, Yoshio Inagaki
  • Publication number: 20100038641
    Abstract: A thin film field effect transistor has at least a gate electrode 2, a gate insulating layer 3, an active layer 4, a source electrode 5-1 and a drain electrode 5-2 on a substrate 1. The active layer includes an amorphous oxide semiconductor including at least In and Zn, a first interface layer 61 is disposed between the gate insulating layer and the active layer such that it is adjacent to at least the active layer, and a second interface layer is disposed on the opposite side of the active layer with respect to the first interface layer such that it is adjacent to the active layer. A content of Ga or Al in the amorphous oxide semiconductor of each of the first interface layer and the second interface layer is higher than a content of Ga or Al in the amorphous oxide semiconductor of the active layer.
    Type: Application
    Filed: August 11, 2009
    Publication date: February 18, 2010
    Applicant: FUJIFILM CORPORATION
    Inventor: Shinji IMAI