Abstract: An object of the present invention is to provide: a Cu alloy wiring film that makes it possible to use Cu having a low electrical resistivity as a wiring material, exhibit a high adhesiveness to a glass substrate, and avoid the danger of peel off from the glass substrate; a TFT element for a flat-panel display produced with the Cu alloy wiring film; and a Cu alloy sputtering target used for the deposition of the Cu alloy wiring film. The present invention is a wiring film 2 composing a TFT element 1 for a flat-panel display and a sputtering target used for the deposition of the film and the material comprises Cu as the main component and at least one element selected from the group consisting of Pt, Ir, Pd, and Sm by 0.01 to 0.5 atomic percent in total. The wiring film 2 is layered on a glass substrate 3 and further a transparent conductive film 5 is layered thereon while an insulating film 4 is interposed in between.
Abstract: An organic EL device comprising a semiconductor element A having a source electrode, a drain electrode, and a gate electrode, a semiconductor element B having a source electrode, a drain electrode, and a gate electrode connected to the source electrode or the drain electrode of the semiconductor element A, and an organic EL element having a pixel electrode connected to the drain electrode of the semiconductor element B, in which the source electrode and the drain electrode of the semiconductor element A and the gate electrode of the semiconductor element B are set on the same plane.
Abstract: A thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, and a gate electrode. The drain electrode is spaced from the source electrode. The semiconducting layer is electrically connected to the source electrode and the drain electrode. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconducting layer by an insulating layer. The at least one of the source electrode, drain electrode, and the gate electrode includes a metallic carbon nanotube layer. The metallic carbon nanotube layer includes a plurality of metallic carbon nanotubes.
Type:
Application
Filed:
April 2, 2009
Publication date:
November 19, 2009
Applicants:
Tsinghua University, HON HAI Precision Industry Co., LTD
Inventors:
Kai-Li Jiang, Qun-Qing Li, Shou-Shan Fan
Abstract: A MOS transistor with self-aligned source/drain terminals, and methods for its manufacture. The transistor generally includes an electrically functional substrate, a dielectric film on portions of the substrate, a gate on the dielectric film, and polycrystalline source and drain terminals self-aligned with the gate. The method generally includes forming an amorphous semiconductor material on a gate and on exposed portions of an electrically functional substrate, irradiating an upper surface of the amorphous semiconductor material to form self-aligned polycrystalline semiconducting source/drain terminal layers, and (optionally) selectively removing the non-irradiated amorphous semiconductor material portions. The present invention advantageously provides MOS thin film transistors having reliable electrical characteristics quickly, efficiently, and/or at a low cost by eliminating one or more conventional photolithographic steps.
Abstract: A metal line substrate and a method of fabricating thereof, the metal line substrate including an insulating layer and a capping layer disposed on an insulating substrate, a trench defined by the insulating layer and the capping layer disposed on the insulating substrate, a seed layer pattern disposed on the insulating substrate, and a low-resistive conductive layer pattern disposed in the trench and contacting the seed layer pattern. The capping layer pattern includes a protrusion region which is in contact with the low-resistive conductive layer pattern.
Abstract: The present invention provides a semiconductor thin film which can be manufactured at a relatively low temperature even on a flexible resin substrate. As a semiconductor thin film having a low carrier concentration, a high Hall mobility and a large energy band gap, an amorphous film containing zinc oxide and tin oxide is formed to obtain a carrier density of 10+17 cm?3 or less, a Hall mobility of 2 cm2/V·sec or higher, and an energy band gap of 2.4 eV or more. Then, the amorphous film is oxidized to form a transparent semiconductor thin film 40.
Type:
Application
Filed:
October 16, 2006
Publication date:
October 29, 2009
Inventors:
Koki Yano, Kazuyoshi Inoue, Nobuo Tanaka, Tokie Tanaka
Abstract: A method and apparatus for forming a thin film transistor is provided. A gate dielectric layer is formed, which may be a bilayer, the first layer deposited at a low rate and the second deposited at a high rate. In some embodiments, the first dielectric layer is a silicon rich silicon nitride layer. An active layer is formed, which may also be a bilayer, the first active layer deposited at a low rate and the second at a high rate. The thin film transistors described herein have superior mobility and stability under stress.
Type:
Application
Filed:
April 16, 2009
Publication date:
October 22, 2009
Applicant:
APPLIED MATERIALS, INC.
Inventors:
Ya-Tang Yang, Beom Soo Park, Tae Kyung Won, Soo Young Choi, John M. White
Abstract: One object of the present invention is reduction of off current of a thin film transistor. Another object of the present invention is improvement of electric characteristics of the thin film transistor. Further, another object of the present invention is improvement of image quality of the display device including the thin film transistor. The thin film transistor includes a semiconductor film containing germanium at a concentration greater than or equal to 5 at. % and less than or equal to 100 at. % or a conductive film which is provided over a gate electrode with the gate insulating film interposed therebetween and which is provided in an inner region of the gate electrode so as not to overlap with an end portion of the gate electrode, a film covering at least a side surface of the semiconductor film containing germanium at a concentration greater than or equal to 5 at. % and less than or equal to 100 at.
Type:
Application
Filed:
December 24, 2008
Publication date:
July 2, 2009
Applicant:
SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Abstract: A method of manufacturing a thin-film transistor according to an embodiment of the present invention includes the step of forming a gate insulator on a gate electrode. The gate insulator includes at least a first region being in contact with a hydrogenated amorphous silicon film, and a second region positioned below the first region. The first and second regions are deposited using a source gas including NH3, N2, and SiH4, and H2 gas or a mixture of H2 and He. The first region is deposited by setting the flow-rate ratio NH3/SiH4 in a range from 11 to 14 and the second region is deposited by setting the flow-rate ratio NH3/SiH4 to be equal to or less than 4. It is thus possible to provide a thin-film transistor having excellent characteristics and high reliability, a method of manufacturing the same, and a display device including the thin-film transistor mounted thereon.
Type:
Application
Filed:
December 16, 2008
Publication date:
June 25, 2009
Applicant:
MITSUBISHI ELECTRIC CORPORATION
Inventors:
Koji ODA, Naoki Nakagawa, Takeshi Ono, Yusuke Uchida
Abstract: An object is to provide a structure for forming a circuit for which high-speed operation and low-voltage operation are required and a circuit for which sufficient reliability is required at the time of high voltage application in a circuit group provided over one substrate in a semiconductor device, and a manufacturing method thereof. A semiconductor device is provided with a plurality of kinds of transistors which include single-crystal semiconductor layers with different thicknesses, which are separated from a single-crystal semiconductor substrate and bonded, over one substrate. The single-crystal semiconductor layer of a transistor for which high-speed operation is required is formed thinner than that of a transistor for which high resistance to a voltage is required, so that the thickness of the single-crystal semiconductor layer is made to be thin.
Type:
Application
Filed:
March 25, 2008
Publication date:
November 20, 2008
Applicant:
SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Abstract: The manufacturing method of a semiconductor device according to the present invention comprises steps of forming a metal film, an insulating film, and an amorphous semiconductor film in sequence over a first substrate; crystallizing the metal film and the amorphous semiconductor film; forming a first semiconductor element by using the crystallized semiconductor film as an active region; attaching a support to the first semiconductor element by using an adhesive; causing separation between the metal film and the insulating film; attaching a second substrate to the separated insulating film; separating the support by removing the adhesive; forming an amorphous semiconductor film over the first semiconductor element; and forming a second semiconductor element using the amorphous semiconductor film as an active region.
Type:
Grant
Filed:
January 2, 2004
Date of Patent:
November 11, 2008
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
Abstract: A thin film transistor (TFT) and a manufacturing method thereof are provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Next, source/drain regions are formed over the channel layer.
Abstract: This invention relates to a TFT-LCD and a manufacturing method therefor which etches triple layer patterns in a single process step. As a result, the number of masking processes is reduced and a high quality device is produced with less defects.