Abstract: The present application discloses an array substrate and a display panel, the array substrate including a substrate, and a first gate layer and a second gate layer formed on the substrate; the first gate layer includes a first gate line connecting a plurality of first gates, at least two of the second gates of the second gate layer connected to a same one of the first gates; or the second gate layer including a second gate line connecting the plurality of second gates, at least two of the first gates of the first gate layer connected to a same one of the second gates.

Abstract: A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode.

Abstract: Power MOS device of the type comprising a plurality of elementary power MOS transistors having respective gate structures and comprising a gate oxide with double thickness having a thick central part and lateral portions of reduced thickness. Such device exhibiting gate structures comprising first gate conductive portions overlapped onto said lateral portions of reduced thickness to define, for the elementary MOS transistors, the gate electrodes, as well as a conductive structure or mesh. Such conductive structure comprising a plurality of second conductive portions overlapped onto the thick central part of gate oxide and interconnected to each other and to the first gate conductive portions by means of a plurality of conducive bridges.

Abstract: The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general.

Abstract: In a manufacturing method for thin film transistors, the following procedure is taken: a sacrifice layer comprised of a metal oxide semiconductor is formed over a conductive layer comprised of a metal oxide semiconductor; a metal film is formed over the sacrifice layer; the metal film is processed by dry etching; and the portion of the sacrifice layer exposed by this dry etching is subjected to wet etching.

Abstract: According to present invention, system on panel without complicating the process of TFT can be realized, and a light-emitting device that can be formed by lower cost than that of the conventional light-emitting device can be provided. A light-emitting device is provided in which a pixel portion is provided with a pixel including a light-emitting element and a TFT for controlling supply of current to the light-emitting element; a TFT included in a drive circuit and a TFT for controlling supply of current to the light-emitting element include a gate electrode, a gate insulating film formed over the gate electrode, a first semiconductor film, which overlaps with the gate electrode via the gate insulating film, a pair of second semiconductor films formed over the first semiconductor film; the pair of second semiconductor films are doped with an impurity to have one conductivity type; and the first semiconductor film is formed by semiamorphous semiconductor.

Abstract: According to present invention, system on panel without complicating the process of TFT can be realized, and a light-emitting device that can be formed by lower cost than that of the conventional light-emitting device can be provided. A light-emitting device is provided in which a pixel portion is provided with a pixel including a light-emitting element and a TFT for controlling supply of current to the light-emitting element; a TFT included in a drive circuit and a TFT for controlling supply of current to the light-emitting element include a gate electrode, a gate insulating film formed over the gate electrode, a first semiconductor film, which overlaps with the gate electrode via the gate insulating film, a pair of second semiconductor films formed over the first semiconductor film; the pair of second semiconductor films are doped with an impurity to have one conductivity type; and the first semiconductor film is formed by semiamorphous semiconductor.

Abstract: The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: In an organic light-emitting display having superior image quality and device reliability, and a related method of manufacturing the organic light-emitting display, the organic light-emitting display comprises: a gate electrode formed on a substrate; an interlayer insulating film formed on the substrate so as to cover the gate electrode; and a transparent electrode formed on the interlayer insulating film. The interlayer insulating film comprises multiple layers having different refractive indices.

Abstract: In one embodiment, a thin-film transistor (TFT) includes a gate electrode, a semiconductor pattern, first and second electrodes and a protective layer. The semiconductor pattern is formed on the gate electrode, and includes a first semiconductor layer deposited at a first deposition speed and a second semiconductor layer deposited at a second deposition speed faster than the first deposition speed. The first and second electrodes are spaced apart from each other on the semiconductor pattern. The protective layer is formed on the semiconductor pattern to cover the first and second electrodes, and makes contact with a channel region of the first semiconductor layer to form an interface with the first semiconductor layer. Thus, electrical characteristics of the TFT may be improved.

Abstract: A method of forming a polycrystalline silicon layer, a thin film transistor (TFT), an organic light emitting diode (OLED) display device having the same, and methods of fabricating the same. The method of forming a polycrystalline silicon layer includes providing a substrate, forming a buffer layer on the substrate, forming an amorphous silicon layer on the buffer layer, forming a groove in the amorphous silicon layer, forming a capping layer on the amorphous silicon layer, forming a metal catalyst layer on the capping layer, and annealing the substrate and crystallizing the amorphous silicon layer into a polycrystalline silicon layer.

Abstract: A thin film transistor and method of fabricating the same are provided. The thin film transistor includes: a metal catalyst layer formed on a substrate, and a first capping layer and a second capping layer pattern sequentially formed on the metal catalyst layer. The method includes: forming a first capping layer on a metal catalyst layer; forming and patterning a second capping layer on the first capping layer; forming an amorphous silicon layer on the patterned second capping layer; diffusing the metal catalyst; and crystallizing the amorphous silicon layer to form a polysilicon layer. The crystallization catalyst diffuses at a uniform low concentration to control a position of a seed formed of the catalyst such that a channel region in the polysilicon layer is close to a single crystal. Therefore, the characteristics of the thin film transistor device may be improved and uniformed.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode.

Abstract: A thin film transistor (TFT) substrate includes first and second TFTs on the same substrate. The first TFT has a feature that a lower conductive layer or a bottom gate electrode layer is provided between the substrate and a first insulating layer while an upper conductive layer or a top gate electrode layer is disposed on a second insulating layer formed on a semiconductor layer which is formed on the first insulating layer. The first conductive layer has first and second areas such that the first area overlaps with the first conductive layer without overlapping with the semiconductor layer while the second area overlaps with the semiconductor layer, and the first area is larger than the second area while the second insulating layer is thinner than the first insulating layer. The second TFT has the same configuration as the first TFT except that the gate electrode layer is eliminated.

Abstract: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility. A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.

Abstract: One embodiment of the present invention is an insulating thin film having a polymer compound, a metallic atom bonded to the polymer compound through an oxide atom and selected from a group 4 element, a group 5 element, a group 6 element, a group 13 element, zinc or tin, and an organic molecule bonded to the metallic atom through the oxide atom or a nitrogen atom.

Abstract: A method for fabricating a flexible semiconductor device includes: preparing a layered film 80 including a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40 which are sequentially formed; etching the first metal layer 10 to form a gate electrode 12g; compression bonding a resin layer 50 to a surface of the layered film 80 provided with the gate electrode 12g to allow the gate electrode 12g to be embedded in the resin layer 50; and etching the second metal layer 40 to form a source electrode 42s and a drain electrode 42d, wherein the inorganic insulating layer 20 on the gate electrode 12g functions as a gate insulating film 22, and the semiconductor layer 30 between the source electrode 42s and drain electrode 42d on the inorganic insulating layer 20 functions as a channel 32.

Abstract: A thin film transistor array panel includes: first and second gate lines disposed on a substrate and separated from each other; a data line intersecting the first and second gate lines; first and second thin film transistors connected to the first gate line and the data line; a third thin film transistor connected to the second gate line and having a drain electrode; and a pixel electrode including a first subpixel electrode and a second subpixel electrode, wherein the first subpixel electrode is connected to the first and third thin film transistor, the second subpixel electrode is connected to the second thin film transistor and includes a projection overlapping the drain electrode, and the projection has a first pair of edge portions that meet a first edge of the drain electrode and are substantially parallel to each other.

Abstract: A pixel structure includes a drain shielding extension portion disposed on a floating semiconductor layer, wherein the floating semiconductor layer is formed together with a thin-film transistor channel layer. Therefore, the total thickness of the floating semiconductor layer and the drain shielding extension portion is increased, such that the distance between the gate line and the drain shielding extension portion is enlarged, and the coupling capacitance between the gate line and the drain shielding extension portion can be lowered. Therefore, the display panel with the pixel structure of the present invention can have low coupling capacitance so as to improve the flicker phenomena obviously.

Abstract: A thin-film transistor array panel and a manufacturing method thereof are provided for one or more embodiments. The thin-film transistor array panel may include: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a source electrode and a drain electrode formed on the gate insulating layer; and a flatness layer formed on the source electrode and the drain electrode, wherein the drain electrode has a higher height than the flatness layer.

Abstract: A thin film transistor and a manufacturing method thereof are provided. A bottom gate, a gate insulating layer and an amorphous semiconductor layer are formed on a substrate. The amorphous semiconductor layer has an uneven upper surface. A laser annealing process is performed on the amorphous semiconductor layer through the uneven upper layer to transform the amorphous semiconductor layer into a polycrystalline semiconductor layer having a smaller-crystallizing-section and a greater-crystallizing-section. Another gate insulating layer, an upper gate and patterned photoresist layer are formed on the polycrystalline semiconductor layer. Patterns of the upper gate and the bottom gate are defined by the same photo-mask. A source/drain is formed in the polycrystalline semiconductor layer. An etching process with etching selectivity is performed on the upper gate and the patterned photoresist layer to make a length of the upper gate shorter than that of the bottom gate.

Abstract: A method for forming a thin film transistor on a substrate is disclosed. A gate electrode and a gate insulation layer are disposed on a surface of the substrate. A deposition process is performed by utilizing hydrogen diluted silane to form a silicon-contained thin film on the gate insulation layer first. A hydrogen plasma etching process is thereafter performed. The deposition process and the etching process are repeated for at least one time to form an interface layer. Finally, an amorphous silicon layer, n+ doped Si layers, a source electrode, and a drain electrode are formed on the interface layer.

Abstract: An X-ray detector includes a gate wire formed on a substrate, the gate wire including a gate line, a gate electrode, and a gate pad, a gate insulating layer formed on the gate wire, a data wire formed on the gate insulating layer, the data wire including a data line intersecting the gate line, a source electrode, a drain electrode, and a data pad, a lower storage electrode formed on the gate insulating layer, the lower storage electrode comprising an opaque conductor material, and an upper storage electrode formed on the lower storage electrode, the upper storage electrode connected to the source electrode.

Abstract: A fan-out unit which can control a resistance difference among channels with efficient space utilization and a thin-film transistor (TFT) array substrate having the fan-out unit are presented. The fan-out unit includes: an insulating substrate; a first wiring layer which is formed on the insulating substrate and connected to a pad; a second wiring layer which is formed on the insulating substrate and connected to a TFT; and a resistance controller which is connected between the first wiring layer and the second wiring layer and includes a plurality of first resistors extending parallel to the first wiring layer and a plurality of second resistors extending perpendicular to the first resistors and alternately connecting to the first resistors, wherein the first resistors are longer than the second resistors.

Abstract: The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general.

Abstract: A field-effect type transistor has: a source electrode; a drain electrode being a metal electrode; a semiconductor layer provided to be in contact with both of the source electrode and the drain electrode; and a gate electrode provided to face at least a part of the semiconductor layer. The gate electrode has: a first gate electrode; and a second gate electrode provided closer to the drain electrode than the first gate electrode is. The second gate electrode is so connected as to have a same potential as the drain electrode and is electrically isolated from the first gate electrode. Consequently, in a display device, the off-leakage current is suppressed, and reduction in a pixel area and a bus interconnection width is suppressed.

Abstract: One of the objects of the present invention is to provide a thin film transistor using an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn), in which the contact resistance between the oxide semiconductor layer and a source and drain electrodes is reduced, and to provide a method for manufacturing the thin film transistor. An ohmic contact is formed by intentionally providing a buffer layer having a higher carrier concentration than the IGZO semiconductor layer between the IGZO semiconductor layer and the source and drain electrode layers.

Abstract: A thin film transistor substrate includes an insulating plate, a plurality of fan-out lines arranged on the insulating plate and including at least a pair of adjacent fan-out lines, a plurality of signal lines connected to the plurality of fan-out lines, and a plurality of thin film transistors connected to the plurality of signal lines. The adjacent fan-out lines partially overlap with each other, and each overlapping area of the adjacent fan-out lines is the same.

Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Abstract: Embodiments disclosed herein generally relate to TFTs and methods of fabricating the TFTs. In TFTs, the active channel carries the current between the source and drain electrodes. By tailoring the composition of the active channel, the current can be controlled. The active channel may be divided into three layers, a gate control layer, a bulk layer, and an interface control layer. The separate layers may have different compositions. Each of the gate control, bulk and interface control layers may additionally comprise multiple layers that may have different compositions. The composition of the various layers of the active channel comprise oxygen, nitrogen, and one or more elements selected from the group consisting of zinc, indium, cadmium, tin, gallium and combinations thereof. By varying the composition among the layers, the mobility, carrier concentration and conductivity of the various layers may be controlled to produce a TFT having desired properties.

Abstract: A capping layer may be deposited over the active channel of a thin film transistor (TFT) in order to protect the active channel from contamination. The capping layer may affect the performance of the TFT. If the capping layer contains too much hydrogen, nitrogen, or oxygen, the threshold voltage, sub threshold slope, and mobility of the TFT may be negatively impacted. By controlling the ratio of the flow rates of the nitrogen, oxygen, and hydrogen containing gases, the performance of the TFT may be optimized. Additionally, the power density, capping layer deposition pressure, and the temperature may also be controlled to optimize the TFT performance.

Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.

Abstract: A semiconductor device includes a substrate, first, second, and third gate lines disposed over the substrate, the first and second gate lines defining a first trench with a first aspect ratio, the second and third gate lines defining a second trench with a second aspect ratio, a first insulating layer formed to decrease the first and second aspect ratios, and a second insulating layer disposed over the first insulating layer to fill the first and second trenches.

Abstract: A gate wire including a plurality of gate lines and gate electrodes in the display area, and gate pads in the peripheral area is formed on a substrate having a display area and a peripheral area. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductor layer are sequentially deposited, and the conductor layer and the ohmic contact are patterned to form a data wire including a plurality of data lines, a source electrode and a drain electrode of the display area and data pads of the peripheral area, and an ohmic contact layer pattern thereunder. A passivation layer is deposited and a positive photoresist layer is coated thereon. The photoresist layer is exposed to light through one or more masks having different transmittance between the display area and the peripheral area. The photoresist layer is developed to form a photoresist pattern having the thickness that varies depending on the position.

Abstract: In one embodiment, a thin-film transistor (TFT) includes a gate electrode, a semiconductor pattern, first and second electrodes and a protective layer. The semiconductor pattern is formed on the gate electrode, and includes a first semiconductor layer deposited at a first deposition speed and a second semiconductor layer deposited at a second deposition speed faster than the first deposition speed. The first and second electrodes are spaced apart from each other on the semiconductor pattern. The protective layer is formed on the semiconductor pattern to cover the first and second electrodes, and makes contact with a channel region of the first semiconductor layer to form an interface with the first semiconductor layer. Thus, electrical characteristics of the TFT may be improved.

Abstract: The invention relates to the fabrication of thin-film transistors made of amorphous silicon and of polycrystalline silicon on one and the same substrate. A polycrystalline silicon island (12) is formed, an insulating layer (14) and a first conducting layer (16) are deposited and these two layers are etched to the same pattern so as to simultaneously define a first insulated gate on top of the island and a second gate away from the island. The polycrystalline silicon is doped in order to form the source and the drain of a polycrystalline silicon first transistor (gate above the channel). An insulating layer (18) forming the gate insulator of an amorphous silicon transistor (gate beneath the channel) is deposited. The fabrication of the amorphous silicon transistor then continues with the deposition and etching of undoped amorphous silicon (20) and doped silicon (22), etching of the insulating layer (18) and deposition and etching of interconnect metal (28). The invention is applicable to LCD, LED and OLED.

Abstract: A display device including the thin film transistor, and a method of manufacturing the display device are provided. The thin film transistor comprising a first gate electrode, a second gate electrode formed on the first gate electrode, a first semiconductor formed on the first gate electrode and including a polycrystalline semiconductor, a second semiconductor formed on the second gate electrode and including an amorphous semiconductor.

Abstract: An electroconductive film having high adhesion and a low resistivity is formed. An electroconductive film composed mainly of copper and containing an addition metal such as Ti is formed by sputtering a target composed mainly of copper in a vacuum atmosphere into which a nitriding gas is introduced. Such an electroconductive film has high adhesion to a silicon layer and a substrate, and is hardly peeled from the substrate. Further, since the electroconductive film has a low resistivity and a low contact resistance to a transparent electroconductive film, the electric characteristics do not degrade even when it is used as an electrode film. The electroconductive film formed by the present invention is suitable particularly as a barrier film for an electrode of a TFT or a semiconductor element.

Abstract: A conductive film having high adhesion and low specific resistance is formed. A target containing copper as a main component is sputtered in vacuum ambience while an oxygen gas introduced, and then, a conductive film containing copper as a main component and additive metals, such as Ti or Zr, is formed. Such a conductive film has high adhesion to a silicon layer and a glass substrate and is hardly peeled off from the substrate. Furthermore, the specific resistance is low and the contact resistance to a transparent conductive film is also low. Thus, no deterioration in the electric characteristics occurs even when the conductive film is used for an electrode film. Accordingly, the conductive film formed by the present invention suited for TFT, and electrode films and barrier films of semiconductor elements, in particular.