Abstract: Provided are thin film transistor, a method of fabricating the same, a flat panel display device including the same, and a method of fabricating the flat panel display device, that are capable of applying an electric field to a gate line to form a channel region of a semiconductor layer of a thin film transistor using a polysilicon layer crystallized by a high temperature heat generated by Joule heating of a conductive layer. As a result, a process can be simplified using a gate line included in the thin film transistor as the conductive layer, and the channel region of the semiconductor layer can be formed of polysilicon having a uniform degree of crystallinity. The thin film transistor includes a straight gate line disposed in one direction, a semiconductor layer crossing the gate line, and source and drain electrodes connected to source and drain regions of the semiconductor layer.

Abstract: A thin film transistor with a large on-current and a reduced off-current is provided with high fabrication efficiency. A thin film transistor of the present invention includes a gate electrode; and a microcrystalline silicon layer containing a microcrystalline silicon, the microcrystalline silicon layer having an upper surface and a lower surface which are parallel to a substrate surface and an end surface which extends between the upper surface and the lower surface; first and second contact layers containing impurities which are provided so as to be in contact with the microcrystalline silicon layer; a source electrode which is in contact with the first contact layer; and a drain electrode which is in contact with the second contact layer, wherein at least one of the first and second contact layers is in contact with the microcrystalline silicon layer only at the end surface without being in contact with any of the upper surface and the lower surface.

Abstract: A method for forming a thin film transistor on a substrate is disclosed. A gate electrode and a gate insulation layer are disposed on a surface of the substrate. A deposition process is performed by utilizing hydrogen diluted silane to form a silicon-contained thin film on the gate insulation layer first. A hydrogen plasma etching process is thereafter performed. The deposition process and the etching process are repeated for at least one time to form an interface layer. Finally, an amorphous silicon layer, n+ doped Si layers, a source electrode, and a drain electrode are formed on the interface layer.

Abstract: A thin film transistor includes a gate electrode, a gate insulation layer on the gate electrode, source and drain electrodes formed on the gate insulation layer, a polysilicon channel layer overlapping the ohmic contact layers and on the gate insulation layer between the source and drain electrodes, ohmic contact regions over the source and drain electrodes for contacting the polysilicon channel to the source and drain electrodes, and doping layers over the source and drain electrodes.

Abstract: A thin film transistor, a method of fabricating the thin film transistor, and an organic light emitting diode (OLED) display device equipped with the thin film transistor of which the thin film transistor includes a substrate, a buffer layer disposed on the substrate, a first semiconductor layer and a second semiconductor layer disposed on the buffer layer, a gate electrode insulated from the first semiconductor layer and the second semiconductor layer, a gate insulating layer insulating the gate electrode from the first semiconductor layer and the second semiconductor layer, and source and drain electrodes insulated from the gate electrode and partially connected to the second semiconductor layer, wherein the second semiconductor layer is disposed on the first semiconductor layer.

Abstract: A switching device structure of active matrix display is provided. The switching device structure includes a substrate, a plurality of switching-device gate connection lines disposed on the substrate along a first direction and a plurality of switching devices disposed on the substrate along the first direction. Each switching device includes a gate electrode electrically connected to the any two adjacent switching-device gate connection lines, and the gate electrode protrudes from at least one side of the switching-device gate connection line along a second direction.

Abstract: An electrophoretic display device includes a gate line on a substrate, a common line parallel to the gate line, a gate insulating layer on the gate line and the common line, a data line on the gate insulating layer, the data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line, the thin film transistor including a gate electrode, a semiconductor layer, a source electrode and a drain electrode, a first storage electrode extending from the common line, a first passivation layer over the thin film transistor, the gate line and the data line, the first passivation layer exposing the drain electrode, and a pixel electrode on the first passivation layer, the pixel electrode contacting the drain electrode and overlapping the gate line and the data line, wherein the pixel electrode includes a second storage electrode overlapping the first storage electrode, and the first and second storage electrodes form a storage capacitor with the gate insulating

Abstract: A thin film transistor comprises: a first transistor region and a second transistor region defined on a substrate; and a first transistor and a second transistor respectively disposed on the first and second transistor regions, the first transistor comprising: a first semiconductor layer having source, channel, and drain regions defined on the substrate; a first insulating film disposed on the first semiconductor layer; a first transparent electrode disposed on the first insulating film and formed corresponding to the channel region of the first semiconductor layer; and a second insulating film disposed on the first transparent electrode, and the second transistor comprising: a second semiconductor layer having source, channel, and drain regions defined on the substrate; the first insulating film disposed on the second semiconductor layer; a second transparent electrode disposed on the first insulating film and formed corresponding to the channel region of the second semiconductor layer; a second gate dispose

Abstract: Methods for manufacturing thin film transistor arrays utilizing three steps of lithography and one step of laser ablation while the lithography procedure is used four to five times in conventional processes are disclosed. The use of the disclosed methods assists in improving throughput and saving of manufacturing cost.

Abstract: A thin film transistor array substrate includes a gate line disposed on a substrate, the gate line comprising a gate electrode including a lower film and an upper film thicker than the lower film, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, an ohmic contact layer formed on the semiconductor layer, a data line electrically connected to a source electrode and a drain electrode formed on the ohmic contact layer, the lower film of the gate line is in contact with the gate insulating layer at a crossing portion of the gate line and the data line and the heights of the source electrode and the drain electrode are substantially the same as or less than a height of the semiconductor layer.

Abstract: A method of manufacturing a display device includes forming a gate electrode on a substrate, a gate insulating layer on the gate electrode, and an active layer on the gate insulating layer, the gate electrode made of extrinsic polycrystalline silicon, the active layer made of intrinsic polycrystalline silicon; forming an etch stopper on the active layer; forming source and drain electrodes spaced apart from each other on the etch stopper; forming an ohmic contact layer each between a side of the active layer and the source electrode and between an opposing side of the active layer and the drain electrode; forming a gate line connected to the gate electrode; and forming a data line crossing the gate line.

Abstract: A thin film transistor substrate, wherein the moving area of electrons between source and drain electrodes of a thin film transistor (TFT) is minimized, the moving distance of electrons is increased, and the sizes of capacitors defined by a gate electrode together with the respective source and drain electrodes are identical to each other so that an off current generated when the TFT is off can be minimized; a method of manufacturing the thin film transistor substrate; and a mask for manufacturing the thin film transistor substrate. Accordingly, it is possible to minimize an off current induced due to a phenomenon of electron trapping by light.

Abstract: A display device having thin film transistors which can acquire an appropriate ON current and an appropriate OFF current and a manufacturing method thereof are provided. A display device includes: a transparent substrate; and a plurality of thin film transistors which are formed on the transparent substrate.

Abstract: A fabricating method of an array substrate for a liquid crystal display device including forming a polycrystalline silicon film on a substrate having a display region and a peripheral region, the polycrystalline silicon film having grains of square shape, forming a first active layer in the display region and a second active layer in the peripheral region by etching the polycrystalline silicon film, forming a first gate electrode over the first active layer, a second gate electrode over the second active layer and a gate line connected to the first gate electrode, and forming first source and drain electrodes connected to the first active layer, second source and drain electrodes connected to the second active layer and data line connected to the first source electrode. Further, the second gate electrode overlaps the first active layer to form a first channel region, and the first channel region is formed inside one of the grains.

Abstract: A display device includes: a conductive layer on which gate electrodes are formed; a first insulation layer which is formed on the conductive layer; a semiconductor layer which is formed on the first insulation layer and is provided for forming semiconductor films which contain poly-crystalline silicon above the gate electrodes; and a second insulation layer which is formed on the semiconductor layer. Here, the semiconductor film includes a channel region which overlaps with the gate electrode as viewed in a plan view. In the channel region, a portion of the semiconductor film which is in contact with the second insulation layer exhibits higher impurity concentration than a portion of the semiconductor film which is in contact with the first insulation layer.

Abstract: A thin film transistor for an organic light emitting diode includes a substrate including a pixel portion and an interconnection portion, a buffer layer on the substrate, a gate electrode and a gate interconnection on the buffer layer, wherein the gate electrode is located at the pixel portion and the gate interconnection is located at the interconnection portion, a gate insulating layer on the substrate, a semiconductor layer on the gate electrode, source and drain electrodes electrically connected to the semiconductor layer, and a metal pattern on the gate interconnection.

Abstract: A pixel structure and a fabrication method thereof are provided. The pixel comprises a substrate, a gate, a gate insulating layer, a channel layer, a first source/drain, a second source/drain, a dielectric layer, a first pixel electrode, and a second pixel electrode. The gate is disposed on the substrate and is covered by the gate insulating layer. The channel layer is disposed on the gate insulating layer above the gate. The first source/drain and the second source/drain are disposed on the channel layer. The channel layer has different thicknesses respectively corresponding to the first drain/source and the second drain/source. The dielectric layer covers the substrate and exposes the first and the second drains. The first and the second pixel electrodes are disposed on the dielectric layer, and are electrically connected to the first and the second drains respectively.

Abstract: A thin film transistor substrate that includes a substrate, first and second gate electrodes that are formed on the substrate, a gate insulating layer that is formed on the first and second gate electrodes, a first semiconductor and a second semiconductor that are formed on the gate insulating layer, and that overlap the first gate electrode and the second gate electrode, respectively, a first source electrode and a first drain electrode that are formed on the first semiconductor, and positioned opposed to and spaced from each other, a source electrode connected to the first drain electrode and a second drain electrode positioned opposed to and spaced from the second source electrode, wherein the second source and second drain electrodes are formed on the second semiconductor, and a pixel electrode that is electrically connected to the second drain electrode, a method of manufacturing the same, and a display apparatus having the same.

Abstract: The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure, LDD regions in a pixel TFT are arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in an N-channel TFT of a drive circuit is arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in a P-channel TFT of the drive circuit is arranged so as to overlap with a channel protection insulating film and to overlap with the gate electrode.

Abstract: A method of manufacturing a silicon layer includes pretreating a surface of a silicon nitride layer formed on a substrate through a plasma enhanced chemical vapor deposition method using a first reaction gas including at least one of silicone tetrafluoride (SiF4) gas, a nitrogen trifluoride (NF3) gas, SiF4—H2 gas and a mixture thereof. Then, a silicon layer is formed on the pretreated silicon nitride layer through the plasma enhanced chemical vapor deposition method using a second reaction gas including a mixture of gas including silicon tetrafluoride (SiF4), hydrogen (H2) and argon (Ar).

Abstract: A method of forming a pattern includes forming a first layer on a substrate, forming a second layer on the first layer, depositing a multi-temperature phase-change material on the second layer, patterning the second layer using the multi-temperature phase-change material as a mask, reflowing the multi-temperature phase-change material, and patterning the first layer using the reflowed multi-temperature phase-change material as a mask.

Abstract: Disclosed is a thin film transistor (TFT). The TFT may include an intermediate layer between a channel and a source and drain. An increased off current, which may occur to a drain area of the TFT, is reduced due to the intermediate layer. Accordingly, the TFT may be stably driven.

Abstract: Provided may be a Poly-Si thin film transistor (TFT) and a method of manufacturing the same. The Poly-Si TFT may include a first Poly-Si layer on an active layer formed of Poly-Si and doped with a low concentration; and a second Poly-Si layer on the first Poly-Si layer and doped with the same concentration as the first Poly-Si layer or with a higher concentration than the first Poly-Si layer, wherein lightly doped drain (LDD) regions capable of reducing leakage current may be formed in inner end portions of the first Poly-Si layer.

Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

Abstract: A thin film transistor includes, as a buffer layer, an amorphous semiconductor layer having nitrogen or an NH group between a gate insulating layer and source and drain regions and at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

Abstract: A Thin Film Transistor (TFT) includes: a substrate, a buffer layer arranged on the substrate, a gate electrode arranged on the buffer layer, a gate insulating layer arranged on the gate electrode, a semiconductor layer arranged on the gate insulating layer to correspond to the gate electrode, a heat transfer sacrificial layer arranged on the semiconductor layer, and source and drain electrodes connected to the semiconductor layer. A method of fabricating the TFT and a method of fabricating an Organic Light Emitting Diode (OLED) display having the TFT is also provided.

Abstract: A display device includes source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. The source/drain electrodes and the pixel electrode are formed on the substrate and in contact with each other. The insulating partition wall layer is formed on the substrate and provided with a first opening extending to between the source electrode and the drain electrode and a second opening formed on the pixel electrode and extending to the pixel electrode. The channel-region semiconductor layer is formed on the bottom of the first opening. The insulating film is formed on the partition wall layer so as to cover the first opening including the channel-region semiconductor layer. The oriented film covers the first opening from above the insulating film and the second opening from the pixel electrode.

Abstract: In a thin film transistor substrate, an active pattern of a thin film transistor includes a lower semiconductor pattern and an upper semiconductor pattern that are patterned through different process steps. The lower semiconductor pattern defines a channel area of the thin film transistor, and the upper semiconductor pattern is connected to a side portion of the lower semiconductor pattern and makes contact with the source electrode and the drain electrode. An etch stop layer is formed on the lower semiconductor pattern corresponding to the channel area, and the etch stop layer is formed through the same patterning process as the lower semiconductor pattern. Also, an ohmic contact pattern is formed on the upper semiconductor pattern, and the ohmic contact pattern is formed by the same patterning process as the upper semiconductor pattern.

Abstract: A thin film transistor, a method of fabricating the same, and an organic light emitting diode display device including the same, which allow a size of a grain of a channel region to be increased, can effectively protect the channel region of a semiconductor layer at the time of etching process, and can reduce processing cost. The thin film transistor includes a substrate, a gate electrode disposed on the substrate, a gate insulating layer disposed on the gate electrode, a semiconductor layer pattern disposed on the gate insulating layer and including a channel region, a source region and a drain region, an etch stop layer pattern disposed on the channel region of the semiconductor layer pattern and having a thickness of 20 to 60nm, and source and drain electrodes disposed on the source and drain regions of the semiconductor layer pattern, respectively.

Abstract: Disclosed herein is a thin film transistor, including: a gate electrode; a crystallized semiconductor layer formed through a gate insulating film on the gate electrode; and a drain electrode and a source electrode provided on both end sides of the crystallized semiconductor layer, respectively, and provided through impurity doped layers each contacting the crystallized semiconductor layer, respectively.

Abstract: A thin-film-transistor (TFT) structure, a pixel structure and a manufacturing method thereof are provided. The TFT structure is formed in the pixel structure of a liquid crystal display (LCD). The TFT structure comprises a gate, a first dielectric layer, a patterned semiconductor layer, a second dielectric layer and a third dielectric layer stacked sequentially. The second dielectric layer and the third dielectric layer are formed on part of the patterned semiconductor layer to define a covered region and an uncovered region on the patterned semiconductor layer. The uncovered region of the second dielectric layer and the third dielectric layer jointly define an opening, which has at least one top lateral dimension and a bottom lateral dimension smaller than the top lateral dimension. Thereby, a lightly doped structure is formed in a portion of the covered region via the second dielectric layer after ion implantation.

Abstract: Disclosed are an organic thin film transistor and a method of manufacturing the same. The organic thin film transistor includes a gate electrode, an insulating layer, an organic semiconductor layer, a protective layer, and source and drain electrodes. The insulating layer is on the gate electrode, and the organic semiconductor layer is on the insulating layer. The protective layer is on the organic semiconductor layer, and includes an electrode pattern part to expose the organic semiconductor layer. The source and drain electrodes are in the electrode pattern part and connected to the organic semiconductor layer.

Abstract: A thin film transistor (TFT), a method of fabricating the same, and display device having the TFT of which the TFT includes a metal catalyst layer disposed on a substrate, a semiconductor layer disposed on the metal catalyst layer, a gate insulating layer disposed on the entire surface of the substrate, a gate electrode disposed on the gate insulating layer at a position corresponding to the semiconductor layer, an interlayer insulating layer disposed on the entire surface of the substrate, and source and drain electrodes disposed on the interlayer insulating layer and connected to the semiconductor layer, wherein the metal catalyst layer includes one of carbon, nitrogen, and halogen. The thin film transistor includes a poly-Si layer that may be formed to a smaller thickness than in conventional deposition methods thereby producing a TFT in which the remaining amount of metal catalyst in a semiconductor layer is reduced.

Abstract: An array substrate for an LCD device includes a first TFT including a first semiconductor layer, a first gate electrode, wherein the first gate electrode is directly over the first semiconductor layer; a first protrusion extending from the first gate electrode along an edge of the first semiconductor layer; a second TFT including a second semiconductor layer, a second gate electrode, wherein the second gate electrode is directly over the second semiconductor layer; a second protrusion extending from the second gate electrode along an edge of the second semiconductor layer; a third TFT connected to crossed data and gate lines including a third semiconductor layer, a third gate electrode, wherein the third gate electrode is directly over the third semiconductor layer; a third protrusion extending from the third gate electrode along an edge of the third semiconductor layer; and a pixel electrode.

Abstract: An impurity element imparting one conductivity type is included in a layer close to a gate insulating film of layers with high crystallinity, so that a channel formation region is formed not in a layer with low crystallinity which is formed at the beginning of film formation but in a layer with high crystallinity which is formed later in a microcrystalline semiconductor film. Further, the layer including an impurity element is used as a channel formation region. Furthermore, a layer which does not include an impurity element imparting one conductivity type or a layer which has an impurity element imparting one conductivity type at an extremely lower concentration than other layers, is provided between a pair of semiconductor films including an impurity element functioning as a source region and a drain region and the layer including an impurity element functioning as a channel formation region.

Abstract: A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device in a high yield are provided. In the thin film transistor, a gate electrode, a gate insulating film, crystal grains that mainly contain silicon and are provided for a surface of the gate insulating film, a semiconductor film that mainly contains germanium and covers the crystal grains and the gate insulating film, and a buffer layer in contact with the semiconductor film that mainly contains germanium overlap with one another. Further, the display device has the thin film transistor.

Abstract: A thin film transistor array substrate includes a gate line formed on a substrate, a data line formed on the substrate intersecting with the gate line to define a pixel region, a thin film transistor formed at the intersection of the gate line and the data line, the thin film transistor including gate electrode formed on the substrate, a gate insulating layer formed on the gate electrode and the substrate, a semiconductor layer formed on the gate insulating layer, an ohmic contact layer on the semiconductor layer, and a source electrode and a drain electrode on the ohmic contact layer, and a transparent electrode material within the pixel region and connected to the drain electrode of the thin film transistor, wherein the gate insulating layer includes a gate insulating pattern underlying the data line and the transparent electrode material, and covering the gate line.

Abstract: Using a lower electrode as a photomask, a lyophobic region having generally the same pattern as that of the lower electrode and a lyophilic region having a pattern which is generally the inversion of the lower electrode pattern are formed on an insulating film. A conductive ink is applied to the lyophobic region and baked. Thus, an upper electrode having a pattern which is generally the inversion of the lower electrode pattern is formed in a self-alignment manner. Therefore no misalignment occurs even if a printing method is used. Thus, a semiconductor device such as an active-matrix thin-film transistor substrate can be fabricated by using a printing method.

Abstract: A semiconductor device includes an insulating substrate and a TFT element disposed on the substrate. The TFT element includes a gate electrode, a gate insulating film, a semiconductor layer, and a source electrode and a drain electrode arranged in that order on the insulating substrate. The semiconductor layer includes an active layer composed of polycrystalline semiconductor and a contact layer segment interposed between the active layer and the source electrode and another contact layer segment interposed between the active layer and the drain electrode. The source and drain electrodes each have a first face facing the opposite face of the active layer from the interface with the gate insulating layer and a second face facing an etched side face of the active layer. Each contact layer segment is disposed between the active layer and each of the first and second faces of the source or drain electrode.

Abstract: A thin film transistor substrate structure for using a horizontal electric field includes a substrate; a gate line and a first common line formed on the substrate parallel to each other from a first conductive layer; a gate insulating film formed on the substrate, the gate line, and the first common line; a data line formed from a second conductive layer on the gate insulating film crossing the gate line and the common line with the gate insulating film therebetween to define a pixel area; a thin film transistor connected to the gate line and the data line; a protective film covering the data line and the thin film transistor; a common electrode formed from a third conductive layer connected to the common line through a hole passing through the protective film and the gate insulating film; and a pixel electrode formed from the second conductive layer connected to the thin film transistor to define a horizontal electric field between the pixel electrode and the common electrode.

Abstract: A thin film transistor (TFT) including a gate, a semiconductor layer, a source and a drain is provided. The gate has a control part, a connection part and a capacitance compensation part. The connection part is disposed between the control part and the capacitance compensation part for joining the two parts together. The semiconductor layer is disposed over the gate, the source and the drain are disposed on the semiconductor layer. An end of the drain overlaps the control part of the gate with a first region for composing a first parasitic capacitance; while another end of the drain overlaps the capacitance compensation part of the gate with a second region for composing a second parasitic capacitance. In a TFT array with the TFT, the sum of the first parasitic capacitance and the second parasitic capacitance is a constant.

Abstract: A field-effect transistor includes source, drain, and gate electrodes; a crystalline or polycrystalline layer of inorganic semiconductor; and a dielectric layer. The layer of inorganic semiconductor has an active channel portion physically extending from the source electrode to the drain electrode. The inorganic semiconductor has a stack of 2-dimensional layers in which intra-layer bonding forces are covalent and/or ionic. Adjacent ones of the layers are bonded together by forces substantially weaker than covalent and ionic bonding forces. The dielectric layer is interposed between the gate electrode and the layer of inorganic semiconductor material. The gate electrode is configured to control a conductivity of an active channel part of the layer of inorganic semiconductor.

Abstract: Embodiments of the invention provide a semiconductor component and a method of manufacture thereof. A semiconductor component comprises: a gate electrode layer adjacent a substrate, and a gate dielectric layer adjacent the gate electrode layer. The gate dielectric layer comprises a monolayer of at least one compound, wherein the compound has an aromatic or a condensed aromatic molecular group. The molecular group is capable of ?-? interactions, which stabilize the monolayer. In an embodiment, the semiconductor component is an organic field effect transistor (OFET). In an embodiment of the invention, a method includes forming the monolayer using a liquid phase immersion process.

Abstract: A polysilicon thin film transistor device includes a gate metal pattern including a gate electrode and a gate line formed on a substrate, the gate metal pattern having a stepped portion, a gate insulating film formed on the gate metal pattern, a polysilicon semiconductor layer formed on the gate insulating film, the polysilicon semiconductor layer including an active region, lightly doped drain regions, a source region, and a drain region, a source electrode connected to the source region and a drain electrode connected to the drain region on the polysilicon semiconductor layer, and a pixel electrode connected with the drain electrode.

Abstract: A flat panel display lowering an on-current of a driving thin film transistor (TFT), maintaining high switching properties of a switching TFT, maintaining uniform brightness using the driving TFT, and maintaining a life span of a light emitting device while the same voltages are applied to the switching TFT and the driving TFT without changing a size of an active layer. The flat panel display has a light emitting device, a switching thin film transistor including a semiconductor active layer having at least a channel area for transferring a data signal to the light emitting device, and a driving thin film transistor including a semiconductor active layer having at least a channel area for driving the light emitting device so that a predetermined current flows through the light emitting device according to the data signal, the channel areas of the switching TFT and the driving TFT having different directions of current flow.

Abstract: A semiconductor device in accordance with the present invention is equipped with a gate electrode 10 formed on a BOX layer 2, a gate oxide film 11 formed on the gate electrode, a body region 12a composed of epitaxial Si formed on the gate oxide film, diffusion layers 18 and 19 for source/drain regions formed on both sides of the body region, and a body terminal connected to the body region for applying a specified potential to the body region. As a result, the substrate floating effect is suppressed even in a transistor having a short gate length and a long gate width.