Abstract: Methods for producing the amorphous metal oxide semiconductor layer where amorphous metal oxide semiconductor layer is formed by use of a precursor composition containing a metal salt, a primary amide, and a water-based solution. The methodology for producing the amorphous metal oxide semiconductor layer includes applying the precursor composition onto a substrate to form a precursor film, and firing the film at a temperature of 150° C. or higher and lower than 300° C.

Abstract: A process for forming an antimony-doped silicon-containing layer includes: (a) depositing by chemical vapor deposition the antimony-doped silicon-containing layer above a semiconductor structure, using an antimony source gas and a silicon source gas or a combination of the silicon source gas and a germanium source gas; and (b) annealing the antimony-doped silicon-containing layer at a temperature of no greater than 800° C. The antimony source gas may include one or more of: trimethylantimony (TMSb) and triethylantimony (TESb). The silicon source gas comprises one or more of: silane, disilane, trichlorosilane, (TCS), dichlorosilane (DCS), monochlorosilane (MCS), methylsilane, and silicon tetrachloride. The germanium source gas comprises germane.

Abstract: An organic light-emitting device and an apparatus including the organic light-emitting device.

Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor layer on an insulating layer, epitaxially growing a first layer on the semiconductor layer, wherein the first layer has a first doping concentration, epitaxially growing a second layer on the semiconductor layer, wherein the second layer has a second doping concentration higher than the first doping concentration, forming a gate dielectric over an active region of the semiconductor layer, forming a gate electrode on the gate dielectric, and forming a plurality of source/drain contacts to the second layer, wherein the first and second layers comprise crystalline hydrogenated silicon (c-Si:H).

Abstract: It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulting film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulting film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film.

Abstract: According to one embodiment, a semiconductor device includes a substrate, a gate electrode, source/drain regions, and a gate insulating film. The substrate is made of monocrystalline silicon, an upper surface of the substrate is a (100) plane, and a trench is made in the upper surface. The gate electrode is provided in at least an interior of the trench. The source/drain regions are formed in regions of the substrate having the trench interposed. The gate insulating film is provided between the substrate and the gate electrode. The trench includes a bottom surface made of a (100) plane, a pair of oblique surfaces made of (111) planes contacting the bottom surface, and a pair of side surfaces made of (110) planes contacting the oblique surfaces. The source/drain regions are in contact with the side and oblique surfaces and are apart from a central portion of the bottom surface.

Abstract: To reduce parasitic capacitance between a gate electrode and a source electrode or drain electrode of a dual-gate transistor. A semiconductor device includes a first insulating layer covering a first conductive layer; a first semiconductor layer, second semiconductor layers, and an impurity semiconductor layer sequentially provided over the first insulating layer; a second conductive layer over and at least partially in contact with the impurity semiconductor layer; a second insulating layer over the second conductive layer; a third insulating layer covering the three semiconductor layers, the second conductive layer, and the second insulating layer; and a third conductive layer over the third insulating layer. The third conductive layer overlaps with a portion of the first semiconductor layer, which does not overlap with the second semiconductor layers, and further overlaps with part of the second conductive layer.

Abstract: A gate structure of a non-volatile memory device and a method of forming the same including a tunnel oxide layer pattern, a charge trap layer pattern, a blocking dielectric layer pattern having the uppermost layer including a material having a first dielectric constant greater than that of a material included in the tunnel oxide layer pattern, and first and second conductive layer patterns. The gate structure includes a first spacer to cover at least the sidewall of the second conductive layer pattern. The gate structure includes a second spacer covering the sidewall of the first spacer and the sidewall of the first conductive layer pattern and including a material having a second dielectric constant equal to or greater than the first dielectric constant. In the non-volatile memory device including the gate structure, erase saturation caused by back tunneling is reduced.

Abstract: A transistor that may be used in electronic displays to selectively activate one or more pixels. The transistor includes a metal layer, a silicon layer deposited on at least a portion of the metal layer, the silicon layer includes an extension portion that extends a distance past the metal layer, and at least three lightly doped regions positioned in the silicon layer. The at least three lightly doped regions have a lower concentration of doping atoms than other portions of the silicon layer forming the transistor.

Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.

Abstract: A thin film transistor which may be included in a pixel circuit includes: a substrate; a semiconductor layer formed on the substrate and including a source region, a first drain region spaced apart from the source region by a first current path, and a second drain region spaced apart from the source region by a second current path having a length different from that of the first current path; a gate electrode insulated from the semiconductor layer by a gate insulating layer; a source electrode connected to the source region of the semiconductor layer; a first drain electrode connected to the first drain region of the semiconductor layer; and a second drain electrode connected to the second drain region of the semiconductor layer. Currents having different magnitudes may be simultaneously provided through the first current path and the second current path.

Abstract: The semiconductor device of the present invention includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.

Abstract: A semiconductor device includes a semiconductor layer on a substrate, a gate electrode electrically insulated from the semiconductor layer by a gate insulating layer, an insulating layer on the gate insulating layer and on the gate electrode, and a source electrode and a drain electrode on the insulating layer, the source and drain electrode being connected to the semiconductor layer. The source electrode overlaps at least a part of the gate electrode. The source electrode, the insulating layer, and the gate electrode overlap each other so as to provide a capacitor.

Abstract: An exemplary aspect of the present invention is a thin film transistor including: a gate electrode formed on a substrate; a gate insulating film that includes a nitride film and covers the gate electrode; and a semiconductor layer that is disposed to be opposed to the gate electrode with the gate insulating film interposed therebetween, and has a microcrystalline semiconductor layer formed in at least an interface in contact with the nitride film, in which the microcrystalline semiconductor layer contains oxygen at a concentration higher than that of contained nitrogen in at least the vicinity of the interface with the nitride film, the nitrogen being diffused from the nitride film.

Abstract: A semiconductor arrangement is disclosed. One embodiment includes a first semiconductor layer including a first and second component zone that form a pn-junction or a Schottky-junction. A second semiconductor layer includes a drift control zone adjacent to the second component zone. A dielectric layer separates the first semiconductor layer from the second semiconductor layer. A rectifying element is coupled between the drift control zone and the second component zone.

Abstract: A semiconductor element of the electric circuit includes a semiconductor layer over a gate electrode. The semiconductor layer of the semiconductor element is formed of a layer including polycrystalline silicon which is obtained by crystallizing amorphous silicon by heat treatment or laser irradiation, over a substrate. The obtained layer including polycrystalline silicon is also used for a structure layer such as a movable electrode of a structure body. Therefore, the structure body and the electric circuit for controlling the structure body can be formed over one substrate. As a result, a micromachine can be miniaturized. Further, assembly and packaging are unnecessary, so that manufacturing cost can be reduced.

Abstract: An OLED display including a substrate main body; a first gate electrode and a second semiconductor layer; a gate insulating layer on the first gate electrode and the second semiconductor layer; a first semiconductor layer and a second gate electrode overlying the first gate electrode and the second semiconductor layer, respectively; etching stopper layers contacting portions of the first semiconductor layer; an interlayer insulating layer on the first semiconductor layer and the second gate electrode and including contact holes exposing the plurality of etching stopper layers, respectively; a first source electrode and a first drain electrode on the interlayer insulating layer and the contact holes being indirectly connected to the first semiconductor layer via the etching stopper layers or directly connected to the first semiconductor layer; and a second source electrode and a second drain electrode on the interlayer insulating layer being connected to the second semiconductor layer.

Abstract: A thin-film transistor according to the present disclosure includes: a substrate; a gate electrode above the substrate; a gate insulating layer on the gate electrode; a channel layer on the gate insulating layer which is located on the gate electrode; a source electrode above the channel layer; a drain electrode above the channel layer; and a barrier layer between the channel layer and the source electrode and between the channel layer and the drain electrode. Each of the source electrode and the drain electrode is made of a metal including copper, and the barrier layer contains nitrogen and molybdenum and has a density greater than 7.5 g/cm3 and less than 10.5 g/cm3.

Abstract: An object is to provide a manufacturing method of a microcrystalline silicon film with improved adhesion between an insulating film and the microcrystalline silicon film. The microcrystalline silicon film is formed in the following manner. Over an insulating film, a microcrystalline silicon grain having a height that allows the microcrystalline silicon grain to be completely oxidized by later plasma oxidation (e.g., a height greater than 0 nm and less than or equal to 5 nm), or a microcrystalline silicon film or an amorphous silicon film having a thickness that allows the microcrystalline silicon film or the amorphous silicon film to be completely oxidized by later plasma oxidation (e.g., a thickness greater than 0 nm and less than or equal to 5 nm) is formed.

Abstract: Methods of producing high uniformity in thin film transistor devices fabricated on laterally crystallized thin films are described. A thin film transistor (TFT) includes a channel area disposed in a crystalline substrate, which has grain boundaries that are approximately parallel with each other and are spaced apart with approximately equal spacings. The shape of the channel area includes a non-equiangular polygon that has two opposing side edges that are oriented substantially perpendicular to the grain boundaries. The polygon further has an upper edge and a lower edge. At least a portion of each of the upper and lower edges is oriented at a tilt angle with respect to the grain boundaries. The tilt angles are selected such that the number of grain boundaries covered by the polygon is independent of the location of the channel area within the crystalline substrate.

Abstract: It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulating film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film.

Abstract: A method for producing a solid-state semiconducting structure, includes steps in which: (i) a monocrystalline substrate is provided; (ii) a monocrystalline oxide layer is formed, by epitaxial growth, on the substrate; (iii) a bonding layer is formed by steps in which: (a) the impurities are removed from the surface of the monocrystalline oxide layer; (b) a semiconducting bonding layer is deposited by slow epitaxial growth; and (iv) a monocrystalline semiconducting layer is formed, by epitaxial growth, on the bonding layer so formed. The solid-state semiconducting heterostructures so obtained are also described.

Abstract: A semiconductor device (130) includes: a bonding substrate (100); a thin film element (80) formed on the bonding substrate (100); and a semiconductor element (90) bonded to the bonding substrate (100), the semiconductor element (90) including semiconductor element main body (50) and a plurality of underlying layers (51-54) stacked on a side of the semiconductor element main body (50) facing the bonding substrate (100), and each of the underlying layers (51-54) including an insulating layer and a circuit pattern in the insulating layer, wherein an end of the semiconductor element (90) facing the thin film element (80) is provided in a stepped form so that the closer to the bonding substrate the underlying layers arc, the farther ends of the underlying layers facing the thin film element protrude, the end of the semiconductor element (90) is covered with a resin layer (120), and the thin film element (80) is connected to the semiconductor element main body (50) via a connection line (121a) provided on the resin

Abstract: Systems, methods, and products of processes consistent with the innovations herein relate to aspects involving crystallization of layers on substrates. In one exemplary implementation, there is provided a method of fabricating a device. Moreover, such method may include placing an amorphous/poly material on a substrate and heating the material via a sub-melt laser anneal process to transform the material into crystalline form.

Abstract: A thin film transistor includes an active layer on a substrate and crystallized through growth of crystals due to an action of metal catalysts, a gate insulating layer pattern on a part of the active layer; a gate electrode on a part of the gate insulating layer pattern; an anti-etching layer pattern formed on the gate insulating layer pattern to cover the gate electrode, the anti-etching layer pattern being coextensive with the gate insulating layer pattern; a source electrode and a drain electrode on the active layer and the anti-etching layer pattern; and gettering layer patterns between the active layer and the anti-etching layer pattern and between the source electrode and the drain electrode to eliminate the metal catalysts used for crystallization of the active layer, the gettering layer patterns being coextensive with the source electrode and drain electrode.

Abstract: A thin film transistor and a press sensing device using the thin film transistor are disclosed. The thin film transistor, comprises a source electrode; a drain electrode spaced from the source electrode; a semiconductor layer electrically connected with the source electrode and the drain electrode, a channel defined in the semiconductor layer and located between the source electrode and the drain electrode; and a gate electrode electrically insulated from the semiconductor layer; and an insulative layer configured for insulating the source electrode, the drain electrode, and the semiconductor layer from each other, wherein the insulative layer is made of a polymeric material with an elastic modulus ranged from about 0.1 megapascal (MPa) to about 10 MPa.

Abstract: The present invention includes methods for stressing transistor channels of semiconductor device structures. Such methods include the formation of so-called near-surface “nanocavities” adjacent to the source/drain regions, forming extensions of the source/drain regions adjacent to and including the nanocavities, and implanting matter of a type that will expand or contract the volume of the nanocavities, depending respectively upon whether compressive strain is desirable in transistor channels between the nanocavities, as in PMOS field effect transistors, or tensile strain is wanted in transistor channels, as in NMOS field effect transistors, to enhance carrier mobility and transistor speed. Semiconductor device structures and semiconductor devices including these features are also disclosed.

Abstract: The present invention provides a manufacturing method of a semiconductor device, which is able to improve on-current and mobility of a polycrystal TFT without disturbing a high integration level, and also provide a semiconductor device obtained in accordance with the manufacturing method.

Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.

Abstract: One or more embodiments of the disclosed technology provide a thin film transistor, an array substrate and a method for preparing the same. The thin film transistor comprises a base substrate, and a gate electrode, a gate insulating layer, an active layer, an ohmic contact layer, a source electrode, a drain electrode and a passivation layer prepared on the base substrate in this order. The active layer is formed of microcrystalline silicon, and the active layer comprises an active layer lower portion and an active layer upper portion, and the active layer lower portion is microcrystalline silicon obtained by using hydrogen plasma to treat at least two layers of amorphous silicon thin film prepared in a layer-by-layer manner.

Abstract: A thin film transistor including a lightly doped drain (LDD) region or offset region, wherein the thin film transistor is formed so that primary crystal grain boundaries of a polysilicon substrate are not positioned in the LDD or offset region.

Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming an amorphous semiconductor film on a substrate. The method further includes annealing the amorphous semiconductor film by irradiating the substrate with a microwave to form a polycrystalline semiconductor film from the amorphous semiconductor film. The method further includes forming a transistor whose channel is the polycrystalline semiconductor film.

Abstract: Paper embedded with a semiconductor device capable of communicating wirelessly is realized, whose unevenness of a portion including the semiconductor device does not stand out and the paper is thin with a thickness of less than or equal to 130 ?m. A semiconductor device is provided with a circuit portion and an antenna, and the circuit portion includes a thin film transistor. The circuit portion and the antenna are separated from a substrate used during manufacturing, and are interposed between a flexible base and a sealing layer and protected. The semiconductor device can be bent, and the thickness of the semiconductor device itself is less than or equal to 30 ?m. The semiconductor device is embedded in a paper in a papermaking process.

Abstract: An object of the invention is to provide a method for manufacturing a light emitting device capable of reducing deterioration of elements due to electrostatic charge caused in manufacturing the light emitting device. Another object of the invention is to provide a light emitting device in which defects due to the deterioration of elements caused by the electrostatic charge are reduced. The method for manufacturing the light emitting device includes a step of forming a top-gate type transistor for driving a light emitting element. In the step of forming the top-gate type transistor, when processing a semiconductor layer, a first grid-like semiconductor layer extending in rows and columns is formed over a substrate. The plurality of second island-like semiconductor layers are formed between the first semiconductor layer. The plurality of second island-like second semiconductor layers serve as an active layer of the transistor.

Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.

Abstract: An organic light-emitting display apparatus includes a substrate, a thin film transistor, a reflective layer, and an organic emission device. The thin film transistor includes an active layer patterned on the substrate at a predetermined interval, a gate electrode, and source/drain electrodes. The reflective layer is between the substrate and the active layer. The organic emission device has sequentially stacked therein a pixel electrode electrically connected to the TFT, an intermediate layer including an emission layer, and an opposing electrode.

Abstract: A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.

Abstract: An integrated circuit device that is secure from invasion and related methods are disclosed herein. Other embodiments are also disclosed herein.

Abstract: A field emission pixel includes a cathode on which a field emitter emitting electrons is formed, an anode on which a phosphor absorbing electrons from the field emitter is formed, and a thin film transistor (TFT) having a source connected to a current source in response to a scan signal, a gate receiving a data signal, and a drain connected to the field emitter. The field emitter is made of carbon material such as diamond, diamond like carbon, carbon nanotube or carbon nanofiber. The cathode may include multiple field emitters, and the TFT may include multiple transistors having gates to which the same signal is applied, sources to which the same signal is applied, and drains respectively connected to the field emitters. An active layer of the TFT is made of a semiconductor film such as amorphous silicon, micro-crystalline silicon, polycrystalline silicon, wide-band gap material like ZnO, or an organic semiconductor.

Abstract: A thin film transistor including: a substrate; an active layer formed over the substrate; a gate insulating layer formed over the active layer; a gate electrode formed over the gate insulating layer; an interlayer insulating layer formed over the gate electrode; and source and drain electrodes that contact the active layer via the interlayer insulating layer. The source and drain electrodes may have a structure including an aluminum (Al) layer, an aluminum-nickel alloy (AlNiX) layer, and an indium tin oxide (ITO) layer, which are sequentially stacked.

Abstract: A thin film transistor and a manufacturing method thereof are provided. An insulating pattern layer having at least one protrusion is formed on a substrate. Afterwards, at least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. Later, the spacer and the amorphous semiconductor patterns are crystallized. Subsequently, the protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. Then, a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract: A semiconductor device has a substrate, a gate dielectric layer, and a metal gate electrode on the gate dielectric layer. The gate dielectric layer includes an oxide layer having a dielectric constant (k) greater than 4, and silicon concentrated at interfaces of the oxide layer with the substrate and with the metal gate electrode. A method of fabricating a semiconductor device includes forming a removable gate over a substrate with a gate dielectric layer between the removable gate and the substrate, forming a dielectric layer over the substrate and exposing an upper surface of the removable gate, removing the removable gate leaving an opening in the dielectric layer, forming a protective layer on the gate dielectric layer and lining the opening, and forming a metal gate electrode in the opening. The protective layer has a graded composition between the gate dielectric layer and the metal gate electrode.

Abstract: A display device includes a display panel which forms a plurality of sub pixels on a substrate thereof, and a drive circuit which is configured to drive the plurality of sub pixels, wherein the drive circuit has a thin film transistor formed on the substrate, and the thin film transistor has a semiconductor layer made of poly-silicon. The thin film transistor includes: a source electrode, a semiconductor layer and a drain electrode which are formed on the substrate; a gate insulation film which is formed on the source electrode, the semiconductor layer and the drain electrode; a gate electrode which is formed on the gate insulation film and above the semiconductor layer; an insulation film which is formed on the gate electrode; and a metal layer which is formed on the insulation film in a state that the metal layer covers at least a portion of the gate electrode.

Abstract: An electronic device includes: a substrate; and a plurality of thin film transistors disposed in lines at least in one direction in terms of planar view when viewed from one principal surface of the substrate; each of the plurality of thin film transistors including a preliminary heating layer on the substrate, an insulating layer on the preliminary heating layer, and a thin film semiconductor layer a part of which overlaps the preliminary heating layer through the insulating film, wherein a portion of the preliminary heating layer other than the portion overlapping the thin film semiconductor layer has a planar shape which is line-symmetrical with respect to an axis extending in a direction perpendicularly intersecting the one direction.

Abstract: A thin film transistor with excellent electric characteristics and a display device having the thin film transistor are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode; a microcrystalline semiconductor film including an impurity element which serves as a donor, formed over the gate insulating film; a buffer layer formed over the microcrystalline semiconductor film; a pair of semiconductor films to which an impurity element imparting one conductivity type is added, formed over the buffer layer; and wirings formed over the pair of semiconductor films. The concentration of the impurity element which serves as a donor in the microcrystalline semiconductor film is decreased from the gate insulating film side toward the buffer layer, and the buffer layer does not include the impurity element which serves as a donor at a higher concentration than the detection limit of SIMS.

Abstract: A thin film transistor and a fabrication method thereof, in which one excimer laser annealing (ELA) makes a pixel portion and a driver portion different from each other in surface roughness and grain size.

Abstract: An organic electroluminescent device includes first and second substrates facing and spaced apart from each other; a gate line on the first substrate; a data line intersecting the gate line to define a pixel region; a switching element connected to the gate line and the data line; an organic electroluminescent diode on the second substrate; and a driving element connected to the switching element and the organic electroluminescent diode, the driving element including a plurality of driving negative-type polycrystalline silicon thin film transistors connected to the organic electroluminescent diode in parallel.

Abstract: A semiconductor component including a lateral transistor component is disclosed. One embodiment provides an electrically insulating carrier layer. A first and a second semiconductor layer are arranged on above another and are separated from another by a dielectric layer. The first semiconductor layer includes a polycrystalline semiconductor material, an amorphous semiconductor material or an organic semiconductor material. In the first semiconductor layer: a source zone, a body zone, a drift zone and a drain zone are provided. In the second semiconductor layer; a drift control zone is arranged adjacent to the drift zone, including a control terminal at a first lateral end for applying a control potential, and is coupled to the drain zone via a rectifying element at a second lateral end. A gate electrode is arranged adjacent to the body zone and is dielectrically insulated from the body zone by a gate dielectric layer.

Abstract: A first shape of semiconductor region having on its one side a plurality of sharp convex top-end portions is formed first and a continuous wave laser beam is used for radiation from the above region so as to crystallize the first shape of semiconductor region. A continuous wave laser beam condensed in one or plural lines is used for the laser beam. The first shape of semiconductor region is etched to form a second shape of semiconductor region in which a channel forming region and a source and drain region are formed. The second shape of semiconductor region is disposed so that a channel forming range would be formed on respective crystal regions extending from the plurality of convex end portions. A semiconductor region adjacent to the channel forming region is eliminated.

Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.