Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.

Abstract: A method for producing of at least one photovoltaic cell includes successively the anisotropic etching of a surface of a crystalline silicon substrate and the isotropic etching treatment of said surface. The isotropic etching treatment includes at least two successive operations respectively consisting in forming a silicon oxide thin film with a controlled average thickness, ranging between 10 nm and 500 nm and in removing said thin film thus-formed. The operation consisting in forming a silicon oxide thin film on the face of the substrate is carried out by a thermally activated dry oxidation. Such a method makes it possible to improve the surface quality of the surface of the substrate once said surface is etched in an anisotropic way.

Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.

Abstract: A gate driver on array of a display includes a substrate having a peripheral region, and a gate driver on array structure formed in the peripheral region. The gate driver on array structure includes a pull-down transistor, and the pull-down transistor has a gate electrode, an insulating layer, a semiconductor island, a source electrode, and a drain electrode. The semiconductor island extends out of both edges of the gate electrode, and extends out of an edge of the source electrode and an edge of the drain electrode.

Abstract: A transparent photodetector. The transparent photodetector includes a substrate; a waveguide on the substrate; a displaceable structure that can be displaced with respect to the substrate, the displaceable structure in proximity to the waveguide; and a silicon nanowire array suspended with respect to the substrate and mechanically linked to the displaceable structure, the silicon nanowire array comprising a plurality of silicon nanowires having piezoresistance. In operation, a light source propagating through the waveguide results in an optical force on the displaceable structure which further results in a strain on the nanowires to cause,a change in electrical resistance of the nanowires. The substrate may be a semiconductor on insulator substrate.

Abstract: A semiconductor structure is provided and a method for manufacturing said structure. The semiconductor structure includes a thin film semiconductor having an active region and placed on a diamond substrate. The thin film semiconductor is preferably directly bonded to the diamond layer, or may be adhered thereto by a dielectric adhesion.

Abstract: Apparatuses and methods for manufacturing a solar cell are disclosed. In a particular embodiment, the solar cell may be manufactured by disposing a solar cell in a chamber having a particle source; disposing a patterned assembly comprising an aperture and an assembly segment between the particle source and the solar cell; and selectively implanting first type dopants traveling through the aperture into a first region of the solar cell while minimizing introduction of the first type dopants into a region outside of the first region.

Abstract: To provide a photoelectric conversion device with less metal contamination and surface detects, and a manufacturing method thereof. The photoelectric conversion device is formed in the following manner: a surface of the single crystal silicon substrate is soaked in an alkaline solution to perform etching so that unevenness including a plurality of minute projections each having a substantially square pyramidal shape and a depression formed between the adjacent projections are formed; then, the single crystal silicon substrate having the unevenness is soaked in a mixed acid solution to perform etching so that at a cross section including a vertex of the projection and dividing each of a surface of the projection and a surface facing the aforementioned surface into two equal parts, the vertex of the projection forms an obtuse angle, and a bottom of the depression has a curved surface.

Abstract: A mesa photodiode which includes a mesa, the sidewall of the mesa is a surface that is inclined in the direction in which the bottom of the mesa becomes wider. At least the sidewall of the mesa is covered with a semiconductor layer of a first conductivity type, a second conductivity type, a semi-insulating type, or an undoped type. The semiconductor layer is grown on at least the sidewall of the mesa. The inclined angle of the inclined surface of the mesa at the upper end portion is smaller than the inclined angle of the inclined surface of the mesa at the lower end portion.

Abstract: A method of fabricating a solar cell is provided. A first type substrate having a first surface and a second surface is provided. A first doping process is performed on the first surface of the first type substrate by using a first dopant, so as to form a first type lightly doped layer. A second doping process is performed on a portion of the first type lightly doped layer by using a second dopant, so as to form a second type heavily doped region. A molecular weight of the second dopant is larger than a molecular weight of the first dopant, and a temperature of the first doping process is higher than a temperature of the second doping process. A first electrode is formed on the second type heavily doped region. A second electrode is formed on the second surface of the first type substrate.

Abstract: An octagonal structure of photodiodes using standard CMOS technology has been developed to serve as a de-multiplexer for spatially multiplexed fiber optic communication systems.

Abstract: A third semiconductor layer 14 is formed on a light receiving surface 13a of a second semiconductor layer 13 so as to cover the light receiving surface 13a of the second semiconductor layer 13 at least partially in a plan view. A first semiconductor layer 10 is formed on an opposite surface of the light receiving surface 13a of the second semiconductor layer 13 so as to overlap the light receiving surface 13a and the third semiconductor layer 14 at least partially in a plan view. In the second semiconductor layer 13, the relative light receiving sensitivity to respective wavelengths of light has the highest value at a wavelength in an infrared region.

Abstract: A solar cell module comprises a rear contact solar cell in which positive (+) and negative (?) electrode patterns are alternately formed on a rear surface of a solar cell; insulating layers formed on both sides of the rear surface of the solar cell to be vertical to the electrode patterns; and a pair of conductive pattern bars that is disposed in a gap between both sides of the rear surface of the solar cell. Each conductive pattern bar includes a stem part formed on the each insulating layer and a plurality of branch parts extending from the stem part to be electrically connected to the same electrode patterns on the rear surface of the solar cell; and an encapsulant layer that protects the conductive pattern bars and at least the rear surface of the solar cell.

Abstract: A photodiode array includes a substrate of a common read-out control circuit; and a plurality of photodiodes arrayed on the substrate and each including an absorption layer, and a pair of a first conductive-side electrode and a second conductive-side electrode. In this photodiode array, each of the photodiodes is isolated from adjacent photodiodes, the first conductive-side electrodes are provided on first conductivity-type regions and electrically connected in common across all the photodiodes, and the second conductive-side electrodes are provided on second conductivity-type regions and individually electrically connected to read-out electrodes of the read-out control circuit.

Abstract: A method for fabricating an integrated device, the method including, overlying a first crystalline layer onto a second crystalline layer to form a combined layer, wherein one of the first and second crystalline layers is an image sensor layer and at least one of the first and second crystalline layers has been transferred by performing an atomic species implantation, and wherein at least one of the first and second crystalline layers includes single crystal transistors.

Abstract: A stacked structure may include semiconductors or semiconductor layers grown on an amorphous substrate. A light-emitting device and a solar cell may include the stacked structure including the semiconductors grown on the amorphous substrate. A method of manufacturing the stacked structure, and the light-emitting device and the solar cell including the stacked structure may involve growing a crystalline semiconductor layer on an amorphous substrate.

Abstract: A method of fabricating a hot carrier energy conversion structure, and a hot carrier energy conversion structure. The method comprises forming an energy selective contact ESC comprising a tunnelling layer; forming a carrier generation layer on the ESC; and forming a semiconductor contact without a tunnelling layer on the carrier generation layer.

Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.

Abstract: In one aspect, a method includes forming a pit in a top surface of a substrate by removing a portion of the substrate and growing a semiconductor material with a bottom surface on the pit, the semiconductor material different than the material of the substrate. The pit has a base recessed in the top surface of the substrate. In another aspect, a structure includes a substrate having a top surface, the substrate including at least one pit having a base lower than the top surface of the substrate, and a semiconductor material having a bottom surface formed on the base of the pit.

Abstract: A solid-state imaging device includes a plurality of photoelectric conversion portions each provided to correspond to each of a plurality of pixels in a semiconductor substrate and receiving incident light through a light sensing surface, and a pixel separation portion that is embedded into a trench provided on a side portion of the photoelectric conversion portion and electrically separates the plurality of pixels in a side of an incident surface of the semiconductor substrate into which the incident light enters. The pixel separation portion is formed by an insulation material which absorbs the incident light entering the light sensing surface.

Abstract: Certain embodiments provide a method of manufacturing an organic thin film solar cell comprising forming, on a first electrode, a first transport layer having an uneven pattern and a photoelectric conversion layer provided on a surface of the uneven pattern, forming a second transport layer on a second electrode, and bringing the uneven pattern having the photoelectric conversion layer is formed thereon into contact with the second transport layer to mold the second transport layer.

Abstract: The invention discloses a solar substrate with high fracture strength. The solar substrate according to the invention comprises an upper surface, a plurality of first protrusions and a plurality of first recess regions. The first protrusions are formed on the upper surface and each of the plurality of first recess regions being formed on the surrounding of the plurality of first protrusions, such that the deflection required to crack the solar substrate by bending thereto being increased in comparison with the solar substrate without the plurality of first protrusions and first recess regions formed thereon. By the combination of the protrusions and the recess regions, the fracture strength of the solar substrate is enhanced for enduring a high tension.

Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.

Abstract: A solid-state image pickup device includes a photoelectric conversion portion, a charge holding portion configured to include a first-conductivity-type first semiconductor region, and a transfer portion configured to include a transfer gate electrode that controls a potential between the charge holding portion and a sense node. The charge holding portion includes a control electrode. A second-conductivity-type second semiconductor region is disposed on a surface of a semiconductor region between the control electrode and the transfer gate electrode. A first-conductivity-type third semiconductor region is disposed under the second semiconductor region. The third semiconductor region is disposed at a deeper position than the first semiconductor region.

Abstract: A method of fabricating a frontside-illuminated inverted quantum well infrared photodetector may include providing a quantum well wafer having a bulk substrate layer and a quantum material layer, wherein the quantum material layer includes a plurality of alternating quantum well layers and barrier layers epitaxially grown on the bulk substrate layer. The method further includes applying at least one frontside common electrical contact to a frontside of the quantum well wafer, bonding a transparent substrate to the frontside of the quantum well wafer, thinning the bulk substrate layer of the quantum well wafer, and etching the quantum material layer to form quantum well facets that define at least one pyramidal quantum well stack. A backside electrical contact may be applied to the pyramidal quantum well stack. In one embodiment, a plurality of quantum well stacks is bonded to a read-out integrated circuit of a focal plane array.

Abstract: Techniques for fabricating nanowire/microwire-based solar cells are provided. In one, a method for fabricating a solar cell is provided. The method includes the following steps. A doped substrate is provided. A monolayer of spheres is deposited onto the substrate. The spheres include nanospheres, microspheres or a combination thereof. The spheres are trimmed to introduce space between individual spheres in the monolayer. The trimmed spheres are used as a mask to pattern wires in the substrate. The wires include nanowires, microwires or a combination thereof. A doped emitter layer is formed on the patterned wires. A top contact electrode is deposited over the emitter layer. A bottom contact electrode is deposited on a side of the substrate opposite the wires.

Abstract: An image sensor and a method of fabricating the same are provided. A pad region is disposed on a substrate. The pad region has a higher concentration of impurity ions than the substrate. The pad region is selectively removed using the substrate as an etch mask, thereby forming a hole. A conductive pad is formed in the hole of the substrate.

Abstract: An image sensor having a pixel array comprises periphery elements formed over a substrate, an oxide layer formed over the periphery elements, an epitaxial layer formed in an opening in the oxide layer in a pixel array area, and a plurality of photosensitive elements of the pixel array formed in the epitaxial layer. Formation of an initial metallization layer occurs after the formation of the photosensitive elements in the epitaxial layer. The photosensitive elements can thus be formed in the epitaxial layer at a higher level within an image sensor stack than that of the initial metallization layer. This advantageously allows stack height and pixel size to be reduced, and fill factor to be increased. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Abstract: In one aspect, the present disclosure relates to a device including a silicon substrate, wherein at least a portion of the substrate surface can be a silicon nanowire array; and a layer of alumina covering the silicon nanowire array. In some embodiments, the device can be a solar cell. In some embodiments, the device can be a p-n junction. In some embodiments, the p-n junction can be located below the bottom surface the nanowire array.

Abstract: An image sensor and methods of use the image sensor, methods of manufacturing the image sensor, and apparatuses comprising the image sensor are disclosed. The image sensor has pixels includes at least one nanopillar with a gate electrode surrounding the at least one nanopillar, wherein the at least one nanopillar is adapted to convert light impinging thereon to electrical signals and the gate electrode is operable to pinch off or allow current flow through the at least one nanopillar. The image sensor can have a plurality of pixels arranged in an individually addressable fashion. The at least one nanopillar has a cladding. A refractive index of the cladding being smaller than a refractive index of the nanopillar.

Abstract: A monolithic semiconductor solar cell including a semiconductor layer including a plurality of pores, wherein walls of the pores are doped, forming vertical junctions between the walls of the pores and a bulk of the semiconductor, the pores each contain a conductor which is in electrical contact with the walls of the pores, and the conductors of the pores are electrically interconnected to provide an output voltage of the solar cell. A monolithic semiconductor solar cell including a semiconductor layer including a plurality of trenches, wherein walls of the trenches are doped, forming vertical junctions between the walls of the trenches and a bulk of the semiconductor, the trenches each contain a conductor which is in electrical contact with the walls of the trenches, and the conductors of the trenches are electrically interconnected to provide an output voltage of the solar cell. Related apparatus and methods are also described.

Abstract: A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material.

Abstract: A photoelectric conversion device is provided wherein variance of photoelectric conversion efficiency within a panel plane is reduced. A method of manufacturing a photoelectric conversion device having a microcrystalline silicon photoelectric conversion unit (104) which has a layered structure including a p-type layer (40), an i-type layer (42) including a microcrystalline silicon layer which serves as a power generating layer, and an n-type layer (44) is provided, the method comprising a step of forming the i-type layer (42), wherein a first i-type layer (42a) is formed and a second i-type layer (42b) is formed over the first i-type layer (42a) under a condition that a crystallization percentage is higher than that of the first i-type layer (42a) and an in-plane distribution of the crystallization percentage is lower than that of the first i-type layer.

Abstract: In the existent method for manufacturing a solar cell, manufacture of a solar cell having a quantum well having a crystalline well layer and capable of controlling the thickness of the well layer was difficult. A quantum well having an amorphous well layer, comprising a barrier layer and an amorphous well layer is formed and then the quantum well having the amorphous well layer is annealed thereby crystallizing the amorphous well layer to form a quantum well having a crystalline well layer. By applying energy density applied to the amorphous well layer at an energy density of 1.26 J/mm2 or more and 28.8 J/mm2 or less, the crystalline well layer can be formed and the lamination structure of the quantum well can be maintained simultaneously.

Abstract: A method for manufacturing an image sensor, wherein the method comprises several steps as follows: A semiconductor base doped with dopants having a first-type electrical conductivity is provided, wherein the semiconductor base comprises a handle wafer, an oxide insulator disposed on the handle wafer, and a silicon layer disposed on the oxide insulator. A front end process is then conducted, to form at least one imaging pixel disposed in the silicon layer and at least one metal layer disposed on the imaging pixel, whereby the first-type electrical dopants can be driven into the silicon layer to form a doping layer with the first-type electrical conductivity over the oxide insulator.

Abstract: A method includes forming a plurality of mirror periods, stacking the mirror periods, and bonding the mirror periods together to form a high reflectance mirror. At least one of the mirror periods is formed by bonding a first semiconductor layer to a first side of a film layer (where the film layer is formed on a second semiconductor layer), forming an opening through the second semiconductor layer to expose the film layer, and cutting through the first semiconductor layer, the film layer, and the second semiconductor layer. The first semiconductor layer could include a high resistivity silicon wafer, the film layer could include an oxide film, and the second semiconductor layer could include a silicon wafer. The high resistivity silicon wafer could be approximately 110 ?m thick, and the silicon wafer could be approximately 125 ?m thick. The opening through the second semiconductor layer could be 1.25 cm to 1.75 cm in width.

Abstract: A photoelectric device, such as a photodetector, can include a semiconductor nanowire electrostatically associated with a J-aggregate. The J-aggregate can facilitate absorption of a desired wavelength of light, and the semiconductor nanowire can facilitate charge transport. The color of light detected by the device can be chosen by selecting a J-aggregate with a corresponding peak absorption wavelength.

Abstract: A stack-type photovoltaic element with improved conversion efficiency having an intermediate layer and a method of manufacturing the same are provided. A stack-type photovoltaic element according to the present invention includes a first photovoltaic element portion (a) and a second photovoltaic element portion from a substrate side, as well as at least one intermediate layer between the first photovoltaic element portion and the second photovoltaic element portion. The intermediate layer is formed from a metal oxide film having an oxygen atom concentration/metal atom concentration ratio not lower than 0.956 and not higher than 0.976.

Abstract: A sensor includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat, where the photothermal absorber outputs an electric signal in response to incident light to be introduced into the photothermal absorber or heat to be applied to the photothermal absorber. A semiconductor wafer includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat.

Abstract: An optical image modulator and a method of manufacturing the same. The optical image modulator includes a substrate, an N electrode contact layer formed on the substrate, a lower distributed Bragg reflection (DBR) layer, a quantum well layer, an upper DBR layer, and a P electrode contact layer sequentially stacked on the N electrode contact layer, a P electrode formed on the P electrode contact layer, and an N electrode formed on the N electrode contact layer. The N electrode is a frame that surrounds the lower DBR layer.

Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.

Abstract: In a process for producing a photoelectric conversion device comprising a bottom electrode layer, a photoelectric conversion semiconductor layer, a buffer layer, and a transparent conductive layer, which are stacked in this order on a substrate, all film forming stages ranging from a stage of forming the buffer layer to a stage of forming the transparent conductive layer are performed with a liquid phase technique. The buffer layer is formed with a chemical bath deposition technique, and the transparent conductive layer is formed with an electrolytic deposition technique.

Abstract: The invention relates to methods of making unsupported articles of semiconducting material using thermally active molds having an external surface temperature, Tsurface, and a core temperature, Tcore, whererin Tsurface>Tcore.

Abstract: Disclosed is a stacked photovoltaic element, including: a first photovoltaic element portion including at least one photovoltaic element, stacked over a substrate; an intermediate layer made of a metal oxide, stacked over the first photovoltaic element portion; a buffer layer in an amorphous state, stacked over the intermediate layer; and a second photovoltaic element portion including at least one photovoltaic element, stacked over the buffer layer, wherein a conductive layer of the second photovoltaic element portion in contact with the buffer layer is a microcrystalline layer.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes an isolation trench formed in a semiconductor substrate corresponding to a logic region and a pixel separating trench formed on the semiconductor substrate corresponding to a pixel region and having a depth shallower than a depth of the isolation trench of the logic region, a barrier region formed below the pixel separating trench, a pixel separator formed inside the pixel separating trench, a gate formed above the semiconductor substrate, a first doped region formed at a deep region of the semiconductor substrate corresponding to one side of the gate, an additionally-doped region interposed between the first doped region and the barrier region, and a second doped region formed at a shallow region of the semiconductor substrate such that the second doped region makes contact with the first doped region.

Abstract: Coil units are disclosed for use in electrical circuits. An exemplary coil unit comprises a rigid substrate having an electrically non-conductive three-dimensional (3-D) surface. At least one 3-D coil (shaped, for example, as a helical coil) of semiconductor material is formed on the substrate surface. Disposed on the at least one coil of semiconductor material is a 3-D coil of a conductive metal. The coil of conductive metal is situated sufficiently closely to the at least one coil of semiconductor material for the coil of conductive metal to produce Coulombic drag in the at least one coil of semiconductor material when the coils are conductive of low-mass electrons. The semiconductor material can be a photoconductor or other material that has conductive low-mass electrons.

Abstract: An image sensor including a deep guard ring and a noise blocking area and a method of manufacturing the same. The image sensor includes the deep guard ring and a deep P well surrounding the noise blocking area, thereby preventing crosstalk between adjacent pixels. In addition, an ion implantation layer is divided by the noise blocking area, so that substrate crosstalk is effectively eliminated.

Abstract: Discussed are an ink containing nanoparticles for formation of thin film of a solar cell and its preparation method, CIGS thin film solar cell having at least one light absorption layer formed by coating or printing the above ink containing nanoparticles on a rear electrode, and a process for manufacturing the same. More particularly, the above absorption layer includes Cu, In, Ga and Se elements as constitutional ingredients thereof and such elements exist in the light absorption layer by coating or printing an ink that contains Cu2Se nanoparticles and (In,Ga)2Se3 nanoparticles on the rear electrode, and heating the treated electrode with the ink. Since Cu(In,Ga)Se2 (CIGS) thin film is formed using the ink containing nanoparticles, a simple process is used without requirement of vacuum processing or complex equipment and particle size of the thin film, Ga doping concentration, etc., can be easily regulated.

Abstract: The efficiency and the aesthetical properties are enhanced by spatial control of the P1DPC structural properties on the substrate surface area. The spatial control of the P1DPC structural properties can be achieved through two principal routes: 1) selective spatial deposition of a plurality of P1DPCs on the substrate surface, 2) selective spatial manufacturing of P1DPCs with a non-planar surface structure, on the substrate surface.

Abstract: Methods for fabricating a photovoltaic device on complexly shaped fabricated objects, such as car bodies are disclosed. Preferably the photovoltaic device includes absorber layers comprising Copper, Indium, Gallium, Selenide (CIGS) or Copper, Zinc, Tin, Sulfide (CZTS).