Characterized By Semiconductor Body Shape, Relative Size, Or Disposition Of Semiconductor Regions (epo) Patents (Class 257/E31.032)
  • Publication number: 20110269264
    Abstract: A photovoltaic device that includes a substrate and a nanowall structure disposed on the substrate surface. The device also includes at least one layer conformally deposited over the nanowall structure. The conformal layer(s) is at least a portion of a photoactive junction. A method for making a photovoltaic device includes generating a nanowall structure on a substrate surface and conformally depositing at least one layer over the nanowall structure thereby forming at least one photoactive junction. A solar panel includes at least one photovoltaic device based on a nanowall structure. The solar panel isolates such devices from its surrounding atmospheric environment and permits the generation of electrical power. Optoelectronic device may also incorporate a photovoltaic device based on a nanowall structure.
    Type: Application
    Filed: July 14, 2011
    Publication date: November 3, 2011
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Bastiaan Arie Korevaar, Loucas Tsakalakos, Joleyn Eileen Brewer
  • Patent number: 8049293
    Abstract: A back-illuminated type solid-state image pickup device (1041) includes read circuits (Tr1, Tr2) formed on one surface of a semiconductor substrate (1042) to read a signal from a photo-electric conversion element (PD) formed on the semiconductor substrate (1042), in which electric charges (e) generated in a photo-electric conversion region (1052c1) formed under at least one portion of the read circuits (Tr1, Tr2) are collected to an electric charge accumulation region (1052a) formed on one surface side of the semiconductor substrate (1042) of the photo-electric conversion element (PD) by electric field formed within the photo-electric conversion element (PD). Thus, the solid-state image pickup device and the camera are able to make the size of pixel become very small without lowering a saturation electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: November 1, 2011
    Assignee: Sony Corporation
    Inventors: Shin Iwabuchi, Kazuhide Yokota, Takeshi Yanagita, Yasushi Maruyama
  • Publication number: 20110260280
    Abstract: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a recrystallized silicon layer. The recrystalized silicon layer is formed on the back side of the substrate. The recrystalized silicon layer has different photoluminescence intensity than the substrate.
    Type: Application
    Filed: April 23, 2010
    Publication date: October 27, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Yeur-Luen Tu, Jen-Cheng Liu, Keng-Yu Chou, Chung Chien Wang
  • Publication number: 20110259413
    Abstract: A method for fabricating a shaped thin film photovoltaic device includes providing a length of tubular glass substrate having an inner diameter, an outer diameter, a circumferential outer surface region covered by an absorber layer and a window buffer layer overlying the absorber layer. The substrate is placed in a vacuum of between about 0.1 Torr to about 0.02 Torr and a mixture of reactant species derived from diethylzinc species, water species, and a carrier gas are introduced, as well as a diborane species. The substrate is heated to form a zinc oxide film with a thickness of 0.75-3 ?m, a haziness of at least 5%, and an electrical resistivity of less than about 2.5 milliohm-cm.
    Type: Application
    Filed: April 14, 2011
    Publication date: October 27, 2011
    Applicant: Stion Corporation
    Inventors: Robert D. Wieting, Chester A. Farris, III
  • Publication number: 20110253971
    Abstract: An underwater data transmission system including arrays of nano-meter scaled photon emitters and sensors on an outer surface of an underwater platform. For the emitters, a laser is pulsed to correlate with data packets, providing a beam of photons at a prescribed frequency. Nano-scaled collecting lenses channel the incoming photons to photo-receptors located at a focal plane for the frequency at the base of each lens. A coating on the lenses absorbs photons at the frequency that are not aligned with the longitudinal axes of the lenses or tubes. Nano-wires connect the photo-receptors to a light intensity integrator. The integrator integrates the intensity over a surface area. The output of the integrator is fed to a signal processor to track and process the arriving digital packets.
    Type: Application
    Filed: June 16, 2011
    Publication date: October 20, 2011
    Inventor: Promode R. Bandyopadhyay
  • Publication number: 20110250709
    Abstract: A method for manufacturing a thin film photoelectric conversion module comprising the steps of: (A) forming a plurality of divided strings by dividing a string, in which thin film photoelectric conversion elements provided by sequentially laminating a first electrode layer, a photoelectric conversion layer and a second electrode layer on the surface of an insulating substrate are electrically connected in series, into a plurality of strings by dividing grooves, electrically insulating and separating the first electrode layer and the second electrode layer one from the other and extending in a serial connection direction; and (B) performing reverse biasing by applying a reverse bias voltage to each of thin film photoelectric conversion elements of the divided string.
    Type: Application
    Filed: August 1, 2008
    Publication date: October 13, 2011
    Inventors: Shinsuke Tachibana, Takanori Nakano
  • Publication number: 20110248371
    Abstract: Provided is a solid-state imaging device including: a first-conductivity-type substrate; a second-conductivity-type well formed in a surface side of the first-conductivity-type substrate; a photoelectric conversion area configured with a first-conductivity-type-impurity area formed in the second-conductivity-type well to convert incident light to charges; a first-conductivity-type-charge retaining area configured with the first-conductivity-type-impurity area formed in the second-conductivity-type well to retain the charges converted by the photoelectric conversion area until the charges are read out; a charge voltage conversion area configured with the first-conductivity-type-impurity area formed in the second-conductivity-type well to convert the charges retained in the charge retaining area to a voltage; and a first-conductivity-type-layer area configured by forming a first-conductivity-type-in a convex shape from a boundary between the first-conductivity-type substrate and the second-conductivity-type wel
    Type: Application
    Filed: April 1, 2011
    Publication date: October 13, 2011
    Applicant: SONY CORPORATION
    Inventors: Yusuke Matsumura, Takashi Machida
  • Patent number: 8035186
    Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods. (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field. Electrical contacts are made to all doped regions, and bias is applied so that a reverse bias is maintained across all junctions.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: October 11, 2011
    Assignee: Infrared Newco, Inc.
    Inventors: Conor S. Rafferty, Clifford A. King
  • Publication number: 20110240099
    Abstract: Method of making a semiconductor nanowire photovoltaic device includes providing a plurality of spaced photovoltaic semiconductor nanowires on a growth substrate; applying dielectric material so that it is disposed between the semiconductor nanowires producing a layer of embedded semiconductor nanowires having a top surface opposed to a bottom surface, the bottom surface being defined by the interface with the growth substrate; depositing a first electrode over the top surface of the layer of embedded semiconductor nanowires in electrical contact with the nanowires; joining the first electrode to a device substrate; removing the growth substrate and exposing the bottom surface; depositing a second electrode on the bottom surface so that it is in electrical contact with the semiconductor nanowires; and wherein either the first or second electrode is transparent to permit light to be transmitted through the transparent electrode and be absorbed by the photovoltaic semiconductor nanowires.
    Type: Application
    Filed: March 30, 2010
    Publication date: October 6, 2011
    Inventors: Carolyn R. Ellinger, Keith B. Kahen
  • Publication number: 20110240117
    Abstract: A method of manufacturing structure may include forming a layer including cadmium and tin adjacent to a substrate, annealing the layer in a first annealing environment including a reducing agent, then annealing the layer in a second annealing environment including nitrogen.
    Type: Application
    Filed: April 1, 2011
    Publication date: October 6, 2011
    Inventors: Yu Yang, Zhibo Zhao, Benyamin Buller
  • Publication number: 20110232717
    Abstract: The present application discloses compositions for thin film dye-sensitized solar cells in which nanoparticles of semiconductor material are tethered together in a nanonodular network using a multi-functional linking compound.
    Type: Application
    Filed: February 17, 2011
    Publication date: September 29, 2011
    Applicants: OneSun, LLC, Warner Babcock Institute for Green Chemistry
    Inventors: John C. Warner, Helen Van Benschoten, Amy Cannon
  • Publication number: 20110232732
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Application
    Filed: March 24, 2011
    Publication date: September 29, 2011
    Inventor: Seung-Yeop Myong
  • Publication number: 20110232729
    Abstract: A solar battery element has a structure equipped with: photoelectric converting semiconductor particles formed by a particulate base substance, semiconductor layers of a first conductive type formed by a material different from that of the particulate base substance that cover at least portions of the particulate base substance, and semiconductor layers of a second conductive type that cover portions of the semiconductor layers of the first conductive type so as to form pn junctions therewith; a first electrode that contacts the semiconductor layers of the first conductive type; a second electrode that contacts the semiconductor layers of the second conductive type; and an insulating binder for immobilizing the photoelectric converting semiconductor particles between the first electrode and the second electrode.
    Type: Application
    Filed: March 28, 2011
    Publication date: September 29, 2011
    Applicant: FUJIFILM CORPORATION
    Inventors: Yoichi HOSOYA, Hideharu NAGASAWA, Koukichi WAKI, Masashi SHIRATA
  • Patent number: 8026508
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a single electron box including a first quantum dot, a charge storage gate on the first quantum dot, and a first gate electrode on the charge storage gate, the charge storage gate exchanging charges with the first quantum dot, the first gate electrode adjusting electric potential of the first quantum dot; and a single electron transistor including a second quantum dot below the first quantum dot, a source, a drain, and a second gate electrode below the second quantum dot, the second quantum dot being capacitively coupled to the first quantum dot, the source contacting one side of the second quantum dot, the drain contacting the other side facing the one side, the second gate electrode adjusting electric potential of the second quantum dot.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: September 27, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Myung-Sim Jun, Moon-Gyu Jang, Tae-Gon Noh, Tae-Moon Roh
  • Publication number: 20110227137
    Abstract: The present invention provides a semiconductor device including a memory that has a memory cell array including a plurality of memory cells, a control circuit that controls the memory, and an antenna, where the memory cell array has a plurality of bit lines extending in a first direction and a plurality of word lines extending in a second direction different from the first direction, and each of the plurality of memory cells has an organic compound layer provided between the bit line and the word line. Data is written by applying optical or electric action to the organic compound layer.
    Type: Application
    Filed: June 2, 2011
    Publication date: September 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Ryoji NOMURA, Hiroko ABE, Yuji IWAKI, Shunpei YAMAZAKI
  • Publication number: 20110230005
    Abstract: The invention relates to a process for fabricating a multilayer structure that includes bonding a first wafer onto a second wafer, where the first wafer may have a chamfered edge and the bonding interface has an adhesion energy of less than or equal to 1 J/m2, and thinning the first wafer so as to form a transferred layer, where before thinning the first wafer, a step of trimming the edge of the first wafer is carried out using a grinding wheel having a working surface which comprises grit particles with an average size of greater than or equal to 800 mesh or less than or equal to 18 microns, and wherein the trimming step is carried out by lowering the grinding wheel at a rate of descent of greater than or equal to 5 microns per second, such that the descent of the grinding wheel into the first wafer continues to a distance from the bonding interface that is less than or equal to 30 ?m.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 22, 2011
    Inventors: Alexandre Vaufredaz, Sebastien Molinari
  • Publication number: 20110223709
    Abstract: A method for manufacturing a thin-film photoelectric conversion device includes forming a first electrode layer, a photoelectric conversion layer having three conductive semiconductor layers laminated thereon, and a second electrode layer sequentially laminated in this order on a translucent insulating substrate, such that adjacent thin-film photoelectric conversion cells are electrically connected in series, isolating a thin-film photoelectric conversion cell into a plurality of thin-film photoelectric conversion cells by forming isolation trenches that reach from the second electrode layer to the first electrode layer, removing a part of sidewalls at an external periphery of the thin-film photoelectric conversion cells positioned at an external peripheral edge of the thin-film photoelectric conversion device, along with the external periphery, and modifying into insulation layers by performing an oxidation process on all of the sidewalls of the isolation trenches of the photoelectric conversion layer and al
    Type: Application
    Filed: November 20, 2009
    Publication date: September 15, 2011
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hidetada Tokioka, Hiroya Yamarin, Tae Orita
  • Publication number: 20110215291
    Abstract: According to one embodiment, a semiconductor light-emitting device using an ITON layer for a transparent conductor and realizing low drive voltage, high luminance efficiency, and uniformed light emission intensity distribution is provided. The semiconductor light-emitting device includes: a substrate; an n-type semiconductor layer formed on the substrate; an active layer formed on the n-type semiconductor layer; a p-type semiconductor layer formed on the active layer and whose uppermost part is a p-type GaN layer; an ITON (Indium Tin Oxynitride) layer formed on the p-type GaN layer; an ITO (Indium Tin Oxide) layer formed on the ITON layer; a first metal electrode formed on a part on the ITO layer; and a second metal electrode formed in contact with the n-type semiconductor layer.
    Type: Application
    Filed: September 1, 2010
    Publication date: September 8, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshihide Ito, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20110217811
    Abstract: A method for manufacturing a microcrystalline semiconductor film having high crystallinity is provided. A method for manufacturing a semiconductor device which has favorable electric characteristics with high productivity is provided. After a first microcrystalline semiconductor film is formed over a substrate, treatment for flattening a surface of the first microcrystalline semiconductor film is performed. Then, treatment for removing an amorphous semiconductor region on a surface side of the flattened first microcrystalline semiconductor film is performed so that a second microcrystalline semiconductor film having high crystallinity and flatness is formed. After that, a third microcrystalline semiconductor film is formed over the second microcrystalline semiconductor film.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuhiro TANAKA, Tomokazu YOKOI, Koji DAIRIKI
  • Publication number: 20110214731
    Abstract: Disclosed is a solar cell and a method for manufacturing the same, which facilitates to prevent residual matters from remaining between first and second electrodes, to minimize a substrate-sagging problem even though plural layers are deposited on a substrate under high-temperature conditions, and to minimize the number of times of laser-scribing process. The solar cell comprises a substrate including a through-hole; a first electrode on one surface of the substrate, wherein one end of the first electrode is extended to an inner surface of the through-hole; a semiconductor layer on the first electrode; a second electrode on the semiconductor layer, wherein one end of the second electrode is extended to the inner surface of the through-hole; and a connecting portion for electrically connecting the one end of the first electrode with the one end of the second electrode.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 8, 2011
    Inventor: Won Seok PARK
  • Publication number: 20110209750
    Abstract: A thin film solar cell including a substrate, a first conductive layer, a photoelectric conversion layer, a second conductive layer and a passivation layer is provided. The first conductive layer disposed on the substrate has a plurality of first openings, so as to divide the first conductive layer into bottom electrodes of a plurality of photovoltaic elements. The photoelectric conversion layer disposed on the first conductive layer has a plurality of second openings. The second conductive layer is disposed on the photoelectric conversion layer and electrically connected to the first conductive layer through the second openings. The passivation layer is disposed on the sidewall of the photoelectric conversion layer, so that the second conductive layer in the second openings is electrically isolated from the photoelectric conversion layer. A manufacturing method of the thin film solar cell is also provided.
    Type: Application
    Filed: May 10, 2011
    Publication date: September 1, 2011
    Applicant: AURIA SOLAR CO., LTD.
    Inventors: Chin-Yao Tsai, Chien-Sheng Yang
  • Publication number: 20110210413
    Abstract: An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 1, 2011
    Inventors: Yu-Lung HUANG, Tsang-Yu Liu
  • Publication number: 20110209754
    Abstract: A solar cell structure including a photovoltaic layer, an upper electrode, a lower electrode, and a passivation layer is provided. The photovoltaic layer has an upper surface, a lower surface and a plurality of side surfaces, wherein the photovoltaic layer includes a first type and a second type semiconductor layer. The upper electrode is disposed at the upper surface of the photovoltaic layer and electrically connected with the second type semiconductor layer, wherein the second type semiconductor layer is between the upper electrode and the first type semiconductor layer. The bottom electrode is disposed at the bottom surface of the photovoltaic layer and electrically connected with the first type semiconductor layer, wherein the first type semiconductor layer is between the bottom electrode and the second type semiconductor. The passivation layer covers at least one of the side surfaces so as to reduce the leakage current formed on the side surfaces.
    Type: Application
    Filed: May 10, 2011
    Publication date: September 1, 2011
    Applicant: AURIA SOLAR CO., LTD.
    Inventor: Chin-Yao Tsai
  • Publication number: 20110203648
    Abstract: Heterojunction devices and associated methods of making and using are provided. In one aspect, for example, a heterojunction photovoltaic device can include a crystalline semiconductor layer, a first doped semiconductor layer coupled to the crystalline semiconductor layer, and a second doped semiconductor layer coupled to the crystalline semiconductor layer opposite the first doped semiconductor layer. The first and second doped semiconductor layers form junctions with the semiconductor layer. The device can further include a laser processed semiconductor region coupled to the crystalline semiconductor layer.
    Type: Application
    Filed: August 20, 2010
    Publication date: August 25, 2011
    Inventors: James Carey, Martin U. Pralle
  • Publication number: 20110197957
    Abstract: A method for manufacturing a silicon-based thin film solar cell including a crystalline silicon photoelectric conversion unit which contains a p-type layer (4p), a crystalline i-type silicon photoelectric conversion layer (4ic), and an n-type layer (4nc) stacked in this order from a transparent substrate side is provided. In one example, an n-type silicon-based thin film layer (4na) is formed on the crystalline i-type silicon photoelectric conversion layer (4ic), there is formed an the n-type silicon-based thin film layer (4na) having an n-type silicon alloy layer having a film thickness of 1-12 nm and being in contact with the crystalline i-type silicon photoelectric conversion layer.
    Type: Application
    Filed: October 9, 2009
    Publication date: August 18, 2011
    Applicant: KANEKA CORPORATION
    Inventors: Kunta Yoshikawa, Mitsuru Ichikawa, Kenji Yamamoto
  • Publication number: 20110201145
    Abstract: A process for producing a high-performance photovoltaic device by depositing a high-quality crystalline silicon layer, and a deposition apparatus for depositing the high-quality crystalline silicon layer. A process for producing a photovoltaic device that comprises forming a crystalline silicon-based photovoltaic layer comprising an i-layer on a substrate using a plasma-enhanced CVD method, wherein formation of the i-layer comprises an initial layer deposition stage and a bulk i-layer deposition stage, and the initial layer deposition stage comprises depositing the initial layer using a silane-based gas flow rate during the initial layer deposition stage that is lower than the silane-based gas flow rate during the bulk i-layer deposition stage, with the deposition time for the initial layer deposition stage set to not less than 0.
    Type: Application
    Filed: October 2, 2009
    Publication date: August 18, 2011
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Hiroomi Miyahara, Kengo Yamaguchi
  • Publication number: 20110189816
    Abstract: A method of producing a photoelectric conversion device having a multilayer structure formed on a substrate, the multilayer structure including a lower electrode, a photoelectric conversion layer made of a compound semiconductor layer, an n-type buffer layer made of a compound semiconductor layer, and a transparent conductive layer, is disclosed. A reaction solution, which is an aqueous solution containing an n-type dopant element, at least one of ammonia and an ammonium salt, and thiourea, is prepared, the n-type dopant is diffused into the photoelectric conversion layer by immersing the substrate including the photoelectric conversion layer in the reaction solution controlled to a temperature in the range from 20° C. to 45° C.; and the buffer layer is deposited on the photoelectric conversion layer by immersing the substrate including the photoelectric conversion layer subjected to the diffusion step in the reaction solution controlled to a temperature in the range from 70° C. to 95° C.
    Type: Application
    Filed: January 21, 2011
    Publication date: August 4, 2011
    Applicant: FUJIFILM CORPORATION
    Inventors: Tetsuo KAWANO, Takashi KOIKE
  • Publication number: 20110186127
    Abstract: A thin film photovoltaic device on a substrate is being realized by a method for manufacturing a p-i-n junction semiconductor layer stack with a p-type microcrystalline silicon layer, a p-type amorphous silicon layer, a buffer silicon layer comprising preferably intrinsic amorphous silicon, an intrinsic type amorphous silicon layer, and an n-type silicon layer over the intrinsic type amorphous silicon layer.
    Type: Application
    Filed: August 26, 2009
    Publication date: August 4, 2011
    Applicant: OERLIKON SOLAR AG, TRÜBBACH
    Inventors: Stefano Benagli, Daniel Borrello, Evelyne Vallat-Sauvain, Johannes Meier, Ulrich Kroll
  • Publication number: 20110186119
    Abstract: A solar cell includes a nano-scale patterned back contact layer; a spacer layer on the nano-scale patterned back contact layer; a semiconductor layer on the spacer layer; and a light transmissive first electrode on the semiconductor layer.
    Type: Application
    Filed: December 23, 2010
    Publication date: August 4, 2011
    Inventors: Harry A. Atwater, Vivian Ferry, Albert Polman, Ruud Schropp, Marc Verschuuren
  • Publication number: 20110186910
    Abstract: There is disclosed methods of making photosensitive devices, such as flexible photovoltaic (PV) devices, through the use of epitaxial liftoff. Also described herein are methods of preparing flexible PV devices comprising a structure having a growth substrate, wherein the selective etching of protective layers yields a smooth growth substrate that us suitable for reuse.
    Type: Application
    Filed: September 9, 2010
    Publication date: August 4, 2011
    Inventors: Stephen R. Forrest, Jeramy Zimmerman, Kyusang Lee, Kuen-Ting Shiu
  • Publication number: 20110174363
    Abstract: Particular embodiments of the present disclosure relate to the use of sputtering, and more particularly magnetron sputtering, in forming absorber structures, and particular multilayer absorber structures, that are subsequently annealed to obtain desired composition profiles across the absorber structures for use in photovoltaic devices.
    Type: Application
    Filed: January 12, 2011
    Publication date: July 21, 2011
    Applicant: AQT Solar, Inc.
    Inventor: Mariana Rodica Munteanu
  • Publication number: 20110175126
    Abstract: A light emitting diode device is provided, which comprises a substrate comprising a first growth surface and a bottom surface opposite to the first growth surface; a dielectric layer with a plurality of openings therein formed on the first growth surface; a plurality of semiconductor nano-scaled structures formed on the substrate protruding through the openings; a layer formed on the plurality of semiconductor nano-scaled structures with a second growth surface substantially parallel with the bottom surface; a light emitting diode structure formed on the second growth surface; wherein the diameters of the openings are smaller than 250 nm, and wherein the diameters of the plurality semiconductor nano-scaled structures are larger than the diameters of the corresponding openings.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 21, 2011
    Inventors: Hung-Chih YANG, Ming-Chi Hsu, Ta-Cheng Hsu, Chih-Chung Yang, Tsung-Yi Tang, Yung-Sheng Chen, Wen-Yu Shiao, Che-Hao Liao, Yu-Jiun Shen, Sheng-Horng Yen
  • Publication number: 20110177648
    Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a antireflection coating layer disposed on a first surface of a substrate, a barrier layer disposed on a second surface of the substrate, a first transparent conductive oxide layer disposed on the barrier layer, a conductive contact layer disposed on the first transparent conductive oxide layer, a first p-i-n junction formed on the conductive contact layer, and a second transparent conductive oxide layer formed on the first p-i-n junction.
    Type: Application
    Filed: December 28, 2010
    Publication date: July 21, 2011
    Applicant: Applied Materials, Inc.
    Inventors: David Tanner, Hien-Minh Huu Le, Quancheng (Tommy) Gu, Shuran Sheng, Yong Kee Chae, Tzay-Fa (Jeff) Su, Dapeng Wang
  • Publication number: 20110169055
    Abstract: A process and structure of a back side illumination (BSI) image sensor are disclosed. An n-type doped region is formed in a substrate, and a transfer gate is formed on top of the semiconductor substrate. A p-type doped region is formed in the n-type doped region either using the transfer gate as a mask or is non-self aligned formed.
    Type: Application
    Filed: June 7, 2010
    Publication date: July 14, 2011
    Applicant: HIMAX IMAGING, INC.
    Inventors: YANG WU, CHI-SHAO LIN
  • Publication number: 20110165709
    Abstract: The present invention is directed to an electrical device that comprises a first and a second fiber having a core of thermoelectric material embedded in an electrically insulating material, and a conductor. The first fiber is doped with a first type of impurity, while the second fiber is doped with a second type of impurity. A conductor is coupled to the first fiber to induce current flow between the first and second fibers.
    Type: Application
    Filed: March 2, 2011
    Publication date: July 7, 2011
    Applicant: ZT3 Technologies, Inc.
    Inventor: Biprodas Dutta
  • Publication number: 20110163404
    Abstract: A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the Ge substrate is moderately doped with the first dopant and bonded to a glass substrate top surface. Then, a first region of a Ge substrate second surface is heavily doped with the first dopant. A second region of the Ge substrate second surface is heavily doped with a second dopant, having the opposite electron affinity than the first dopant, forming a pn junction. An interlevel dielectric (ILD) layer is formed overlying the Ge substrate second surface and contact holes are etched in the ILD layer overlying the first and second regions of the Ge substrate second surface. The contact holes are filled with metal and metal pads are formed overlying the contact holes.
    Type: Application
    Filed: March 17, 2011
    Publication date: July 7, 2011
    Inventors: Jong-Jan Lee, Steven R. Droes, John W. Hartzell, Jer-Shen Maa
  • Publication number: 20110155236
    Abstract: To provide a solar cell enabling practical electric power to be obtained and excitons to be effectively collected, and a manufacturing method of the solar cell. A nanowire solar cell 1 comprises: a semiconductor substrate 2; a plurality of nanowire semiconductors 4 and 5 forming pn junctions; a transparent insulating material 6 filled in the gap between the plurality of nanowire semiconductors 4 and 5; an electrode 7 covering the end portion of the plurality of nanowire semiconductors 4 and 5; and a passivation layer 10 provided between the semiconductor 5 and the transparent insulating material 6 and between the semiconductor 5 and the electrode 7.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 30, 2011
    Inventors: Hajime Goto, Takashi Fukui, Junichi Motohisa, Kenji Hiruma
  • Publication number: 20110159636
    Abstract: The present invention relates to a fast and inexpensive method which can be carried out locally for the wet-chemical edge deletion of “solar modules” by applying etching pastes which are suitable for this purpose and, when the reaction is complete, removing the paste residues or cleaning the substrate surface in a suitable manner. An etching paste newly developed for the purpose is employed in the method.
    Type: Application
    Filed: August 5, 2009
    Publication date: June 30, 2011
    Applicant: MERCK PATENT GESELLSCHAFT MIT BESCHRANKTER HAFTUNG
    Inventors: Oliver Doll, Ingo Koehler
  • Publication number: 20110155233
    Abstract: Solar cells and methods for manufacturing solar cells are disclosed. An example solar cell includes a first electrode and a second electrode. A first active layer may be disposed between the first electrode and the second electrode, and a second active layer different from the first active layer may also be disposed between the first electrode and the second electrode. One or more layers of conductive material may be disposed between the first active layer and the second active layer, if desired. In some instances, the first active layer may be sensitive to a first range of wavelengths, and the second active layer may be sensitive to a second range of wavelengths, where at least part of the first range of wavelengths does not overlap at least part of the second range of wavelengths. It is contemplated that more than two active layers may be used, if desired.
    Type: Application
    Filed: December 29, 2009
    Publication date: June 30, 2011
    Applicant: Honeywell International Inc.
    Inventors: Yue Liu, Zhi Zheng, Alex Freeman
  • Publication number: 20110155204
    Abstract: Disclosed herein is a wire type thin film solar cell, including: a metal wire which is made of any one selected from the group consisting of aluminum (Al), titanium (Ti), chromium (Cr), molybdenum (Mo) and tungsten (W); an N-type layer which is deposited on a circumference of the metal wire and conducts electrons generated from the metal wire; a P-type layer which is deposited on the N-type layer and emits electrons excited by solar light; and a transparent electrode layer which is deposited on the P-type layer. The wire type thin film solar cell can exhibit high photoelectric conversion efficiency compared to conventional flat-plate type thin film solar cells and can be easily manufactured into a highly-dense solar cell module.
    Type: Application
    Filed: February 4, 2010
    Publication date: June 30, 2011
    Inventors: Jun Sin Yi, Jin Joo Park, Young Kuk Kim
  • Publication number: 20110147879
    Abstract: A wafer structure for an image sensor includes a substrate that has a given conductivity type, a given dopant concentration, and a given concentration of oxygen. An intermediate epitaxial layer is formed over the substrate. The intermediate epitaxial layer has the same conductivity type and the same, or substantially the same, dopant concentration as the substrate but a lower oxygen concentration than the substrate. A thickness of the intermediate epitaxial layer is greater than the diffusion length of a minority carrier in the intermediate layer. A device epitaxial layer is formed over the intermediate epitaxial layer. The device epitaxial layer has the same conductivity type but lower dopant and oxygen concentrations than the substrate.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 23, 2011
    Inventor: Cristian A. Tivarus
  • Publication number: 20110146779
    Abstract: The present invention relates to a method for fabricating a sub-wavelength structure layer, including: forming a metal film on a passivation layer, an n-GaN layer or a transparent conductive oxide layer; performing thermal treatment to form self assembled metal nano particles; using the metal nano particles as a mask to remove a partial area of the passivation layer, the n-GaN layer or the transparent conductive oxide layer to form a sub-wavelength structure of which the cross-sectional area increases along the thickness direction of the passivation layer, the n-GaN layer or the transparent conductive oxide layer; and removing the metal nano particles. In addition, the present invention further provides the obtained sub-wavelength structure layer and a photoelectric conversion device using the same.
    Type: Application
    Filed: March 26, 2010
    Publication date: June 23, 2011
    Applicant: National Chiao Tung University
    Inventors: Edward Yi Chang, Kartika Chandra Sahoo, Men-Ku Lin, Yi-Yao Lu, Sheng-Ping Wang
  • Publication number: 20110146771
    Abstract: The present disclosure provides a catalyst-free growth mode of defect-free Gallium Arsenide (GaAs)-based nanoneedles on silicon (Si) substrates with a complementary metal-oxide-semiconductor (CMOS)-compatible growth temperature of around 400° C. Each nanoneedle has a sharp 2 to 5 nanometer (nm) tip, a 600 nm wide base and a 4 micrometer (?m) length. Thus, the disclosed nanoneedles are substantially hexagonal needle-like crystal structures that assume a 6° to 9° tapered shape. The 600 nm wide base allows the typical micro-fabrication processes, such as optical lithography, to be applied. Therefore, nanoneedles are an ideal platform for the integration of optoelectronic devices on Si substrates. A nanoneedle avalanche photodiode (APD) grown on silicon is presented in this disclosure as a device application example. The APD attains a high current gain of 265 with only 8V bias.
    Type: Application
    Filed: May 27, 2010
    Publication date: June 23, 2011
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Chih-Wei Chuang, Connie Chang-Hasnain, Forrest Grant Sedgwick, Wai Son Ko
  • Publication number: 20110143482
    Abstract: A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.
    Type: Application
    Filed: January 13, 2011
    Publication date: June 16, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Jack O. Chu, Martin M. Frank, William M. Green, Young-hee Kim, George G. Totir, Joris Van Campenhout, Yurri A. Vlasov, Ying Zhang
  • Publication number: 20110143472
    Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.
    Type: Application
    Filed: November 8, 2010
    Publication date: June 16, 2011
    Applicant: QuNano AB
    Inventors: Werner Seifert, Damir Asoli, Zhaoxia Bi
  • Publication number: 20110143495
    Abstract: In various embodiments, solar cells include a junction including SiGe, a junction including at least one III-V material, and may be formed on silicon substrates and/or with silicon-based capping layers thereover.
    Type: Application
    Filed: February 14, 2011
    Publication date: June 16, 2011
    Inventors: Arthur J. Pitera, Eugene A. Fitzgerald, Steven A. Ringel
  • Publication number: 20110139229
    Abstract: Solar cells and methods for their manufacture are disclosed. An example method may include providing a silicon substrate and introducing dopant to one or more selective regions of the front surface of the substrate by ion implantation. The substrate may be subjected to a single high-temperature anneal cycle. Additional dopant atoms may be introduced for diffusion into the front surface of the substrate during the single anneal cycle. A selective emitter may be formed on the front surface of the substrate such that the one or more selective regions of the selective emitter layer are more heavily doped than the remainder of the selective emitter layer. Associated solar cells are also provided.
    Type: Application
    Filed: June 3, 2010
    Publication date: June 16, 2011
    Inventors: Ajeet Rohatgi, Vijay Yelundur, Preston Davis, Vinodh Chandrasekaran, Ben Damiani
  • Publication number: 20110132446
    Abstract: A dye-sensitized solar cell and method for fabricating the same are provided. The dye-sensitized solar cell includes a photo electrode including a first electrode and a Zn-doped TiO2 porous layer disposed on the first electrode, wherein the Zn-doped TiO2 porous layer absorbs a dye. A second electrode is disposed opposite to the photo electrode, wherein the Zn-doped TiO2 porous layer is disposed between the first and second electrodes. An electrolyte is disposed between the photo electrode and the second electrode.
    Type: Application
    Filed: August 17, 2010
    Publication date: June 9, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-De Lu, Yung-Liang Tung, Kai-Ping Wang, Hsisheng Teng, Po-Tsung Hsiao
  • Publication number: 20110133160
    Abstract: An embodiment relates to a device comprising a substrate, a nanowire and a doped epitaxial layer surrounding the nanowire, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire. Another embodiment relates to a device comprising a substrate, a nanowire and one or more photogates surrounding the nanowire, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire, and wherein the one or more photogates comprise an epitaxial layer.
    Type: Application
    Filed: December 8, 2009
    Publication date: June 9, 2011
    Applicant: ZENA TECHNOLOGIES, INC.
    Inventors: Young-June YU, Munib Wober
  • Publication number: 20110132438
    Abstract: Apparatus including one or more carbon nanotubes; one or more fullerenes directly covalently bonded to the one or more carbon nanotubes; and one or more photoactive molecules bonded to the one or more fullerenes.
    Type: Application
    Filed: December 3, 2009
    Publication date: June 9, 2011
    Inventors: Pirjo PASANEN, Vladimir Ermolov