Abstract: A scanning head for an optical position-measuring system includes a receiver grating, formed of photosensitive areas, for the scanning of locally intensity-modulated light of differing wavelengths. The receiver grating is formed from a semiconductor layer stack of a doped p-layer, an intrinsic i-layer and a doped n-layer. The individual photosensitive areas have a first doped layer and at least a part of the intrinsic layer in common and are electrically separated from one another by interruptions in the second doped layer.

Abstract: An image sensor has a substrate, a dielectric layer positioned on the substrate, a pixel array including a plurality of pixels defined on the substrate, a shield electrode positioned between any two adjacent pixel electrodes of the pixels, a photo conductive layer positioned on the shield electrode and the pixel electrodes, and a transparent conductive layer covering the photo conductive layer.

Abstract: A photodiode that can separately detect the intensities of the three wavelength ranges of ultraviolet light of 400 nm or below includes an insulating layer; and a plurality of silicon semiconductor layers having different thicknesses formed on the insulating layer, wherein each of the plurality of silicon semiconductor layers has a low-concentration diffusion layer formed by diffusing one of a P-type impurity or an N-type impurity therein with a low concentration; a P-type high-concentration diffusion layer formed by diffusing a P-type impurity therein with a high concentration; and an N-type high-concentration diffusion layer formed by diffusing an N-type impurity therein with a high concentration, and wherein the P-type high-concentration diffusion layer and the N-type high-concentration diffusion layer formed in a respective one of the plurality of silicon semiconductor layers are arranged to face each other with the low-concentration diffusion layer interposed there between.

Abstract: An optical sensor element includes: an n-type semiconductor region formed on a substrate; an i-type semiconductor region which is formed on the substrate between the p-type semiconductor region and the n-type semiconductor region and which is lower in impurity concentration than the p-type semiconductor region and the n-type semiconductor region; an anode electrode formed on the insulation film and connected to the p-type semiconductor region; and a cathode electrode formed on the insulation film and connected to the n-type semiconductor region. A reverse bias voltage Vb is applied when detecting the photocurrent, the reverse bias voltage Vb satisfying a following relation.

Abstract: An image sensor and a method of fabricating an image sensor. An image sensor may include a readout circuitry arranged over a semiconductor substrate, an interlayer dielectric film provided with metal lines arranged over a semiconductor substrate, and/or a lower electrode arranged over a interlayer dielectric film such that a lower electrode may be connected to metal lines. An image sensor may include a first-type conductive layer pattern arranged over a lower electrode, an intrinsic layer arranged over a surface of a semiconductor substrate such that an intrinsic layer may substantially cover a first-type conductive layer pattern. An image sensor may include a second-type conductive layer arranged over an intrinsic layer. A method of fabricating an image sensor may include a patterned n-type amorphous silicon layer which may be treated with N2O plasma. A method of fabricating an image sensor may include H2 annealing.

Abstract: In a mesa type PIN-PD formed using a heavily doped semiconductor material, a high frequency response is degraded as slow carriers occur in a heavily doped layer when light incident into a light receiving section transmits through an absorbing layer and reaches the heavily doped layer on a side near the substrate. In a p-i-n multilayer structure, a portion corresponding to a light receiving section of a heavily doped layer on a side near a substrate is previously made thinner than the periphery of the light receiving section by an etching or selective growth technique, over which an absorbing layer and another heavily doped layer are grown to form the light receiving section of mesa structure. This makes it possible to form a good ohmic contact and to realize a PIN-PD with excellent high frequency response characteristics.

Abstract: A solar cell photovoltaic device using ultrathin films of polycrystalline silicon and deep uneven surface structures is disclosed. According to one embodiment, the uneven structures include one or more pits having a depth of at least 10 microns. According to another embodiment, the uneven structures include one or more cones or columns having a height or at least 10 microns. Because the unevenness of the structures, the photovoltaic device is able to use a very thin layer of polycrystalline silicon to effectively trap and absorb light.

Abstract: An image sensor includes a plurality of unit pixels arranged in a matrix shape, each of which is disposed in a region defined by a gate line extending in a first direction and a data line extending in a second direction that is different from the first direction. Each of the unit pixels includes a switching diode and a sensing diode. The switching diode has a plus terminal electrically connected to the gate line, and a minus terminal electrically connected to a signal node. The sensing diode has a plus terminal electrically connected to the data line, and a minus terminal electrically connected to the signal node. Therefore, a two-dimensional image may be sensed at once without moving of the sensing module so that scan time (image sensing time) may be reduced.

Abstract: A photoelectric structure is presented, comprising one or more PiN cells. The PiN cell is formed by an intrinsic semiconductor bulk having front and rear surfaces enclosed between p- and n-type regions extending along side surfaces of said semiconductor bulk. The front and rear surfaces of the intrinsic semiconductor bulk are active surfaces of the PiN cell and said side surfaces of said semiconductor bulk formed with said p- and n-type regions are configured and operable for collecting excess charged carriers generated in said semiconductor bulk in response to collected electromagnetic radiation to which at least one of the active surfaces is exposed during the PiN cell operation.

Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, the thin film type solar cell comprising a first electrode in a predetermined pattern on a substrate; a first semiconductor layer on the first electrode; a second electrode in a predetermined pattern on the first semiconductor layer; a second semiconductor layer on the second electrode; and a third electrode in a predetermined pattern on the second semiconductor layer, the first and third electrodes being electrically connected with each other, wherein a first solar cell is composed of a combination of the first electrode, the first semiconductor layer, and the second electrode; a second solar cell is composed of a combination of the second electrode, the second semiconductor layer, and the third electrode; and the first and second solar cells are connected in parallel, whereby it is possible to realize improved efficiency of the entire thin film type solar cell without performing a process for a current matching between the fir

Abstract: A method and semiconductor device for integrating the fabrication of a photodetector with the fabrication of a CMOS device on a SOI substrate. The SOI substrate is divided into two regions, a CMOS region and an optical detecting region. After the CMOS device is fabricated in the CMOS region, the optical detecting region is patterned and etched through the top silicon layer and the buried oxide layer to the base silicon layer. The pattern is etched to a depth so that after a material of a photodetector is deposited in the etched pattern, the material grows to the surface level of the SOI substrate. After the formation of a photodetector structure in the optical detecting region, the metallization process is performed on the CMOS device and the photodetector. In this manner, the fabrication of a photodetector is integrated with the fabrication of a CMOS device on the SOI substrate.

Abstract: A semiconductor device and a method for manufacturing the device include connecting a second wafer to a first wafer, forming a hard mask layer on and/or over a backside of the second wafer, forming a hard mask pattern over the second layer and then forming a via hole by etching the first and the second wafers to a predetermined depth using the hard mask pattern as an etching mask.

Abstract: A sensor includes a semiconductor body having a top and bottom surface, a first doped surface oriented region of a first conductivity type at the top surface, and a second doped surface oriented region of a second and opposite conductivity type at the bottom surface, wherein a sensitive area is defined where the first region overlaps with the second region. A resistive layer is partially arranged in the sensitive area. The sensor includes two first electrode contacts and two second electrode contacts, wherein the first electrode contacts are placed on the resistive layer to define a first detection area in the sensitive area between the first electrode contacts, and wherein the second electrode contacts are placed partially in the sensitive area on the bottom surface of the body, the surfaces of the second electrodes in the sensitive area defining a second detection area that overlaps with the first detection area.

Abstract: A photoelectric conversion device which can improve photoelectric conversion efficiency is provided. The photoelectric conversion device of the present invention has at least one p-i-n type photoelectric conversion part which includes a first conductivity type layer, a first i-type layer, a second i-type layer and a second conductivity type layer stacked in this order, and it is characterized in that a crystallization ratio of the first i-type layer is lower than that of the second i-type layer and a change rate of a crystallization ratio in a film-thickness direction at an interface between the first i-type layer and the second i-type layer is 0.013 to 0.24 nm?1.

Abstract: A method of a:DLC multi-layer doping growth comprising the steps of: forming a plurality of a:DLC layers in one process, thereby creating a plurality of successively connected PIN junctions, starting from a first junction and ending in a last junction, respective PIN junctions having p-type, n-type, and intrinsic layers; varying the sp3/sp2 ratio of at least the respective p-type and n-type layers and doping with at least silver to enhance electron mobility in respective PIN junctions; and connecting the plurality of a:DLC layers between electrodes at the first side and the second side to create a device having optimized spectral response to being oriented to a light source.

Abstract: A semiconductor photo detector of the present invention includes a layer structure, having a selective etching layer of a first-type conductivity, a field-relaxing layer of the first-type conductivity, a multiplier layer, a field-relaxing layer of a second-type conductivity, a light absorption layer of the second-type conductivity, a selective etching layer of the second-type conductivity, a buffer layer of the second-type conductivity, a contact layer of the second-type conductivity, and an electrode in the side of the second-type conductivity, which are sequentially deposited over a semiconductor substrate, and having a second mesa formed on the semiconductor substrate and a first mesa formed on the second mesa, wherein the first mesa includes the buffer layer of the second-type conductivity, the contact layer of the second-type conductivity, and the electrode in the side of the second-type conductivity, wherein the second mesa includes the layer of the first-type conductivity, the multiplier layer, the lig

Abstract: A PIN photodiode structure includes a substrate, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate, and a first semiconductor material disposed in the substrate and between the P-doped region and the N-doped region.

Abstract: In the manufacture of an electronic device such as an active matrix display, a vertical amorphous PIN photodiode or similar thin-film diode (D) is advantageously integrated with a polysilicon TFT (TFT1, TFT2) in a manner that permits a good degree of optimization of the respective TFT and diode properties while being compatible with the complex pixel context of the display. High temperature processes for making the active semiconductor film (10) of the TFT more crystalline than an active semiconductor film (40) of the diode and for forming the source and drain doped regions (s1,s2, d1,d2) of the TFT are carried out before depositing the active semiconductor film (40) of the diode. Thereafter, the lateral extent of the diode is defined by etching while protecting with an etch-stop film (30) an interconnection film (20) that can provide a doped bottom electrode region (41) of the diode as well as one of the doped regions (s2, g1) of the TFT.

Abstract: Photovoltaic devices and methods of manufacturing the same are provided. In one example, a photovoltaic device includes: a substrate; a transparent conductive layer deposited on the substrate; a semiconductor layer provided with a P layer, an I layer, and a N layer sequentially deposited on the transparent conductive layer; and a rear electrode deposited on the N layer of the semiconductor layer, wherein the P layer is a P-type oxide semiconductor.

Abstract: A lateral p-i-n photodetector is provided that includes an array of vertical semiconductor nanowires of a first conductivity type that are grown over a semiconductor substrate also of the first conductivity type. Each vertically grown semiconductor nanowires of the first conductivity type is surrounded by a thick epitaxial intrinsic semiconductor film. The gap between the now formed vertically grown semiconductor nanowires-intrinsic semiconductor film columns (comprised of the semiconductor nanowire core surrounded by intrinsic semiconductor film) is then filled by forming an epitaxial semiconductor material of a second conductivity type which is different from the first conductivity type. In a preferred embodiment, the vertically grown semiconductor nanowires of the first conductivity type are n+ silicon nanowires, the intrinsic epitaxial semiconductor layer is comprised of intrinsic epitaxial silicon, and the epitaxial semiconductor material of the second conductivity type is comprised of p+ silicon.

Abstract: A lateral p-i-n photodetector is provided that includes an array of vertical semiconductor nanowires of a first conductivity type that are grown over a semiconductor substrate also of the first conductivity type. Each vertically grown semiconductor nanowires of the first conductivity type is surrounded by a thick epitaxial intrinsic semiconductor film. The gap between the now formed vertically grown semiconductor nanowires-intrinsic semiconductor film columns (comprised of the semiconductor nanowire core surrounded by intrinsic semiconductor film) is then filled by forming an epitaxial semiconductor material of a second conductivity type which is different from the first conductivity type. In a preferred embodiment, the vertically grown semiconductor nanowires of the first conductivity type are n+ silicon nanowires, the intrinsic epitaxial semiconductor layer is comprised of intrinsic epitaxial silicon, and the epitaxial semiconductor material of the second conductivity type is comprised of p+ silicon.

Abstract: A reset transistor includes a floating diffusion region for detecting a charge, a junction region for draining the charge, a gate for controlling a transfer of the charge from the floating diffusion region to the junction region upon receipt of a reset signal, and a potential well incorporated underneath the gate.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.

Abstract: A semiconductor device that attenuates light to the circuit element area is provided. The semiconductor device includes light-sensitive element area formed on substrate and a circuit element area formed on the substrate. Additionally, a multilayer wiring area is formed on circuit element area. A Tantalum film (which is generally made of tantalum or a tantalum compound) is formed on the surface of the multilayer wiring area to attenuate incident light on circuit element area.

Abstract: A photodiode (200), for instance a PN or a PIN photodiode, is disclosed. The photodiode receives incident radiation having first and second spectral distributions, where the first spectral distribution is spectrally shifted from the second spectral distribution. The photodiode has a first semiconductor layer (211) capable of absorbing incident radiation (231) having a first spectral distribution without generating a photocurrent, while simultaneously transmitting incident radiation having a second spectral distribution to the intrinsic layer (212) for generating a photocurrent (213). The photodiode may be used in connection with detecting the presence of target molecules that has been labeled with labeling agents, such as fluorophores or quantum dots. The labeling agents are characterized by the Stokes shift and, therefore, they emit fluorescent radiation having the second spectral distribution that is spectrally shifted from the illumination radiation having the first spectral distribution.

Abstract: Dual seed semiconductor photodetectors and methods to fabricate thereof are described. A dual seed semiconductor photodetector is formed directly on an insulating layer on a substrate. The dual seed semiconductor photodetector includes an optical layer formed on a dual seed semiconductor layer. The dual seed semiconductor layer includes a seed layer and a buffer layer. The seed layer of a first material is formed on an insulating layer over a substrate. The buffer layer is formed on the seed layer. Next, an optical layer of a second material is formed on the buffer layer. The buffer layer includes the first material and the second material. In one embodiment, the first material is silicon. In one embodiment, the second material is germanium.

Abstract: An apparatus is provided. The apparatus generally comprises a photoreceptive region and a circuit region formed in a substrate. A multilayer wiring region is then formed on the substrate over at least a portion of the circuit region. The multilayer wiring region includes a wiring layer and a light-blocking layer. The wiring layer is coupled to the circuit region, and the light-blocking wall has a metal layer that is arranged along at least a portion of the perimeter of the photoreceptive region and that is formed in the same process step as the wiring layer.

Abstract: A PIN photodiode having a substrate, a first type electrode layer disposed on the substrate, a first layer of intrinsic material disposed over a portion of the first-type electrode layer, a first type window layer disposed over said intrinsic layer. An island shaped region of intrinsic material is disposed over the window layer and a dielectric layer disposed over the island region and at least the peripheral portion of said island shaped region whereby an opening is formed in the island shaped region. A dopant is diffused through the opening so as to form a PN junction that extends into the first layer of intrinsic material.

Abstract: A backlit photodiode array includes a semiconductor substrate having first and second main surfaces opposite to each other. A first dielectric layer is formed on the first main surface. First and second conductive vias are formed extending from the second main surface through the semiconductor substrate and the first dielectric layer. The first and second conductive vias are isolated from the semiconductor substrate by a second dielectric material. A first anode/cathode layer of a first conductivity is formed on the first dielectric layer and is electrically coupled to the first conductive via. An intrinsic semiconductor layer is formed on the first anode/cathode layer. A second anode/cathode layer of a second conductivity opposite to the first conductivity is formed on the intrinsic semiconductor layer and is electrically coupled to the second conductive via.

Abstract: Embodiments relate to an image sensor. According to embodiments, an image sensor may include a circuitry, a first substrate, a photodiode, a metal interconnection, and an electrical junction region. The circuitry and the metal interconnection may be formed on and/or over the first substrate. The photodiode may contact the metal interconnection and may be formed on and/or over the first substrate. The circuitry may include an electrical junction region on and/or over the first substrate and a first conduction type region on and/or over the electrical junction region and connected to the metal interconnection. According to embodiments, an image sensor and a manufacturing method thereof may provide a vertical integration of circuitry and a photodiode.

Abstract: A semiconductor element is formed on a first surface of the substrate. A resin layer is formed over a second surface of the substrate which is opposite to the first surface of the substrate and on a part of the side surface of the substrate. A step is formed on the side surface of the substrate. The width of the upper section of the substrate with a step is narrower than the lower section of the substrate with a step. Therefore, the substrate can also be a protrusion.

Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.

Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.

Abstract: An apparatus includes a light detector. The light detector includes a substrate with a planar surface and an array of photodiodes located along the planar surface. Each photodiode has a sequence of different semiconductor layers stacked vertically over the planar surface. The photodiodes are electrically connected in series.

Abstract: An ambient light sensor includes a substrate, a buffer layer formed on the substrate, an absorption layer formed on the buffer layer for absorbing the visible light, and a filter layer formed on the absorption layer for filtering infrared light and high-energy photon insensitive to human eye. The absorption layer is a PIN junction having a compositional graded intrinsic layer. The peak wavelength of responsivity spectrum of the ambient light sensor is very close to that of human eye.

Abstract: A photo sensor includes a patterned shielding conductive layer disposed on a transparent substrate, and a buffer dielectric layer, a patterned semiconductor layer, and a dielectric layer disposed on the patterned shielding layer in order. The patterned semiconductor layer includes an intrinsic region, a first doped region, and a second doped region, wherein the first and second doped regions are positioned at two sides of the intrinsic region separately. A patterned transparent conductive layer is disposed on the dielectric layer and covers the boundary of the intrinsic region and the first doped region and the boundary of the intrinsic region and the second doped region. The patterned transparent conductive layer is electrically connected to the patterned shielding conductive layer.

Abstract: The present invention concerns, in part, a method for fabricating a silicon PIN detector component wherein three handle wafers are bonded to the wafer at varying points in the fabrication process. The utilization of three handle wafers during fabrication significantly ease handling concerns associated with what would otherwise be a relatively thin and fragile wafer, providing a stable and strong base for supporting those portions of the wafer that will constitute the PIN detector component. In a variant of the present invention, the third handle wafer comprises an optical element transparent in the wavelength of interest.

Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.

Abstract: An input signal comprising electronic carriers is injected into an impact ionization device with a high electric field whereupon the electronic carriers are accelerated toward an electron collector or hole sink and subsequently ionize additional electrons and holes that accelerated toward the electron collector and hole sink respectively. When properly biased an avalanche effect may occur that is proportional to the current injected into the impact ionization device via the input electrode. As a result, the input signal is amplified to provide an amplified signal. The described amplifier may be integrated with an input device such as a photodiode, and a transimpedance output amplifier onto a common substrate resulting in high performance high density sensor arrays and the like.

Abstract: Embodiments of the invention generally provide apparatuses and methods of substrate temperature control during thin film solar manufacturing. In one embodiment a method for forming a thin film solar cell over a substrate is provided. The method comprises performing a temperature stabilization process on a substrate to pre-heat the substrate for a substrate stabilization time period in a first chamber, calculating a wait time period for a second chamber, wherein the wait time period is bases on the availability of the second chamber, the availability of a vacuum transfer robot adapted to transfer the substrate from the first chamber to the second chamber, or a combination of both the availability of the second chamber and the availability of the vacuum transfer robot, and adjusting the temperature stabilization time period to compensate for the loss of heat from the substrate during the wait time period.

Abstract: An edge viewing semiconductor photodetector may be provided. Light may be transmitted through an optical fiber conduit comprising a core region surrounded by a cladding region. The light may be received at the edge viewing semiconductor photodetector having an active area. The active area may be substantially contained within a first plane. The edge viewing semiconductor photodetector may further have conducting contact pads connected to the active area. The contact pads may be substantially contained within plural planes. The first plane may have its normal direction substantially inclined with respect to a normal direction of the plural planes. The first plane may further have its normal direction substantially inclined with respect to a direction of the received light incident to the active area. Next, a signal may be received from the pads. The signal may correspond to the transmitted light.

Abstract: The invention relates to a fast photodiode and to a method for the production thereof in CMOS technology. The integrated PIN photodiode, which is formed or can be formed by CMOS technology, consists of an anode corresponding to a highly doped p-type substrate with a specific electric resistance of less than 50 mOhm*cm, a lightly p-doped l-region which is adjacent to the anode, and an n-type cathode which corresponds to the doping in the n-well region. The lightly doped l-region has a doping concentration of less than 1014 cm?3 and has a thickness of between 8 and 25 ?m. The cathode region is completely embedded in the very lightly doped l-region. A distance from the edge of the cathode region to a highly doped adjacent region is in the range of 2.5 ?m to 10 ?m.

Abstract: A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed in the first main surface and an anode/cathode region proximate the first main surface and the at least one conductive via. The via extends to the second main surface. The conductive via is isolated from the semiconductor substrate by a first dielectric material. The anode/cathode region is a second conductivity opposite to the first conductivity. The photodetector includes a doped isolation region of a third doping concentration formed in the first main surface and extending through the first layer of the semiconductor substrate to at least the second layer of the semiconductor substrate.

Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor includes a substrate, a first electrode, an intrinsic layer, a second conductive type conduction layer, and a second electrode. Circuitry including a lower interconnection is disposed on the substrate. The first electrode, the intrinsic layer, and the second conductive type conduction layer are sequentially stacked on the substrate. The second electrode is disposed on the second conductive type conduction layer and includes a non-explosive transparent electrode.

Abstract: An image sensor including a second line formed at an upper part of a photodiode region as a transparent electrode for passing light. The second line is composed of a polymeric material having transparency and conductivity.

Abstract: A semiconductor photodiode includes: an insulative substrate; a first conductivity type semiconductor layer formed on the insulative substrate; an i-type semiconductor layer formed on the first conductivity type semiconductor layer; a second conductivity type semiconductor layer formed on the i-type semiconductor layer; and a metal electrode. The metal electrode is provided between the insulative substrate and the first conductivity type semiconductor layer so that a peripheral face of the metal electrode is located inside a peripheral face of the first conductivity type semiconductor layer.

Abstract: An image sensor and method of manufacturing the same are provided. According to an embodiment, the image sensor comprises: a circuit including an interconnection on a substrate; a lower electrode on the interconnection; a separated intrinsic layer on the lower electrode; a second conductive type conduction layer on the separated intrinsic layer; and an upper electrode on the second conductive type conduction layer. The separated intrinsic layer can have an inwardly sloping sidewall to focus light incident the photodiode for the unit pixel.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.

Abstract: An image sensor with a plurality of photodiodes that each have a first region constructed from a first type of material and a second region constructed from a second type of material. The photodiodes also have an insulating region between the first and second regions. The photodiodes are arranged in an array. In corner regions of the array, the second regions are offset relative to the insulating regions to capture more photons of incoming light.

Abstract: A photoelectric conversion device includes a p-type layer, an i-type layer and an n-type layer each made of a silicon base semiconductor, stacked in this order, wherein the i-type layer contains n-type impurities in a concentration of 1.0×1016 to 2.0×1017 cm?3.