Electrical Contact Or Lead (e.g., Lead Frame) (epo) Patents (Class 257/E33.066)
  • Patent number: 8492777
    Abstract: A light emitting diode (LED) package includes a LED package substrate, first LED chips and second LED chips. The LED package substrate includes a substrate, a first bonding pad, second bonding pads and a third bonding pad. The first, second and third bonding pads are disposed on the substrate. The second bonding pads are arranged in an array. The first and third bonding pads are located adjacent respectively to first and last column of the array. The first LED chips are die-bonded on the first bonding pad and wire-bonded respectively to the second bonding pads arranged in first column of the array. The second LED chips are die-bonded on the second bonding pads respectively. In each row except last column, each second LED chip is wire-bonded to the second bonding pad arranged in next column. The second LED chips located in last column are wire-bonded to the third bonding pad.
    Type: Grant
    Filed: April 2, 2011
    Date of Patent: July 23, 2013
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Chung-Chuan Hsieh, Yi-Chun Chen, Yi-Ting Chiu
  • Patent number: 8492789
    Abstract: A light-emitting diode comprises a light-emitting diode chip having a first semiconductor layer, a first electrode, an active layer formed on the first semiconductor layer, a second semiconductor layer formed on the active layer and a second electrode formed on the second semiconductor layer. The first semiconductor layer, the active layer, the second semiconductor layer and the second electrode sequentially compose a stacked multilayer. A blind hole penetrates the second electrode, the second semiconductor layer, the active layer and inside the first semiconductor layer. The first electrode is disposed on the first semiconductor layer inside the blind hole. A first supporting layer and a second supporting layer are respectively disposed on the first electrode and the second electrode, wherein the first supporting layer and the second supporting layer are separated from each other. A method for manufacturing the light-emitting diode is also provided in the disclosure.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: July 23, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Tzu-Chien Hung, Chia-Hui Shen
  • Patent number: 8492786
    Abstract: A light emitting device package is disclosed. The light emitting device package includes a light emitting device disposed on a first lead frame, the light emitting device having an electrode pad on an upper surface thereof, a first wire to electrically interconnect a second lead frame spaced apart from the first lead frame and the electrode pad, and a first bonding ball disposed on the second lead frame, the first bonding ball spaced apart from a first contact point, which is in contact with the first wire and the second lead frame, wherein the first bonding ball is disposed between the first wire and the second lead frame to electrically interconnect the first wire and the second lead frame.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: July 23, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Sunghee Won, Youngsu Chun
  • Publication number: 20130181227
    Abstract: The LED package comprises a substrate with a first conductive type through-hole and a second conductive type through-hole through the substrate; a reflective layer formed on an upper surface of the substrate; a LED die having first conductive type pad and second conductive type pad, wherein the first conductive type pad is aligned with the first conductive type through-hole; a slanting structure of dielectric layer formed adjacent at least one side of the LED die for carrying conductive traces; a conductive trace formed on upper surface of the slanting structure to offer path between the second conductive type pad and the conductive type through-hole; and a refilling material within the first conductive type through-hole and second conductive type through-hole.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 18, 2013
    Applicant: KING DRAGON INTERNATIONAL INC.
    Inventor: Wen Kun YANG
  • Patent number: 8487328
    Abstract: A light emitting device includes a semiconductor package, and a mounting board having first and second wiring components respectively connected to first and second conduction members of the semiconductor package. The semiconductor package includes: a light emitting element; a first conduction member, on one side of which the light emitting element is placed; and a second conduction member whose surface area is smaller than that of the first conduction member, the other side of the first and second conduction members forms the lower face of the semiconductor package. The mounting board includes: a narrow part and a wide part wider than the narrow part, which are formed on the first and second wiring components. At least the narrow part is joined to the first and second conduction members, and the first wiring component has a recess in its interior.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: July 16, 2013
    Assignee: Nichia Corporation
    Inventor: Takuya Nakabayashi
  • Patent number: 8486762
    Abstract: A leadless integrated circuit (IC) package comprising an IC chip mounted to a die-attach area and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die-attach area are all covered with a molding material, with portions of the electrical contacts and die-attach area protruding from a bottom surface of the molding material.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: July 16, 2013
    Assignee: UTAC Hong Kong Limited
    Inventors: John McMillan, Serafin P. Pedron, Jr., Kirk Powell, Adonis Fung
  • Publication number: 20130175560
    Abstract: Solid-state transducers (“SSTs”) and SST arrays having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure. The SST can further include a first contact at the first side and electrically coupled to the first semiconductor material, and a second contact extending from the first side to the second semiconductor material and electrically coupled to the second semiconductor material. A carrier substrate having conductive material can be bonded to the first and second contacts.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 11, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Vladimir Odnoblyudov, Martin F. Schubert, Scott D. Schellhammer, Jeremy S. Frei
  • Publication number: 20130175551
    Abstract: A slim LED package configured to handle large current, having a narrow width, an LED chip mounting area positioned centro-symmetrically within the package, mounting holes positioned equidistantly from the mounting area, wherein multiple packages may be arranged with alternating anode and cathode ends in such a manner that a high-power density radiometric flux line may be created. Some embodiments include current density management areas positioned on one more sides of the LED chip mounting area.
    Type: Application
    Filed: May 10, 2012
    Publication date: July 11, 2013
    Applicant: LUMINUS DEVICES, INC.
    Inventors: Michael Lim, Paul Panaccione, Aaron Breen, Michael Hadley
  • Publication number: 20130168705
    Abstract: A solid-state light-emitting package includes a leadframe, a light-emitting chip, and a sealant. The leadframe includes a first electrode and a second electrode. The first electrode has at least one first contact end, and the second electrode has at least one second contact end. The light-emitting chip is electrically connected to the first electrode and the second electrode and is disposed between the first contact end and the second contact end. The sealant covers the leadframe and the light-emitting chip and has a first surface and a second surface. The first surface is the light output surface for the light-emitting chip. The first electrode and the second electrode are bent toward the first surface, where the first contact end and the second contact end are exposed by the first surface.
    Type: Application
    Filed: July 2, 2012
    Publication date: July 4, 2013
    Applicant: LEXTAR ELECTRONICS CORP.
    Inventor: SHENG PEI LIN
  • Publication number: 20130168722
    Abstract: An SMT LED device includes an LED and a circuit board carrying the LED. The circuit board has two copper pads thereon, each being provided with a solder on an inner later side thereof which faces the other copper pad. The LED includes two pins and each pin includes a horizontal protrusion and a vertical portion. The LED is mounted on the circuit board between the two copper pads. The solders securely and electrically connect the two pins of the LED with the circuit board.
    Type: Application
    Filed: June 18, 2012
    Publication date: July 4, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIH-CHEN LAI
  • Patent number: 8476668
    Abstract: An LED chip comprising a plurality of sub-LEDs on a submount. Electrically conductive and electrically insulating features are included that serially interconnect the sub-LEDs such that an electrical signal applied to the serially interconnected sub-LEDs along the electrically conductive features spreads to the serially interconnected sub-LEDs. A via is included that is arranged to electrically couple one of the sub-LEDs to the submount. The sub-LEDs can be interconnected by more than one of the conductive features, with each one of the conductive features capable of spreading an electrical signal between two of the sub-LEDs.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: July 2, 2013
    Assignee: Cree, Inc.
    Inventors: James Ibbetson, Sten Heikman
  • Patent number: 8476092
    Abstract: According to an embodiment, there is provided a fabricating method for a thin film transistor substrate divided into a display area displaying images and a non-display area beside the display area, the fabricating method comprising: forming a gate wire in the display area, a common voltage line for a MPS (mass production system) test in the non-display area, and a grounding line for the MPS test in the non-display area with same material at the same time; forming a gate insulating layer covering the gate wire and a first insulating layer covering the common voltage line for the MPS test and the grounding line for the MPS test with same material at the same time; forming a data wire crossing the gate wire and defining a pixel area in the display area; and forming a pixel electrode in the pixel area and an electrode layer on the first insulating layer corresponding to the common voltage line for the MPS test and the grounding line for the MPS test with same material at the same time.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: July 2, 2013
    Assignee: LG Display Co., Ltd.
    Inventor: Young-Hun Lee
  • Patent number: 8476669
    Abstract: An LED module includes a first dielectric layer, and a first patterned conductive layer having first, second, and third die-bonding pads. Each die-bonding pad includes a pad body having a die-bonding area, and an extension extended from the pad body. The extension of the first die-bonding pad extends in proximity to the die-bonding area of the second die-bonding pad. The extension of the second die-bonding pad extends in proximity to the die-bonding area of the third die-bonding cad. A second dielectric layer disposed on the first patterned conductive layer includes three dielectric members corresponding respectively to the die-bonding pads of the first patterned conductive layer. Each dielectric member includes a chip-receiving hole exposing the die-bonding area of a respective die-bonding pad for attachment of an LED chip thereto, and a wire-passage hole spaced apart from the chip-receiving hole to expose partially the first patterned conductive layer for bonding a wire.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: July 2, 2013
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-on Technology Corp.
    Inventors: Chih-Lung Liang, Yan-Yu Wang
  • Publication number: 20130161670
    Abstract: Light emitting, diode (LED) packages and processes with improved heat dissipation. In certain embodiments, only metal solder resides in the space between the leadframe and the circuit board, providing good heat conduction from the LED chip to the circuit board. In certain embodiments, sidewalls of the leadframe are tilted to provide improved light emission.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 27, 2013
    Inventor: Sheng-Yang Peng
  • Patent number: 8471288
    Abstract: A Group III nitride semiconductor light-emitting device includes a support, a p-electrode provided on the support, a p-type layer including a Group III nitride semiconductor and provided on the p-electrode, an active layer including a Group III nitride semiconductor and provided on the p-type layer, an n-type layer including a Group III nitride semiconductor and provided on the active layer, an n-electrode which is connected to the n-type layer, a first trench having a depth extending from a back surface of the p-type layer on a side of the p-electrode to reach the n-type layer, an auxiliary electrode which is in contact with a back surface of the n-type layer at a bottom of the first trench, but is not in contact with side walls of the first trench, and an insulating film which exhibits light permeability.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: June 25, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Toshiya Uemura, Jun Ito
  • Publication number: 20130153936
    Abstract: A device manufacturing method including substrate preparation, pixel electrode formation, photosensitive film formation, first part exposure, second part exposure, and development. In first part exposure, after execution of photosensitive film formation, first photomask is arranged to face substrate and exposure is performed to cause first part of photosensitive film to be exposed to light via first photomask. In second part exposure, after or together with execution of first part exposure, second photomask is arranged to face substrate and exposure is performed to cause second part of photosensitive film, which is different from first part at least partially, to be exposed to light via second photomask. In second part exposure, second photomask is arranged such that end thereof overlaps with end of first photomask, and overlap between first and second photomasks positionally corresponds to electrical wire.
    Type: Application
    Filed: June 7, 2012
    Publication date: June 20, 2013
    Applicant: PANASONIC CORPORATION
    Inventor: Seiji NISHIYAMA
  • Publication number: 20130153932
    Abstract: A method for manufacturing a photocoupler includes: mounting light emitting devices and light receiving devices on a lead frame sheet; positioning the lead frame sheet with respect to a die by cutting off the one set of column portions from a linking portion and inserting a first pilot pin formed on the die into a second pilot hole; opposing the light emitting devices and the light receiving devices to each other; connecting the light emitting side coupling bars and the light receiving side coupling bars to each other on the die; forming a resin body so as to cover a pair of the light emitting device and the light receiving device; and cutting off the light emitting side lead frame portion from the light emitting column portion and cutting off the light receiving side lead frame portion from the light receiving column portion.
    Type: Application
    Filed: May 18, 2012
    Publication date: June 20, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Teruo Takeuchi, Atsushi Takeshita
  • Patent number: 8466487
    Abstract: A semiconductor light emitting element has a first electrode and a second electrode provided on a semiconductor layer; the first electrode has a first external connector and a first extended portion and second extended portion that extend from the first external connector, the second electrode has a second external connector, and a third extended portion, a fourth extended portion, and a fifth extended portion that extend from the second external connector, the third extended portion extends along the first extended portion and farther outside than the first extended portion, the fourth extended portion extends along the second extended portion and farther outside than the second extended portion, and the fifth extended portion extends an area between the third extended portion and the fourth extended portion to the first external connector side, and the fifth extended portion is either on a line that links a point on the first extended portion at the position closest to the second external connector and a po
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: June 18, 2013
    Assignee: Nichia Corporation
    Inventor: Keiji Emura
  • Patent number: 8461631
    Abstract: A composite contact for a semiconductor device is provided. The composite contact includes a DC conducting electrode that is attached to a semiconductor layer in the device, and a capacitive electrode that is partially over the DC conducting electrode and extends beyond the DC conducting electrode. The composite contact provides a combined resistive-capacitive coupling to the semiconductor layer. As a result, a contact impedance is reduced when the corresponding semiconductor device is operated at high frequencies.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: June 11, 2013
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Michael Shur, Remigijus Gaska
  • Patent number: 8461603
    Abstract: A lamp module is provided, including a circuit board, at least an LED, an insulator and a metal barrier. The LED is disposed on the circuit board and has two conductive leads on opposite sides thereof. The insulator is disposed on the circuit board, having an opening and two protruding sheets. The metal barrier is disposed on the insulator, wherein the LED and the protruding sheets are extended through the metal barrier. The conductive leads are insulated from the metal barrier by the protruding sheets of the insulating member.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: June 11, 2013
    Assignee: Delta Electronics, Inc.
    Inventors: Hsiang-Chen Wu, Liming Chen
  • Patent number: 8461604
    Abstract: An optoelectronic module is described including a carrier substrate and a plurality of radiation-emitting semiconductor components. The carrier substrate includes structured conductor tracks. The radiation-emitting semiconductor components each include an active layer suitable for generating electromagnetic radiation, a first contact area and a second contact area. The first contact area is in each case arranged on that side of the radiation-emitting semiconductor components that is remote from the carrier substrate. The radiation-emitting semiconductor components are provided with an electrically insulating layer, which in each case has a cutout in a region of the first contact area. Conductive structures are arranged in regions on the electrically insulating layer.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: June 11, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Bert Braune, Jörg Erich Sorg, Walter Wegleiter, Karl Weidner, Oliver Wutz
  • Publication number: 20130140994
    Abstract: Solid state transducer devices with independently controlled regions, and associated systems and methods are disclosed. A solid state transducer device in accordance with a particular embodiment includes a transducer structure having a first semiconductor material, a second semiconductor material and an active region between the first and second semiconductor materials, the active region including a continuous portion having a first region and a second region. A first contact is electrically connected to the first semiconductor material to direct a first electrical input to the first region along a first path, and a second contact electrically spaced apart from the first contact and connected to the first semiconductor material to direct a second electrical input to the second region along a second path different than the first path. A third electrical contact is electrically connected to the second semiconductor material.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 6, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Robert R. Rhodehouse
  • Publication number: 20130140712
    Abstract: The invention discloses an array substrate, an LCD device, and a method for manufacturing the array substrate. The array substrate comprises scan line(s) and data line(s); the width of data line at the junction of the data line and the scan line is more than the width of the rest part of the data line. The invention can improve the final passed yield of LCD devices on the premise of not adding additional processes, and has the advantages of simple technology and low cost.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 6, 2013
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Hungjui Chen
  • Patent number: 8455986
    Abstract: A semiconductor device featuring a semiconductor chip having a first main surface and a second, opposing main surface and including a MOSFET having source and gate electrodes formed on the first main surface and a drain electrode thereof formed on the second main surface, first and second conductive members acting as lead terminals for the source and gate electrodes, respectively, are disposed over the first main surface, each of the first and second conductive members has a part overlapped with the chip in a plan view, a sealing body sealing the chip and parts of the first and second conductive members such that a part of the first conductive member is projected outwardly from a first side surface of the sealing body and parts of the first and second conductive members are projected outwardly from the opposing second side surface of the sealing body in a plan view.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: June 4, 2013
    Assignees: Renesas Electronics Corporation, Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Ryoichi Kajiwara, Masahiro Koizumi, Toshiaki Morita, Kazuya Takahashi, Munehisa Kishimoto, Shigeru Ishii, Toshinori Hirashima, Yasushi Takahashi, Toshiyuki Hata, Hiroshi Sato, Keiichi Ookawa
  • Patent number: 8455912
    Abstract: A light-emitting device which includes a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; and a light emitting layer provided between the first and second semiconductor layers, the device comprises a first electrode formed on the first semiconductor layer; a second electrode formed on the second semiconductor layer; and a light-transmissive electrode covering the second semiconductor layer and the second electrode, wherein contact between the second electrode and the second semiconductor layer is non-ohmic, and the second electrode has a stacked structure including a lower layer and an upper layer whose contact resistance with the light-transmissive electrode is lower than that of the lower layer, part of the second electrode being exposed through an opening formed in the light-transmissive electrode.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: June 4, 2013
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Satoshi Tanaka, Yusuke Yokobayashi
  • Publication number: 20130134471
    Abstract: An LED substrate structure has a substrate and a conducting portion. The substrate has a bottom surface and two opposite first lateral surfaces connected with the bottom surface. The bottom surface has the conducting portion formed thereon, and the conducting portion has a first cutting segment located on a contact border defined between one of the two first lateral surfaces and the bottom surface. The conducting portion further has an expansion region connected with the first cutting segment. The length of the first cutting segment is shorter than any segment taken on the expansion region parallel thereto.
    Type: Application
    Filed: July 10, 2012
    Publication date: May 30, 2013
    Applicants: LITE-ON TECHNOLOGY CORPORATION, SILITEK ELECTRONIC (GUANGZHOU) CO., LTD.
    Inventors: HOU-TE LEE, TSUNG-KANG YING, CHIA-HUNG CHU, SHIH-PO YU
  • Publication number: 20130134470
    Abstract: Disclosed herein is a light emitting diode package module, including: a substrate; a light emitting diode package formed on the substrate; an instrument member formed below the substrate; and a magnetic body formed on the substrate, the light emitting diode package, or the instrument member.
    Type: Application
    Filed: June 29, 2012
    Publication date: May 30, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Sang Hyun SHIN
  • Patent number: 8450751
    Abstract: An optoelectronic semiconductor body includes a semiconductor layer sequence which has an active layer suitable for generating electromagnetic radiation, and a first and a second electrical connecting layer. The semiconductor body is provided for emitting electromagnetic radiation from a front side. The first and the second electrical connecting layer are arranged at a rear side opposite the front side and are electrically insulated from one another by means of a separating layer. The first electrical connecting layer, the second electrical connecting layer and the separating layer laterally overlap and a partial region of the second electrical connecting layer extends from the rear side through a breakthrough in the active layer in the direction of the front side. Furthermore, a method for producing such an optoelectronic semiconductor body is specified.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: May 28, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Karl Engl, Patrick Rode, Lutz Hoeppel, Matthias Sabathil
  • Patent number: 8450756
    Abstract: A formed, multi-dimensional light-emitting diode (LED) array is disclosed. A substrate is bent into a trapezoidal shape having different sections facing in different directions. Each section has one or more mounted LEDs that emit light with an azimuthally non-circular, monotonic angular distribution. A converter material is placed in an optical path of the LEDs to alter characteristics of the light from the LEDs.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: May 28, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Samuel C. Strickler, Nickolaus W. Kaiser
  • Patent number: 8450769
    Abstract: An object is to provide a light-emitting device having a structure in which an external connection portion can easily be connected and a method for manufacturing the light-emitting device. A light-emitting device includes a lower support 110, a base insulating film 112 over the lower support 110 which has a through-hole 130, a light-emitting element 127 over the base insulating film 112, and an upper support 122 over the light-emitting element 127. An electrode 131 is provided in the through-hole 130, and the external connection terminal 132 electrically connected to the electrode 131 is provided below the base insulating film 112. The external connection terminal 132 is electrically connected to the external connection portion 133 and functions as a terminal that inputs a signal or a power supply into the light-emitting device. This light-emitting device has a structure in which an external connection portion can easily be connected.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 28, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kaoru Hatano, Satoshi Seo
  • Patent number: 8450762
    Abstract: Disclosed are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes the light emitting structure layer including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first and second conductive semiconductor layers, a conductive support substrate electrically connected to the second conductive semiconductor layer, a contact electrically connected to the first conductive semiconductor layer, a dielectric material making contact with the contact and interposed between the contact and the conductive support substrate, and an insulating layer electrically insulating the contact from the active layer, the second conductive semiconductor layer, and the conductive support substrate.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: May 28, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hwan Hee Jeong
  • Patent number: 8450760
    Abstract: One or more circuit elements such as silicon diodes, resistors, capacitors, and inductors are disposed between the semiconductor structure of a semiconductor light emitting device and the connection layers used to connect the device to an external structure. In some embodiments, the n-contacts to the semiconductor structure are distributed across multiple vias, which are isolated from the p-contacts by one or more dielectric layers. The circuit elements are formed in the contacts-dielectric layers-connection layers stack.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: May 28, 2013
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Jerome C. Bhat, Steven T. Boles
  • Publication number: 20130126891
    Abstract: A micro light emitting diode (LED) and a method of forming an array of micro LEDs for transfer to a receiving substrate are described. The micro LED structure may include a micro p-n diode and a metallization layer, with the metallization layer between the micro p-n diode and a bonding layer. A conformal dielectric barrier layer may span sidewalls of the micro p-n diode. The micro LED structure and micro LED array may be picked up and transferred to a receiving substrate.
    Type: Application
    Filed: February 13, 2012
    Publication date: May 23, 2013
    Inventors: Andreas Bibl, John A. Higginson, Hung-Fai Stephen Law, Hsin-Hua Hu
  • Publication number: 20130130417
    Abstract: A method for manufacturing a light-emitting device includes steps of: providing a substrate comprising an upper surface and a lower surface opposite to the upper surface; processing the upper surface to be an uneven surface; forming a light-emitting structure on the upper surface of the substrate; and forming a hole through the substrate by radiating a coherent laser beam to the lower surface of the substrate for a predetermined time; wherein the band gap energy of the coherent laser beam is higher than the band gap energy of the substrate thereby the substrate is etched away by the laser beam.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Inventors: Jar-Yu WU, Biau-Dar Chen, Chun-Lung Tseng, Chih-Hung Wang, Hung-Yao Lin
  • Patent number: 8445933
    Abstract: Disclosed is a light emitting diode (LED) package having an array of light emitting cells coupled in series. The LED package comprises a package body and an LED chip mounted on the package body. The LED chip has an array of light emitting cells coupled in series. Since the LED chip having the array of light emitting cells coupled in series is mounted on the LED package, it can be driven directly using an AC power source.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: May 21, 2013
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Chung Hoon Lee, Keon Young Lee, Hong San Kim, Dae Won Kim, Hyuck Jung Choi
  • Publication number: 20130119412
    Abstract: An electro-optical device formed on a semiconductor substrate, includes: a first transistor controlling a current level according to a voltage between a gate and a source; a second transistor electrically connected between a data line and the gate of the first transistor; a third transistor electrically connected between the gate and a drain of the first transistor; and a light-emitting element emitting light at a luminance according to the current level, in which one of a source and a drain of the second transistor and one of a source and a drain of the third transistor are formed by a common diffusion layer.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 16, 2013
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Seiko Epson Corporation
  • Publication number: 20130113015
    Abstract: A substrate includes a first lead frame, a second lead frame, and a resin layer. The first lead frame includes a heat sink and a plurality of electrodes for external connection. The second lead frame is laminated on the first lead frame and includes a plurality of wirings for mounting light emitting elements. The resin layer is filled between the first lead frame and the second lead frame. The plurality of wirings are arranged above the heat sink. The plurality of electrodes and part of the plurality of wirings are joined with each other.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 9, 2013
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: SHINKO ELECTRIC INDUSTRIES CO., LTD.
  • Publication number: 20130113000
    Abstract: Display substrates are disclosed. In one aspect, display substrates include a first signal line, a second signal line, a first detour signal line and a second detour signal line. The first signal line includes a first region and a pair of second regions disposed on opposite sides of the first region. The pair of second regions are spaced apart from the first region. The second signal line crosses the first signal line. The second signal line includes a third region and a pair of fourth regions disposed on opposite sides of the third region. The pair of fourth regions are spaced apart from the third region. The first detour signal line electrically connects the pair of second regions to each other. The second detour signal line electrically connects the pair of fourth regions to each other. Related methods are also disclosed.
    Type: Application
    Filed: April 30, 2012
    Publication date: May 9, 2013
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Yul Kyu Lee, Sun Park, Jong-Hyun Park, Jun Hoo Choi
  • Patent number: 8436394
    Abstract: A luminescence diode chip includes a semiconductor layer sequence having an active layer suitable for generating electromagnetic radiation, and a first electrical connection layer, which touches and makes electrically conductive contact with the semiconductor layer sequence. The first electrical connection layer touches and makes contact with the semiconductor layer sequence in particular with a plurality of contact areas. In the case of the luminescence diode chip, an inhomogeneous current density distribution or current distribution is set in a targeted manner in the semiconductor layer sequence by means of an inhomogeneous distribution of an area density of the contact areas along a main plane of extent of the semiconductor layer sequence.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: May 7, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Peter Brick, Matthias Sabathil, Hagen Luckner
  • Publication number: 20130105853
    Abstract: The present invention relates to an encapsulant for ultraviolet light emitting diodes. It is an object of the present invention to provide an encapsulant for UV LEDs emitting below 350 nm resulting in an increased extraction efficiency of the LED. According to the invention, a light emitting diode is disclosed comprising a radiation zone (12) which is electrically connected to a first contact (14) and to a second contact (16), and an encapsulant (18) encapsulating at least part of the radiation zone (12), the first contact (14) and the second contact (16), wherein the encapsulant (18) comprises polydimethylsiloxane.
    Type: Application
    Filed: October 25, 2012
    Publication date: May 2, 2013
    Applicant: Forschungsverbund Berlin E.V.
    Inventors: Michael KNEISSL, Neysha Lobo
  • Publication number: 20130105844
    Abstract: A flip-chip light emitting diode comprises a transparent base-plate, at least a first electrical semi-conductive layer, a light emitting layer, a second electrical semi-conductive layer, at least a first ohmic contact, a second ohmic contact and a third ohmic contact are installed above the transparent base-plate. The at least first ohmic contact is electrically connected to the third ohmic contact through a connection passage. A first electrode area is formed above the second electrical semi-conductive layer. The second ohmic contact is disposed above the transparent base-plate and adjacent to a side of the first ohmic contact. A second electrode area is formed on the second ohmic contact.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 2, 2013
    Applicant: RGB CONSULTING CO., LTD.
    Inventor: RGB Consulting Co., Ltd.
  • Publication number: 20130105851
    Abstract: Exemplary embodiments of the present invention provide a light emitting diode package including a light emitting diode chip, a lead frame having a chip area on which the light emitting diode chip is arranged, and a package body supporting the lead frame. The lead frame includes a first terminal group arranged at a first side of the chip area and a second terminal group arranged at a second side of the chip area. The first terminal group and the second terminal group each include a first terminal and a second terminal, and in at least one of the first terminal group and the second terminal group, the first terminal is connected to the chip area and the second terminal is separated from the chip area. The first terminal has a first width, the second terminal has a second width, and the first width is different than the second width.
    Type: Application
    Filed: December 30, 2011
    Publication date: May 2, 2013
    Applicant: SEOUL SEMICONDUCTOR CO., LTD.
    Inventors: Byoung Sung KIM, Sang Eun LIM, Jae Jin LEE, Yeoun Chul SON
  • Patent number: 8431952
    Abstract: In order to provide a light emitting device at low costs with high reliability, while suppressing deterioration in luminance of light emitting elements due to the existence of a protection element, the protection element is mounted on a mounting surface of a first lead terminal located inside a cavity in a resin section, and a light emitting element is mounted on a bottom of a recess section of a second lead terminal located in the cavity, so that the protection element is located above the light emitting device.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: April 30, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshio Hata, Takahiro Nemoto
  • Publication number: 20130099273
    Abstract: A wiring substrate includes a substrate, a first insulating layer formed on the substrate, wiring patterns formed on a first surface of the first insulating layer, and a second insulating layer formed on the first surface of the first insulating layer. The second insulating layer covers the wiring patterns and includes a first opening that partially exposes adjacent wiring patterns as a pad. A projection is formed in an outer portion of the substrate located outward from where the first opening is arranged. The projection rises in a thickness direction of the substrate.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 25, 2013
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: SHINKO ELECTRIC INDUSTRIES CO., LTD.
  • Publication number: 20130099265
    Abstract: Disclosed is a light emitting device. The light emitting device includes a light emitting structure comprising a first area comprising a first semiconductor layer doped with a first dopant, a second semiconductor layer doped with a second dopant and a first active layer, and a second area comprising a third semiconductor layer doped with the first dopant and comprising an exposed region, a fourth semiconductor layer arranged on the third semiconductor layer except for the exposed region and doped with the second dopant and a second active layer, and provided with first and second trenche formed from the fourth semiconductor layer to the first semiconductor layer and separated from each other, a first electrode comprising first and second electrode pad, a second electrode, and a third electrode arranged on the fourth semiconductor layer and comprising a third electrode pad, a fourth electrode pad and a fifth electrode pad.
    Type: Application
    Filed: March 29, 2012
    Publication date: April 25, 2013
    Inventor: Sungmin HWANG
  • Patent number: 8426886
    Abstract: A light emitting device includes a light emitting element, a wire connected to the light emitting element, and a substrate supporting the light emitting element. The substrate is formed with a first recess and a second recess that are open in a common surface of the substrate. The first recess includes a first bottom surface and a first side surface connected to the first bottom surface, and the light emitting element is disposed on the first bottom surface. The second recess includes a second bottom surface and a second side surface connected to the second bottom surface, and the wire is bonded to the second bottom surface. Both of the first side surface and the second side surface reach the common surface. The first side surface is connected to both of the second bottom surface and the second side surface. The opening area of the first recess is larger than the opening area of the second recess.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: April 23, 2013
    Inventors: Yuki Tanuma, Tomoharu Horio
  • Patent number: 8426860
    Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Mizuki Sato
  • Patent number: 8426226
    Abstract: A method for fabricating an integrated AC LED module comprises steps: forming a junction layer on a substrate, and defining a first growth area and a second growth area on the junction layer; respectively growing a Schottky diode and a LED on the first growth area and the second growth area; forming a passivation layer and a metallic layer on the Schottky diode, the LED and the substrate. Thereby, the Schottky diode is electrically connected with the LED via the metallic layer. Thus is promoted the reliability of electric connection of diodes, reduced the layout area of the module, and decreased the fabrication cost.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: April 23, 2013
    Assignee: National Central University
    Inventors: Jen-Inn Chyi, Geng-Yen Lee, Wei-Sheng Lin
  • Publication number: 20130092962
    Abstract: A light emitting device (LED), a manufacturing method thereof, and an LED module using the same. The LED may include a first semiconductor layer, an active layer, and a second semiconductor layer formed sequentially on a light-transmitting substrate, a first electrode formed in a region exposed by removing a part of the first semiconductor layer, a second electrode formed on the second semiconductor layer, a passivation layer formed on the first electrode and the second electrode to expose a region of the first electrode and a region of the second electrode, a first bump formed in a first region including the first electrode exposed through the passivation layer, and extended to another region of the second electrode on which the passivation layer is formed, and a second bump formed in a second region including the second electrode exposed through the passivation layer.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 18, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho Sun Paek, Hak Hwan Kim, Ill Heung Choi, Kyung Mi Moon
  • Patent number: 8421109
    Abstract: A light-emitting apparatus package of the present invention includes (i) an electrically insulated ceramic substrate, (ii) a first concave section formed in the direction of thickness of the ceramic substrate so as to form a light exit aperture in a surface of the ceramic substrate, (iii) a second concave section formed within the first concave section in the further direction of thickness of the ceramic substrate so that one or more light-emitting devices are provided therein, (iv) a wiring pattern for supplying electricity, which is provided in the first concave section, and (v) a metalized layer having light-reflectivity, which is (a) provided between the light-emitting device and the surface of the second concave section of the substrate, and (b) electrically insulated from the wiring pattern.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: April 16, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tsukasa Inoguchi