Manufacturing Circuit On Or In Base Patents (Class 29/846)
-
Publication number: 20140175176Abstract: A security document (1, 1?), comprising: a base layer (10, 10?) having a through hole (15, 15?) extending from a first side of the base layer (10, 10?) to a second side of the base layer (10, 10?); a first cover layer (11, 11?) attached on the first side of the base layer (10, 10?); a second cover layer (12, 12?) attached on the second side of the base layer (10, 10?); and an electronic module (4, 4?) arranged in said through hole (15, 15?). The security document (1, 1?) further comprises a first patch (21, 21?) attached to the security document (1, 1?) by hot stamping and located between the base layer (10, 10?) and the first cover layer (11, 11?), the first patch (21, 21?) surrounding the through hole (15, 15?) and covering a perimeter area around the through hole (15, 15?) on the first side of the base layer (10, 10?), thereby preventing attachment of the base layer (10, 10?) to the first cover layer (11, 11?) in the region of the perimeter area.Type: ApplicationFiled: November 29, 2011Publication date: June 26, 2014Inventors: Mikko Lankinen, Taru Syrjänen
-
Publication number: 20140176285Abstract: A ceramic electronic component includes a magnetic section composed of a ferrite material and a coil conductor containing Cu as its main constituent. The magnetic section is formed from Ni—Cu—Zn ferrite which falls within the range specified by (x, y)=A (25, 1), B (47, 1), C (47, 7.5), D (46, 7.5), E (46, 10), F (30, 10), G (30, 7.5), and H (25, 7.5) when the molar content x of Fe2O3 and the molar content y of Mn2O3 are represented by (x, y). A CuO molar content of 0.5 to 10.0 mol %, a ZnO content of 1.0 to 35.0 mol %, a MgO content of 5.0 to 35.0 mol %, and NiO as the balance is present. Even when co-firing with a conductive material containing Cu as its main constituent, insulation properties are ensured, favorable electrical properties are achieved, and a ceramic electronic component is achieved.Type: ApplicationFiled: February 27, 2014Publication date: June 26, 2014Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Akihiro NAKAMURA, Atsushi YAMAMOTO
-
Patent number: 8756805Abstract: A method of manufacturing a multilayer board, including: forming a hole through a pre-preg by laser, filling the hole with conductive paste containing a resin component and metal powder, and arranging copper layer portions of patterned boards on and under the filled conductive paste and pressing the same, wherein in the conductive paste at least surface layers of the different metal powders are melted and alloyed, the pre-preg has a ratio A/B of at least 10 before being subjected to preheating, where A is a storage modulus at an inflection point where the storage modulus changes from increasing to decreasing and B is a storage modulus at an inflection point where the storage modulus changes from decreasing to increasing in a temperature rising from 60 to 200 degree C., and preheating the pre-preg before the drilling step to reduce the ratio A/B to below 10.Type: GrantFiled: March 9, 2010Date of Patent: June 24, 2014Assignee: Tatsuta Electric Wire & Cable Co., Ltd.Inventors: Norihiro Yamaguchi, Hiroaki Umeda, Ken Yukawa
-
Patent number: 8756776Abstract: A method of manufacturing a microactuator. The method includes providing a sheet of a piezoelectric material having an electrically conductive layer on at least one side of the sheet. The method includes cutting the sheet to form a plurality of piezoelectric elements. Each of the piezoelectric elements includes a first element side with an electrically conductive layer. Each first element side includes a peripheral portion and an exposed portion interior to the peripheral portion. The method includes forming an encapsulation layer over the peripheral portion and not over the exposed portion of at least one of the sides. The encapsulation layer comprises a material of lesser electrical conductivity than the electrically conductive layer. An apparatus for manufacturing the microactuators may also be provided that includes a first fixture and first and second alignment combs.Type: GrantFiled: October 14, 2009Date of Patent: June 24, 2014Assignee: Western Digital Technologies, Inc.Inventors: Yih-Jen D. Chen, Robert J. McNab
-
Patent number: 8756778Abstract: A method of adjustment during manufacture of a capacitance of a capacitor supported by a substrate, the method including the steps of: a) forming a first electrode parallel to the surface of the substrate and covering it with a dielectric layer; b) forming, on a first portion of the dielectric layer, a second electrode; c) measuring the electrical signal between the first electrode and the second electrode, and deducing therefrom the capacitance to be added to obtain the desired capacitance; d) thinning down a second portion of the dielectric layer, which is not covered by the second electrode, so that the thickness of this second portion is adapted to the forming of the deduced capacitance; and e) forming a third electrode on the thinned-down portion and connecting it to the second electrode.Type: GrantFiled: June 13, 2011Date of Patent: June 24, 2014Assignee: STMicroelectronics SAInventors: Pierre Bar, Sylvain Joblot, David Petit
-
Patent number: 8756804Abstract: Disclosed is a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided.Type: GrantFiled: August 19, 2011Date of Patent: June 24, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hyung Jin Jeon, Young Do Kweon, Seung Wook Park, Seon Hee Moon
-
Publication number: 20140167500Abstract: A method for installing an electric system into an aircraft fuselage. The object to provide a method for simply and quickly installing an electric system into an aircraft fuselage, wherein the electric system is as little heavy and space consuming as possible, and wherein a wide range of customized alternatives of the electric system is possible, is achieved by the steps of providing a fuselage element extending along an aircraft longitudinal axis and including an outer skin and an interior surface, providing a foil sheet of an electrically insulating substrate material, attaching said foil sheet on the inner side of said fuselage element, applying particles of electrically conductive material onto the inner surface of said attached foil sheet opposite the outer skin in a predetermined pattern, such that the accumulated particles of electrically conductive material form electric conductor elements along said inner surface of said foil sheet.Type: ApplicationFiled: September 3, 2013Publication date: June 19, 2014Inventor: Eckart Frankenberger
-
Patent number: 8754337Abstract: An object of the invention is to provide a method for fabricating a printed wiring board that can suppress warping of the printed wiring board and can improve the yield of semiconductor chip mounting and enhance the reliability of a semiconductor package. The printed wiring board fabrication method according to the invention is a method for fabricating a printed wiring board having a through-hole in a core layer, wherein the printed wiring board fabrication method includes the step of applying a laser from one side of the core layer to a position where the through-hole is to be formed in the core layer and the step of applying a laser to the same position from the opposite side of the core layer.Type: GrantFiled: March 26, 2010Date of Patent: June 17, 2014Assignee: Sumitomo Bakelite Co., Ltd.Inventor: Kenichi Kaneda
-
Patent number: 8752285Abstract: A textile-type electronic component package includes a textile base; a textile-type electronic component and a plurality of conductive patterns having end contact points formed on the top surface of the textile base; a thermoplastic adhesive formed on the bottom surface of the textile base; a plurality of mounting pads formed on the thermoplastic adhesive and facing the conductive patterns, respectively; and a plurality of via-hole-type coupling parts penetrating end contact points of the conductive patterns, the textile base, and the thermoplastic adhesive, and electrically coupling the mounting pads and the conductive patterns, wherein the via-hole-type coupling parts includes a bunch of via-holes filled with a conductive polymer.Type: GrantFiled: March 16, 2011Date of Patent: June 17, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Yong Ki Son, Baesun Kim, Ji Eun Kim
-
Patent number: 8752280Abstract: A method for manufacturing a Z-directed component for insertion into a mounting hole in a printed circuit board according to one example embodiment includes extruding a substrate material according to the shape of the Z-directed component. A conductive material is then selectively applied to the extruded substrate material and the Z-directed component is formed from the extruded substrate material.Type: GrantFiled: September 30, 2011Date of Patent: June 17, 2014Assignee: Lexmark International, Inc.Inventor: Keith Bryan Hardin
-
Patent number: 8752284Abstract: A method of producing a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.Type: GrantFiled: March 13, 2008Date of Patent: June 17, 2014Assignee: International Business Machines CorporationInventors: Gareth G. Hougham, Brian S. Beaman, Evan G. Colgan, Paul W. Coteus, Stefano S. Oggioni, Enrique Vargas
-
Patent number: 8752274Abstract: The present invention provides a method for mounting light bar that enhances central point brightness of backlight module, which includes (1) providing a PCB and LED lamps of different luminous intensities among which the difference is less than 20%; (2) positioning the LED lamps on the PCB in a spaced manner and electrically connected to the PCB; (3) providing a backlight module main body; (4) positioning the PCB with the LED lamps on the backlight module main body to form a the backlight module; (5) measuring central point brightness and illumination homogeneity; (6) adjusting the spacing distance between the LED lamps according to predetermined central point brightness and illumination homogeneity so as to have the central point brightness and illumination homogeneity of the LED lamps satisfying requirements; and (7) mounting the LED lamps to the PCB so as to form an LED light bar.Type: GrantFiled: June 7, 2012Date of Patent: June 17, 2014Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.Inventors: Chechang Hu, Jing Zhang
-
Publication number: 20140160707Abstract: Some embodiments described herein include apparatuses and methods of forming such apparatuses. One such embodiment may include a routing arrangement having pads to be coupled to a semiconductor die, with a first trace coupled to a first pad among the pads, and a second trace coupled to a second pad among the pads. The first and second traces may have different thicknesses. Other embodiments including additional apparatuses and methods are described.Type: ApplicationFiled: December 6, 2012Publication date: June 12, 2014Inventors: Zhichao Zhang, Tao Wu, Zhiguo Qian, Kemal Aygun
-
Publication number: 20140158402Abstract: A method for producing one or more radio-frequency resonant patterns on a printed circuit includes a step of cutting one or more resonant patterns directly into the printed circuit whilst preserving means for mechanically securing the resonant patterns to said printed circuit. The method may be applied to the production of filters.Type: ApplicationFiled: December 11, 2013Publication date: June 12, 2014Inventor: Pierre GUERN
-
Patent number: 8745864Abstract: Systems and methods of coupling digitizing sensors to a structure are disclosed. A particular method includes applying one or more communication traces and one or more power traces to a structure using at least one direct-write technique. The method may also include coupling the one or more communication traces to at least one digitizing sensor. The method may also include coupling the one or more power traces to the at least one digitizing sensor.Type: GrantFiled: August 5, 2010Date of Patent: June 10, 2014Assignee: The Boeing CompanyInventors: Seth S. Kessler, Jeong-Beom Ihn, Christopher T. Dunn, Jeffrey Lynn Duce, Michael G. Borgen
-
Patent number: 8745863Abstract: A method of manufacturing a multi-layer printed circuit board includes the following steps (A) and (B). (A) Providing penetrating openings which are formed into through holes and each of which has a small diameter for a core substrate, and (B) providing penetrating openings which are formed into through holes each having a large diameter for the core substrate.Type: GrantFiled: June 27, 2011Date of Patent: June 10, 2014Assignee: Ibiden Co., Ltd.Inventors: Motoo Asai, Dongdong Wang, Takahiro Mori
-
Patent number: 8745861Abstract: A method of making an electronic storage system includes receiving a substrate with a detection region. A transceiver formed on a transceiver substrate separate from the substrate is affixed to the substrate. A code circuit separate from the transceiver is disposed over the substrate. The code circuit includes a conductor disposed over the substrate at least partly in the detection region. The conductor has an electrical state that changes in response to an environmental factor. The transceiver is electrically connected to the code circuit so that the transceiver can detect the electrical state of the conductor. The transceiver includes an interface adapted to selectively transmit an uplink signal representing the electrical state of the conductor.Type: GrantFiled: April 25, 2012Date of Patent: June 10, 2014Assignee: Eastman Kodak CompanyInventors: Ronald Steven Cok, Christopher Lyons
-
Patent number: 8749323Abstract: Provided are a band stop filter of a CRLH structure and a manufacturing method thereof. A band stop filter of a CRLH structure according to an exemplary embodiment of the present invention includes a microstrip transmission line formed on a substrate; a right handed material (RHM) region including a first stub and a first capacitor connected to the microstrip transmission line in parallel and stopping a signal of a first frequency band passing through the microstrip transmission line; and a left handed material (LHM) region further provided between the first stub and the first capacitor to block a signal of a second frequency band passing through the microstrip transmission line.Type: GrantFiled: May 27, 2011Date of Patent: June 10, 2014Assignees: Electronics and Telecommunications Research Institute, Soongsil University Research Consortium Techno-ParkInventors: Seung Back Jung, Seung In Yang
-
Publication number: 20140153172Abstract: The present disclosure provides techniques for creating a symmetrical ball grid array pattern for an integrated circuit package. The ball grid array includes a symmetrical pattern of circuit connection points, wherein the symmetrical pattern is derived from a base hexagonal pattern that is repeated in at least one or more sections of the ball grid array.Type: ApplicationFiled: December 5, 2012Publication date: June 5, 2014Inventor: Gary Brist
-
Publication number: 20140151095Abstract: Disclosed herein is a printed circuit board, including: a composite sheet including an insulating material and a glass plate bonded to the insulating material; and a circuit layer formed on the composite sheet.Type: ApplicationFiled: December 4, 2013Publication date: June 5, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Suk Hyeon Cho, Tae Hong Min, Seung Yeop Kook, Jung Han Lee, Hye Jin Kim
-
Publication number: 20140150257Abstract: A method of manufacturing a circuit board is described herein. The method may include adding a resin, forming first and second fiberglass fibers, and forming first and second signal line traces capable of transmitting electrical signals. In some examples, a ratio between fiberglass and resin material near the first signal line trace is similar to a ratio between fiberglass and resin material near the second signal line trace. In some examples, the first and second fiberglass fibers diagonally cross near the first and second signal line traces. In some examples, the first and second fiberglass fibers cross near the first and second signal line traces in a zig-zag pattern.Type: ApplicationFiled: February 5, 2014Publication date: June 5, 2014Inventors: David Shykind, James McCall
-
Patent number: 8739401Abstract: A circuit member includes a frame substrate formed, by patterning a rolled copper plate or a rolled copper alloy plate, with a die pad portion for a semiconductor chip to be mounted thereon, and a lead portion for an electrical connection to the semiconductor chip, having rough surfaces formed as roughed surfaces on upsides and lateral wall sides of the die pad portion and the lead portion, and smooth surfaces formed on downsides of the die pad portion and the lead portion, and the die pad portion and the lead portion are buried in a sealing resin, having a downside of the lead portion exposed.Type: GrantFiled: September 9, 2010Date of Patent: June 3, 2014Assignee: Dai Nippon Printing Co., Ltd.Inventors: Yo Shimazaki, Hiroyuki Saito, Masachika Masuda, Kenji Matsumura, Masaru Fukuchi, Takao Ikezawa
-
Patent number: 8742262Abstract: Disclosed herein is a multilayer low temperature co-fired ceramic (LTCC) structure comprising a multilayer low temperature co-fired ceramic comprising glass-ceramic dielectric layers with screen printed thick film inner conductors on portions of the layers and with thin film outer conductors deposited on the upper and lower outer surfaces of the LTCC. At least a portion of the thin film outer conductors is patterned in the form of lines and the spacings between the lines are less then 50 ?m. Also disclosed is a process for making the LTCC structure.Type: GrantFiled: May 30, 2012Date of Patent: June 3, 2014Assignee: E I du Pont de Nemours and CompanyInventors: Scott E. Gordon, Elizabeth D. Hughes, Joao Carlos Malerbi, Deepukumar M. Nair, Kumaran Manikantan Nair, James M. Parisi, Michael Arnett Smith, Ken E. Souders
-
Patent number: 8739399Abstract: A method of making an electronic storage system includes receiving a substrate and a circuit template. A transceiver including a transceiver substrate separate from the substrate is disposed over the substrate. The transceiver includes an output electrical-connection pad, and a plurality of input electrical-connection pads. A circuit template is disposed over the substrate so that at least one of the conductors of the circuit template is electrically connected to the output pad and at least one of the conductors of the circuit template is electrically connected to each of the input pads. At least one electrically-conductive strap is printed over the substrate so that each strap electrically connects the output pad to the at least one of the input pads through at least two of the conductors of the circuit template.Type: GrantFiled: April 25, 2012Date of Patent: June 3, 2014Assignee: Eastman Kodak CompanyInventors: Ronald Steven Cok, Christopher Lyons
-
Patent number: 8743555Abstract: Substrates having power planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a first power plane and a second power plane. The at least one noise suppression structure may include a first power plane extension that extends from the first power plane generally toward the second power plane, and a second power plane extension that extends from the second power plane generally toward the first power plane. Methods for suppressing noise in at least one of the first power plane and second power plane include providing such noise suppression structures between the power planes.Type: GrantFiled: August 13, 2013Date of Patent: June 3, 2014Assignee: Micron Technology, Inc.Inventors: Houfei Chen, Shiyou Zhao
-
Publication number: 20140146612Abstract: An integrated circuit includes a memory array, a wordline circuit, divided into at least two subcircuits, to control the memory array, and a bitline circuit, divided into at least two subcircuits, to control the memory array. The wordline subcircuits and the bitline subcircuits at least partially overlap separate respective regions of the memory array.Type: ApplicationFiled: March 26, 2012Publication date: May 29, 2014Inventors: Mark Helm, Jung Sheng Hoei, Aaron Yip, Dzung Nguyen
-
Publication number: 20140147336Abstract: An impedance biosensor for sensing concentration of a target analyte in a solution includes an insulator substrate, electrically coupled conductive trace units on the substrate, biological sensing films, and an insulator cover. Each trace unit has a first trace and a second trace, each having a sensing end portion and a connecting end portion. The biological sensing films are disposed on the sensing end portions, and have a capture layer for capturing the target analyte. The insulator cover covers the trace units and is formed with window openings that expose the sensing end portions and that cooperate with the insulator substrate to define a space for receiving the solution therein.Type: ApplicationFiled: March 15, 2013Publication date: May 29, 2014Applicant: NATIONAL CHI NAN UNIVERSITYInventors: Tak-Sing CHING, Tai-Ping SUN, Tzong-Ru CHOU
-
Publication number: 20140144689Abstract: A touch-sensor structure includes a substrate having a plurality of grooves formed thereon. A plurality of first axial electrode strips are disposed in the grooves individually. A plurality of second axial electrode strips are disposed on the substrate and intersect with the first axial electrode strips. An insulating layer fills in the grooves and is disposed at the intersections of the first and second axial electrode strips. Furthermore, the manufacturing method of the touch-sensor structure is provided. The insulating layer is disposed in the grooves of the substrate without a protuberant height on the substrate. Therefore, it can overcome a breakage issue in conventional conductive bridges.Type: ApplicationFiled: October 27, 2013Publication date: May 29, 2014Applicant: TPK Touch Solutions (Xiamen) Inc.Inventors: Qiong Yuan, Jing Yu, Hongyan Lian, Pingping Huang
-
Publication number: 20140144680Abstract: A method of producing a wired circuit board includes a first step of preparing a metal supporting layer, a second step of forming, on one side of the metal supporting layer in a thickness direction thereof, an insulating layer having a first opening, and a plurality of terminal formation portions, a third step of forming, on one side of the insulating layer in the thickness direction, a conductive layer having a plurality of terminal portions each corresponding to the plurality of terminal formation portions, a fourth step of partially removing the metal supporting layer to form a second opening and at least one reinforcing metal supporting portion placed between the plurality of terminal formation portions, and a fifth step of removing the plurality of terminal formation portions exposed from the second opening to expose both side surfaces of the plurality of terminal portions in the thickness direction.Type: ApplicationFiled: November 21, 2013Publication date: May 29, 2014Applicant: NITTO DENKO CORPORATIONInventors: Tomoaki OKUNO, Saori KANEZAKI, Tsuyoshi OGURO, Takeshi KAWAKAMI
-
Patent number: 8735740Abstract: A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit.Type: GrantFiled: March 2, 2011Date of Patent: May 27, 2014Assignee: Electro Scientific Industries, Inc.Inventors: Glenn Francis Simenson, William Antoni, Steve Cohen, Jeffrey Howerton
-
Patent number: 8732943Abstract: A liner for an appliance is formed by a plastic sheet formed into a three dimensional shape corresponding to at least a portion of a compartment of the appliance.Type: GrantFiled: November 1, 2011Date of Patent: May 27, 2014Assignee: Whirlpool CorporationInventors: Martin Shawn Egan, Michael E. Stagg, Jr.
-
Patent number: 8732942Abstract: In some embodiments a high speed interconnect includes a layer of FR4 material, a trench in the layer of FR4 material, and a pair of transmission lines located near the trench. The trench is filled with a homogenous material. Other embodiments are described and claimed.Type: GrantFiled: March 26, 2008Date of Patent: May 27, 2014Assignee: Intel CorporationInventors: Stephen H. Hall, Bryce D. Horine, Gary A. Brist, Howard Heck
-
Patent number: 8732925Abstract: An electronic component and method for manufacture thereof is disclosed. A plurality of electrodes are positioned in stacked relation to form an electrode stack. The stack may include as few as two electrodes, but more may be used depending on the number of subcomponents desired. Spacing between adjacent electrodes is determined by removable spacers during fabrication. The resulting space between adjacent electrodes is substantially filled with gaseous matter, which may be an actual gaseous fill, air, or a reduced pressure gas formed through evacuation of the space. Further, adjacent electrodes are bonded together to maintain the spacing. A casing is formed to encapsulate the stack, with first and second conducting surfaces remaining exposed outside the casing. The first conducting surface is electrically coupled to a first of the electrodes, and the second conducting surface is electrically coupled to a second of the electrodes.Type: GrantFiled: April 10, 2012Date of Patent: May 27, 2014Assignee: Yen Technologies, LLCInventor: William S. H. Cheung
-
Patent number: 8732922Abstract: A parylene C polymer that is electrically poled such that it is piezoelectric is presented. Methods for manufacturing the piezoelectric parylene C polymer with an optimal piezoelectric coefficient d33 are also disclosed. Actuators formed with piezoelectric parylene C are disclosed as well as sensor devices that incorporate piezoelectric parylene C using charge integrator circuits in which the integration time is longer than likely adiabatic temperature transients.Type: GrantFiled: October 13, 2011Date of Patent: May 27, 2014Assignee: California Institute of TechnologyInventors: Justin Young Hyun Kim, Austin Cheng, Yu-Chong Tai
-
Patent number: 8732921Abstract: A method for manufacturing a piezoelectric actuator is disclosed that includes forming a vibration plate, forming a plurality of electrodes on the vibration plate, forming a piezoelectric layer on the electrodes, and forming a common electrode on the piezoelectric layer.Type: GrantFiled: December 24, 2008Date of Patent: May 27, 2014Assignee: Brother Kogyo Kabushiki KaishaInventors: Hiroto Sugahara, Kazuo Kobayashi
-
Publication number: 20140138142Abstract: A manufacturing method of an interposed substrate is provided. A metal-stacked layer comprising a first metal layer, an etching stop layer and a second metal layer is formed. A patterned conductor layer is formed on the first metal layer, wherein the patterned conductor layer exposes a portion of the first metal layer. A plurality of conductive pillars is formed on the patterned conductor layer, wherein the conductive pillars are separated from each other and stacked on a portion of the patterned conductor layer. An insulating material layer is formed on the metal-stacked layer, wherein the insulating material layer covers the portion of the first metal layer and encapsulates the conductive pillars and the other portion of the patterned conductor layer. The metal-stacked layer is removed to expose a lower surface opposite to an upper surface of the insulating material layer and a bottom surface of the patterned conductor layer.Type: ApplicationFiled: January 26, 2014Publication date: May 22, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Dyi-Chung Hu, Ming-Chih Chen, Tzyy-Jang Tseng
-
Publication number: 20140139319Abstract: A system for obtaining electronic data from a plurality of forms includes a plurality of electronic sensors, a plurality of wireless interface circuits, and at least one reader configured to communicate with the wireless interface circuits to obtain the electronic data from the plurality of forms. At least one electronic sensor may be coupled to each form, and each electronic sensor may be configured to sense at least a first state and a second state based on manipulation of the form to which the electronic sensor is coupled. At least one of the wireless interface circuits may be coupled to each form and to the at least one electronic sensor coupled to the form. For each form the electronic data may include at least one state of the at least one electronic sensor coupled to the form.Type: ApplicationFiled: November 16, 2012Publication date: May 22, 2014Applicant: Trimble Navigation LimitedInventor: Edward Jones
-
Patent number: 8728562Abstract: A method of manufacturing a medical electrical lead includes molding a lead body pre-form, stringing an electrode onto the pre-form and overmolding the pre-form with a polymer to form a lead body portion. The pre-form has a proximal end, a distal end and at least one lumen extending between the proximal and distal ends. At least one asymmetric region of the pre-form has a transverse cross-section that has a non-circular outer dimension. The overmolding causes the asymmetric region to become substantially circular.Type: GrantFiled: November 18, 2010Date of Patent: May 20, 2014Assignee: Cardiac Pacemakers, Inc.Inventors: Kimberly A. Morris, Andrew De Kock, David A. Durand, Joshua Haarer, Ronald W. Kunkel, Peter J. Wolf, Joel T. Eggert, Joseph A. Cihlar
-
Patent number: 8726498Abstract: The invention comprises methods for filling holes in printed wiring boards and printed wiring boards produced by these methods. The methods involve plating metal conductors inside the holes of the printed wiring boards while protecting the conducting surfaces of the printed wiring boards from being plated using photoresist film. The side surfaces of a printed wiring board are covered with photoresist. The photoresist is exposed to developing light, except the photoresist covering the holes on one side of the board is masked to prevent exposure of the holes to the developing light. The undeveloped photoresist covering the holes is removed. The board is subjected to a plating process, which deposits conductive materials in the holes, but the photoresist on the conducting surfaces of the board prevents conductive materials to be plated on the surfaces of the board.Type: GrantFiled: August 18, 2010Date of Patent: May 20, 2014Assignee: General Dynamics Advanced Information SystemsInventors: Deepak Keshav Pai, Chris H. Simon
-
Patent number: 8729397Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.Type: GrantFiled: December 13, 2011Date of Patent: May 20, 2014Assignee: Unimicron Technology Corp.Inventors: Yi-Chun Liu, Wei-Ming Cheng, Tsung-Yuan Chen, Shu-Sheng Chiang
-
Patent number: 8726475Abstract: A method for producing a piezoelectric thin-film resonator includes forming a sacrificial layer on a substrate, performing a plasma treatment on the sacrificial layer so that the surface roughness (Ra) of end surface portions of the sacrificial layer is about 5 nm or less, forming a strip-shaped dielectric film so as to be continuously disposed on the surface of the substrate and the end surface portions and the principal surface of the sacrificial layer, forming a piezoelectric thin-film area including a lower electrode, an upper electrode, and a piezoelectric thin-film disposed therebetween so that a portion of the lower electrode and a portion of the upper electrode surface each other at an area on the dielectric film, the area being disposed on the upper portion of the sacrificial layer, and removing the sacrificial layer to form an air-gap between the substrate and the dielectric film.Type: GrantFiled: September 3, 2008Date of Patent: May 20, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Hidetoshi Fujii, Ryuichi Kubo
-
Patent number: 8729426Abstract: The method uses a common optical, system and sequentially creates structures of different sizes in a polymer substrate by means of different laser processes is described. One process uses a laser beam that is tightly focussed on the substrate surface and is used for creating fine groove structures by semi-continuous direct write type beam movement. The second process uses a second laser beam that is used to form a larger size image on the substrate surface and is used to create blind pads and contact holes in the substrate in step and drill mode. A third optional process uses the second laser beam operating in direct writing mode to remove layers of the substrate over larger continuous areas or in a mesh type pattern.Type: GrantFiled: May 27, 2009Date of Patent: May 20, 2014Assignee: M-Solv Ltd.Inventor: Philip Thomas Rumsby
-
Patent number: 8726499Abstract: In one embodiment, a method of fabricating an implantable pulse generator, comprises: providing a lead body including a plurality of conductors; providing a feedthrough component comprising a plurality of feedthrough pins; hermetically enclosing pulse generating circuitry and switching circuitry within a housing, the feedthrough component being welded to the housing; laser machining each of the plurality of feedthrough pins to comprise a slot along a surface of the respective feedthrough pin; placing a respective conductor from the lead body in the respective slot of each of the plurality of feedthrough pins; and performing welding operations to connect the plurality of conductors of the lead body with the plurality of feedthrough pins of the feedthrough component.Type: GrantFiled: March 31, 2011Date of Patent: May 20, 2014Assignee: Advanced Neuromodulation Systems, Inc.Inventors: Ken McGiboney, Galen L. Smith, Michael Gaines, Jerome Boogaard
-
Patent number: 8726495Abstract: A base material (20) is arranged on top of at least one first internal layer base material (10), and a second internal base material (30) is arranged underneath the base material (10). And thereafter a surface layer circuitry conductive foil (40) is arranged underneath the base material (30), and subsequently these materials are colaminated for forming a colaminated body (80). While this colaminating operation, conductive portions being formed in the base materials 10, 30 are aligned to electrically connect one another for forming an internal circuitry. And thereafter, an interlayer conductive portion (51) being electrically connected to the internal circuitry is formed, and a minute circuitry is formed on the top of the base material (20) and the conductive foil (40) accordingly.Type: GrantFiled: June 16, 2008Date of Patent: May 20, 2014Assignee: Fujikura Ltd.Inventors: Osamu Nakao, Reiji Higuchi, Syouji Ito, Masahiro Okamoto
-
Patent number: 8729404Abstract: A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit.Type: GrantFiled: March 2, 2011Date of Patent: May 20, 2014Assignee: Electro Scientific Industries, Inc.Inventors: Glenn Simenson, William Antoni, Steven Cohen, Jeffery Howerton
-
Patent number: 8726497Abstract: A method of making a component for use in a touch sensor includes modifying a substrate having disposed on it a plurality of electrically isolated conductors. Subsets of the conductors are electrically coupled to form composite electrodes. The component can be used as a set of electrodes in a customized touch sensor.Type: GrantFiled: July 29, 2009Date of Patent: May 20, 2014Assignee: 3M Innovative Properties CompanyInventor: Bernard O. Geaghan
-
Publication number: 20140135608Abstract: A textile electrode device, for detection of electrophysiological signals from the skin of a subject, having: a substrate designed to be positioned on the skin; at least a first detection electrode arranged on the substrate; and at least a first conducting element, carried by the substrate and electrically connected to the first detection electrode. The first detection electrode has a plurality of textile fibres, including conductive fibres and, optionally, fibres of a super-absorbent material, arranged in a direction substantially orthogonal to an upper surface of the substrate and reciprocally in contact with each other, so as to ensure uniform electrical contact over the entire first detection electrode. In particular, the first detection electrode is obtained by means of the flocking technique.Type: ApplicationFiled: April 2, 2012Publication date: May 15, 2014Applicant: POLITECNICO DI TORINOInventors: Marco Gazzoni, Roberto Merletti
-
Publication number: 20140131889Abstract: A flexible circuit board, a semiconductor package, and methods of forming the same are provided. The flexible circuit board includes: a base film; an input line pattern, an output line pattern, and a dummy pattern on a first surface of the base film; and a ground pattern on a second surface of the base film and electrically connected with the dummy pattern.Type: ApplicationFiled: October 30, 2013Publication date: May 15, 2014Applicant: Magnachip Semiconductor, Ltd.Inventors: DoYoung KIM, KyungDuk KIM
-
Publication number: 20140132895Abstract: This disclosure aims to reduce workloads and material costs when a driving circuit and a flexible wiring board are fixed to a first substrate. A display device includes a display panel having the first substrate. The driving circuit is fixed to the first substrate in a portion other than a display portion with an anisotropic conductive film. The flexible wiring board is fixed to the first substrate at an end of the portion other than the display portion with an anisotropic conductive film. The anisotropic conductive film for fixing the driving circuit and the anisotropic film for fixing the flexible wiring board are the same. The anisotropic conductive film is also formed and hardened in a region other than a region having the driving circuit and the flexible wiring board fixed therein within the portion other than the display portion of the first substrate.Type: ApplicationFiled: November 1, 2013Publication date: May 15, 2014Applicant: Japan Display Inc.Inventors: Kouichi INOUE, Tomokazu SAITOU
-
Publication number: 20140131076Abstract: In the present invention, a ceramic substrate composite comprising, on a ceramic substrate, a conductor pattern composite and an insulating layer is provided. The ceramic substrate composite of the present invention is characterized in that the conductor pattern composite and the insulating layer are provided on the ceramic substrate with each other so that the insulating layer overlaps a part of the conductor pattern composite; and wherein the conductor pattern composite is composed of a conductor portion and an insulating portion that exists locally in the conductor portion, the insulating portion being an insulating material that constitutes the insulating layer.Type: ApplicationFiled: December 21, 2012Publication date: May 15, 2014Applicant: PANASONIC CORPORATIONInventors: Taiji Kuroiwa, Seiichi Nakatani, Yoshihisa Yamashita, Susumu Sawada