Abstract: In a semiconductor device having a main cell region and a sense cell region, a main contact trench and a sense contact trench extend in one direction. When viewed from a stacking direction of a drift layer and a body layer, in the one direction, the main contact trench and a first impurity region disposed in the main cell region protrude more than a main upper electrode toward a sense upper electrode, and the sense contact trench and the first impurity region disposed in the sense cell region protrude more than the sense upper electrode toward the main upper electrode.

Abstract: This chopper circuit 1 performs voltage conversion between a first DC voltage at a first external connection terminal and a second DC voltage at a second external connection terminal and is provided with: a first switch portion 11 having the first external connection terminal; a second switch portion 12 connected in series with the first switch portion 11 so that the conducting direction during ON-time matches that of the first switch portion 11 and having the second external connection terminal on the opposite side to the side where the first switch portion 11 is connected; one or a plurality of semiconductor power converters 13 cascade-connected to each other, which are provided on a wire branched from the wire for connecting the first switch portion 11 and the second switch portion 12; and an inductor 14 connected in series with the semiconductor power converters 13 on the wire branched from the wire for connecting the first switch portion 11 and the second switch portion 12.

Abstract: A power converter can include: positive and negative input terminals configured to receive an input voltage; positive and negative output terminals configured to generate an output voltage; first and second power switches sequentially coupled in series between the positive input terminal and a first node; third and fourth power switches sequentially coupled in series between a second node and the negative input terminal, where there is no physical connection between the first node and the second node; a first energy storage element coupled between a common terminal of the first and second power switches and a common terminal of the third and fourth power switches; a first multi-level power conversion circuit coupled between the first node and the positive output terminal; and a second multi-level power conversion circuit coupled between the first node and the positive output terminal.

Abstract: A bandgap reference circuit includes a reference current generation circuit configured to output a bandgap reference current insensitive to a temperature change, by using a first voltage inversely proportional to temperature and a third voltage proportional to temperature. The third voltage is a difference between the first voltage and a second voltage. The bandgap reference circuit further includes a resistivity temperature coefficient cancellation circuit configured to remove a first current proportional to temperature from the bandgap reference current by using the third voltage, and a reference voltage generation circuit configured to output a bandgap reference voltage insensitive to a temperature change by using a second current inversely proportional to temperature and a first resistance proportional to temperature. The second current is generated by removing the first current from the bandgap reference current.

Abstract: A DC-to-DC voltage regulator circuit comprising: an output node; a pull-up switch and a pull-down switch with an output node coupled between them; a reactive circuit element coupled to the output node; a pull-up setting voltage circuit coupled to provide a pull-up setting voltage that is a function of a voltage at the output node; a pull-down setting voltage circuit coupled to provide a pull-down setting voltage that is a function of the voltage at the output node; a first comparator coupled to cause the pull-up switch to transition between open switch state and its closed switch state based upon a comparison of the pull-up setting voltage and a control voltage; and a second comparator coupled to cause the pull-down switch to transition between its open switch state and its closed switch state.

Abstract: According to an embodiment, a current detecting circuit includes: a normally-OFF type second switching element that is cascode-connected to a normally-ON type first switching element that includes a drain for outputting an output current; a normally-OFF type third switching element that is connected in parallel to the second switching element and whose drain is connected to a variable current source; and a comparison circuit that outputs a detection signal in accordance with a comparison result between a drain voltage of the second switching element and a drain voltage of the third switching element.

Abstract: An apparatus includes an integrated circuit and a plurality of conducting wires disposed on the integrated circuit. The integrated circuit includes: (i) a signal generation circuit, which is configured to generate random signal and selection signal based on random or pseudo-random numbers, (ii) a transmitting circuit configured to select at least one from among the plurality of conducting wires based on the selection signal and to output the random signal through the at least one conducting wire, and (iii) a receiving circuit configured to detect an invasive attack on the integrated circuit based on signal received through the at least one conducting wire.

Abstract: Various embodiments provide a parallel arrangement of discontinuous conduction mode (DCM) voltage regulators to provide a regulated voltage to a load. The individual DCM voltage regulators may be triggered (e.g., switched to a charge state) when the regulated voltage falls below a lower threshold. Different DCM voltage regulators in the parallel arrangement may have different lower thresholds. In some embodiments, different DCM voltage regulators may include different inductance and/or transistor size (e.g., to tune the DCM voltage regulators to different current handling capabilities). Other embodiments may be described and claimed.

Abstract: The present document relates to power converters. A power converter has a first stage coupled between an input of the power converter and an intermediate node, and a second stage coupled between the intermediate node and an output of the power converter. The first stage has a capacitive voltage divider with a first flying capacitor, and the second stage has a second flying capacitor and an inductor. On the one hand, the power converter establishes, in a magnetizing state, a magnetizing current path in the second stage from the intermediate node via the inductor to the output of the power converter. On the other hand, the power converter establishes, in a capacitive state, a parallel current path in the second stage from the intermediate node via the second flying capacitor to the output of the power converter.

Abstract: A voltage regulator is provided. The voltage regulator includes an output terminal, a transistor, a primary driving circuit, and a secondary driving circuit. The output terminal is adapted to output an output voltage. The primary driving circuit is coupled to a control terminal of the transistor. The secondary driving circuit is coupled between the control terminal of the transistor and a predetermined voltage terminal. When the voltage regulator operates in a start-up mode, the transistor is driven by the primary driving circuit and the secondary driving circuit, and the control terminal of the transistor and the predetermined voltage terminal are electrically coupled by the secondary driving circuit. When the voltage regulator operates in a normal mode, the transistor is driven by the primary driving circuit, and an electrical coupling between the control terminal of the transistor and the predetermined voltage terminal is disconnected by the secondary driving circuit.

Abstract: The invention provides a voltage-generating circuit with a simple configuration capable of saving space and generating reliable voltage. The voltage-generating circuit of the invention includes a reference voltage-generating unit, a PTAT voltage-generating unit, a comparison unit, and a selection unit. The reference voltage-generating unit generates a reference voltage essentially without dependency on temperature. The PTAT voltage-generating unit generates a temperature-dependent voltage with a positive or negative dependency on temperature. The temperature-dependent voltage is equal to the reference voltage at a target temperature. The comparison unit compares the reference voltage with the temperature-dependent voltage. The selection unit selects and outputs either the reference voltage or the temperature-dependent voltage.

Abstract: A control system for a heated conduit in a respiratory apparatus includes a power supply configured to provide power to the heated conduit and a heating control circuit configured to control an amount of heat generated in the heated conduit. The control system further includes a sensing circuit configured to indicate the temperature of a sensor positioned in the heated conduit by comparing a reference voltage with a sum of a voltage drop through the sensor and a voltage provided to the sensor by the power supply when the heating control circuit is on. When the heating control circuit is off, the voltage drop through the sensor is solely due to current provided by a current source.

Abstract: A switch device includes a switching element that connects/disconnects a current path from a power supply terminal to a ground terminal via a load, and an overcurrent protection circuit that limits output current flowing in the switching element to be an overcurrent limit value or less. When an output short circuit of the load is detected, the overcurrent protection circuit decreases the overcurrent limit value to be lower as a power supply voltage is higher. In addition, the switch device preferably includes a switching element that connects/disconnects a current path from a power supply terminal to a ground terminal via a load, an intermittent control unit that intermittently drives the switching element when an abnormality is detected, and an output voltage monitoring portion that disables the intermittent control unit until an output voltage applied to the load reaches its target value.

Abstract: A current generation circuit includes a temperature sensing circuit, a resistor element having a resistance, and a current mirror circuit. The temperature sensing circuit is configured to generate a reference voltage having corresponding magnitude according to a temperature of the current generation circuit. The resistor element is coupled with the temperature sensing circuit, and is configured to determine magnitude of a reference current according to the reference voltage and the resistance. The current mirror circuit is coupled with the temperature sensing circuit, and is configured to generate an output current according to the reference current. The temperature sensing circuit and the resistor element both have positive temperature coefficients or negative temperature coefficients.

Abstract: An apparatus for generating a temperature-dependent current. The apparatus includes an input current scaling circuit configured to generate a first current that varies with temperature in accordance with a first programmable slope, and a second current that varies with temperature in accordance with a second programmable slope; and a current temperature blending circuit configured to generate a third current based on the first current over a first temperature range and the second current over a second temperature range, wherein the first temperature range is different than the second temperature range.

Abstract: An amplifier includes an input transistor, an input terminal, a first current source, a cascode transistor, and a second current source. The input transistor is coupled to the input terminal. The first current source is coupled to the input transistor and is configured to provide a bias current to the input transistor that is proportional to absolute temperature. The cascode transistor is coupled to the input transistor. The second current source is coupled to the cascode transistor and is configured to provide a bias current to the cascode transistor that is complementary to absolute temperature.

Abstract: A current sense circuit is provided. The current sense circuit includes an input terminal coupled to sense an input current. A first terminal of a diode is coupled as the input terminal. A current limiter has a first terminal coupled to a second terminal of the diode. A current source is coupled to a second terminal of the current limiter and configured to generate a first current. A current mirror includes a first leg coupled to the current limiter and the current source and a second leg coupled for providing an output current.

Abstract: The present invention relates to a device exploiting magneto-hydrodynamics (MHD) for localized delivery of material into a target or extraction of material from a target. The device includes a frame (101) comprising a space (102) for conductive fluid and the material, at least one pair of electrodes (103A, 103B) facing each other, a source of electric current (105), a magnet (105), and an opening (106). The electric current and the magnetic field are synchronized so that the material can be moved from the volume between the electrodes through the opening towards the target or from the target through the opening towards the volume. According to the invention the volume is ?2000 mm3, in proviso that mean distance between tips of the electrodes is ?20 mm.

Abstract: An apparatus includes: a switched capacitor (SC) converter to generate a first voltage based on a voltage source; and a direct current-to-direct current (DC-DC) converter to generate a second voltage based on the voltage source of the apparatus. A difference between the first voltage and the second voltage corresponds to an output voltage.

Abstract: A bandgap reference circuit including a clamp circuit is provided. The bandgap reference circuit performs the calibration only for one time in a normal mode to store a control code of a reference generator of the clamp circuit. In a suspend mode, the control code is used for controlling the reference generator to cause the clamp circuit to provide a desired source voltage, and a bandgap reference voltage source is shut down to reduce the power consumption.

Abstract: An electronic device includes a reference resistor, two first terminals between which the reference resistor is connected, and two second terminals between which a modified impedance value of the reference resistor is intended to be obtained. The electronic device also includes a first circuit that applies between the two second terminals a voltage substantially equal to that between the two first terminals, and a second circuit that flows between the two second terminals a second current the value of which corresponds to a fraction of a first current for flowing in the reference resistor between the two first terminals.

Abstract: Example implementations relate to dual rail circuitry using FET pairs. For example, a circuit according to the present disclosure may include a first field-effect transistor (FET) pair coupled to a dual rail circuitry, a second FET pair coupled to the dual rail circuitry, and a controller coupled to the first FET pair and the second FET pair. The controller may switch a power supply to the dual rail circuitry using the first FET pair and the second FET pair. The dual rail circuitry may provide a power supply to a computing device from a first power supply coupled to the first FET pair or a second power supply coupled to the second FET pair.

Abstract: A semiconductor device includes: a first IGBT and a second IGBT to constitute an inverter; a primary-side IC chip to output an electrical signal responsive to an input signal; a first secondary-side IC chip to drive the first IGBT based on the electrical signal; and a second secondary-side IC chip to drive the second IGBT based on the electrical signal. The primary-side IC chip includes insulating elements electrically insulated from the first secondary-side IC chip and the second secondary-side IC chip. The first secondary-side IC chip is stacked on the first IGBT. The second secondary-side IC chip is stacked on the second IGBT.

Abstract: A voltage regulator and a method for generating a retention voltage for a RAM cell that is sufficiently high to prevent data loss, while minimizing leakage currents are presented. The A voltage regulator is used for generating at least one voltage. The regulator contains mirror circuitry, a leakage device coupled to the mirror circuitry, and a first resistive device coupled to the mirror circuitry via a first output node. The mirror circuitry mirrors a leakage current from the leakage device to the first resistive device, and the leakage current contributes to the generation of a first reference voltage at the first output node.

Abstract: A power conversion circuit includes a plurality of solid-state switches coupled between an input terminal and a ground. An output terminal is positioned between two of the plurality of solid-state switches and an inductor is coupled between the output terminal and a load. A capacitor is coupled in parallel with two of the serially connected solid-state switches. A controller controls the plurality of solid-state switches to generate a current in the inductor by repetitively (1) charging the capacitor causing a temporary increase in the current in the inductor, (2) entering a first wait state that configures the plurality of solid-state switches to maintain the capacitor in a charged state, (3) discharging the capacitor causing a temporary increase in the current in the inductor and (4) entering a second wait state that configures the plurality of solid-state switches to maintain the capacitor in a discharged state.

Abstract: A communication device, on detection of a change in availability of at least one of its hardware resources, implements an announcement phase comprising the following steps: obtaining a list of possible local services corresponding to actions that the communication device is able to implement relying on its hardware resources; obtaining a list of hardware resources of the communication device that are necessary for offering the local services; obtaining a list of local services available among the possible local services, according to the hardware resources necessary for offering the local services and according to the actual availability of its hardware resources; and announcing, via the communication network, the list of available local services obtained, in order to enable at least one managing device to present services globally available in the communication system by means of lists of available local services announced.

Abstract: This specification discloses methods and devices for limiting output current of a voltage regulator, in order to protect the voltage regulator against component overstress in case of output load current overloading. In some embodiments, a current limitation circuit acting on a reference input voltage of a voltage regulator can limit the maximum output load current of the voltage regulator. Once the current limitation circuit detects an over current load, the reference voltage is adjusted or decreased to limit the maximum output load current. Additionally, these methods and devices can be coupled easily with a slew rate control circuit to also limit the inrush current.

Abstract: A first transistor and a second transistor have control terminals coupled to each other. A current mirror circuit supplies a current having the same amount as that of a current Iref flowing through a first path including the second transistor to a second path including the first transistor and supplies a current having a predetermined number of times m of a current amount of the current Iref of the first path to a third path separate from the second path. The third transistor and a fourth transistor are provided on the third path. The third transistor has a source coupled to one end of the first transistor, and the fourth transistor has a gate coupled to a gate of the third transistor. A resistor is provided between a source of the fourth transistor and one end of the second transistor.

Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.

Abstract: In a Power over Ethernet (PoE) system, a Powered Device (PD) having circuitry to measure the load current from a Power Sourcing Equipment (PSE) in the PD. Circuitry compares the measured load current with a first threshold. Circuitry automatically generates load pulses for signaling the PSE. The pulse widths of the load pulses are measured and the widths are automatically adjusted, that power to the PD should be maintained.

Abstract: An integrated circuit delay cell includes an input circuit to establish a current level in the circuit, a switch configured to control an on/off time of a delay circuit, a delay circuit including at least one current starved stage configured to mirror the current level, the delay circuit configured to control a speed of a rise and/or fall time of an output signal, and a glitch discharging circuit connected to the delay circuit configured to tolerate and discharge unwanted charge of the delay circuit.

Abstract: A current source circuit includes a first current mirror, a first bipolar junction transistor (BJT), a second BJT, a third BJT and a first resistor. The first current minor has a first input terminal receiving a first current and a first output terminal providing a second current. The first BJT has a first collector coupled to the first output terminal, a first base, and a first emitter coupled to a reference voltage. The second BJT has a second collector coupled to the first input terminal, a second base coupled to the first base, and a second emitter. The first resistor is coupled between the second emitter and the reference voltage. The third BJT has a third collector providing a third current, a third base coupled to the first output terminal, and a third emitter coupled to the first base.

Abstract: The self-polarised quartz oscillator circuit comprises an amplifier with an output which is connected to a first electrode of the quartz and an input which is connected to a second electrode of the quartz, an output capacitor which is connected to the first electrode of the quartz and an input capacitor which is connected to the second electrode of the quartz. The amplifier is polarised by a current through a MOS polarisation transistor, which is generated in an amplitude regulation assembly which comprises also an amplitude regulation stage. The second electrode of the quartz is connected to the gate of the polarisation transistor and to the amplitude regulation stage in order to modulate the polarisation current and to regulate the oscillation amplitude of the quartz.

Abstract: Presented herein are techniques for monitoring the physical state of a stimulating assembly to, for example, detect the occurrence of an adverse event. More specifically, an elongate stimulating assembly comprising a plurality of longitudinally spaced contacts is at least partially implanted into a recipient. Electrical measurements are performed at one or more of the plurality of contacts and the electrical measurements are evaluated relative to one another to determine the physical state of the stimulating assembly.

Abstract: The apparatus for detecting current includes: a charging stage having one end connected to a power source and another end connected to an inductor and configured to charge the inductor with a current; a discharging stage having one end connected to the inductor and another end connected to ground potential and configured to discharge the current charged in the inductor; and a detecting stage configured to detect a magnitude of a current flowing through the inductor based on a first output voltage output from a first output node of the charging stage when the inductor is charged by the charging stage or on a second output voltage output from a second output node of the discharging stage when the inductor is discharged by the discharging stage.

Abstract: A high-density memory includes: a data write interface, a data read interface, an array of memory cells and level-shifting write drivers. The data write interface inputs data written to the memory. The data read interface outputs data read from the memory. The array of memory cells stores data input at the data write interface and outputs stored data to the data read interface. Each of the memory cells includes at least one low threshold voltage (LVT) read transistor and at least one respective regular threshold voltage (RVT) transistor, so as to obtain high-speed read operations. The level-shifting write drivers supply shifted write wordline voltages to the array, so as to obtain high-speed write operations.

Abstract: An apparatus is described comprising a bandgap reference circuit comprising: an amplifier including first and second inputs and an output; and a bandgap transistor coupled to the output of the amplifier at a control electrode thereof, the bandgap transistor being further coupled commonly to the first and second inputs of the amplifier at a first electrode thereof to form a feedback path. The apparatus further comprises a resistor coupled to the first electrode of the bandgap transistor.

Abstract: An over-voltage protection circuit and method may include a pass gate and a voltage boosting circuit for providing protection to start-up voltage-sensitive circuits during start-up conditions of a system including the voltage-sensitive circuits. The pass gate may include a drain, source, and gate, with the drain configured to receive an input signal and the source configured to output the input signal, in response to a pass gate driving voltage signal applied to the gate of the pass gate. The voltage boosting circuit may include an output coupled to the gate of the pass gate, the voltage boosting circuit configured to generate a pass gate driving voltage on the output. The voltage boosting circuit further configured to passively control the pass gate driving voltage to a level less than a steady-state voltage level during start-up of the protection circuit.

Abstract: In described examples of methods and control circuitry to control a power conversion system, a regulator circuit is coupled to provide switching control signals according to a regulation signal to operate a plurality of converter switches to generate a voltage signal at a switching node. A compensation sense circuit is coupled to provide a compensation pulse signal having a duty cycle that represents a percentage of time that a current flowing through the switching node is above a threshold value. A current compensation circuit adjusts the regulation signal according to the compensation pulse signal.

Abstract: A method for providing a voltage reference at a present operating temperature in a circuit is provided. The circuit comprises a first MOS transistor having a first threshold voltage; and a second MOS transistor having a second threshold voltage different from the first threshold voltage is provided. Temperature insensitivity is obtained by compensating the difference between the first threshold voltage and the second threshold voltage with a parameter representative of the present operating temperature.

Abstract: An apparatus is provided which comprises: a first power gate transistor coupled to an ungated power supply node and a gated power supply node, the first power gate transistor having a gate terminal controllable by a first logic; and a second power gate coupled to the ungated power supply node and the gated power supply node, the second power gate transistor having a gate terminal controllable by a second logic, wherein the first power gate transistor is larger than the second power gate transistor, and wherein the second logic is operable to: weakly turn on the second power gate, fully turn on the second power gate, turn off the second power gate, and connecting the second power gate as diode.

Abstract: The present disclosure relates to a circuit and a method for overcurrent control and a power supply system including the same. When the system operates normally, a reference voltage has a constant value. When a short circuit or an overcurrent occurs at an output of the system, the reference voltage will be pulled down,. When the system is recovered from the short circuit or the overcurrent state, the reference voltage increases slowly up to a steady value. A feedback signal of an output voltage follows the reference voltage and increases slowly. Thus, an overshoot of the output voltage can be effectively eliminated to avoid damages to the system.

Abstract: A motor vehicle lighting device comprising at least one branch of semiconductor light sources including two or more light source units connected in series is disclosed herein. A MOSFET switch bridging the individual light source units is assigned to the light source units. The at least one branch is fed from the output voltage of a DC/DC converter with respect to ground. An activation circuit is assigned to the MOSFET switch for activating the MOSFET switch, which is a p-channel MOSFET. A rectifier circuit is assigned to the DC/DC converter. The input of the rectifier circuit is connected to a pole of a storage inductor of the converter, at which negative voltage pulses occur with respect to ground. The rectifier circuit is designed to rectify the negative pulses and to provide the resulting negative DC voltage of the activation circuit for switching the MOSFET switch.

Abstract: A voltage regulator has feedback circuitry to generate a feedback voltage relative to an output voltage, and an amplifier to amplify a differential voltage between the feedback voltage and a reference voltage to generate the output voltage. The amplifier has a first transistor to feed a current in accordance with the feedback voltage, and a second transistor to feed a current in accordance with the reference voltage. The first transistor has a first gate to be applied with the feedback voltage, and the second transistor has a second gate to be applied with the reference voltage, and the voltage regulator further comprising a conductor disposed to face at least either one of the first and second gates, the conductor being set at a predetermined electric potential.

Abstract: A charge pump system includes: a differential amplifier, for receiving a feedback voltage and a reference voltage and generating an output signal; an oscillating circuit for generating clock pulses; a charge pump for receiving the clock pulses and generating an output voltage; a current sink coupled to the output of the charge pump; a first pair of cascode transistors for generating a digital signal; and an inverter for inverting the digital signal to generate a first digital signal according to the output signal, wherein the first digital signal is input to the current sink. When the feedback voltage is higher than the reference voltage, the first digital signal will be generated and the current sink will be turned on, and when the feedback voltage is lower than the reference voltage, the first digital signal will not be generated and the current sink will be turned off.

Abstract: A reference circuit constituted of: a voltage/current bias circuitry; a first transistor coupled between a common voltage and an first bias circuitry output; a second transistor coupled between the common voltage and a second bias circuitry output; a third transistor coupled between the common voltage and an output providing a temperature and supply invariant current; a resistor coupled between the second transistor and the second output of the bias circuitry; and an output providing a temperature and supply invariant voltage coupled between the resistor and the second transistor, the voltage output terminal further coupled to a gate of the third transistor, wherein the bias circuitry is arranged, in cooperation with the first transistor, to generate a first current at the first output thereof, and, in cooperation with the second transistor, to generate a second current at the second output thereof, the current magnitudes exhibiting a ratio of a predetermined value.

Abstract: A sampling clock generating circuit and an analog to digital converter includes a variable resistance circuit, and a NOT-gate type circuit, where an input end of the NOT-gate type circuit receives a pulse signal whose period is T; a power supply terminal of the NOT-gate type circuit is connected to a power supply; a ground terminal of the NOT-gate type circuit is connected to one end of the variable resistance circuit; and the other end of the variable resistance circuit is grounded; the NOT-gate type circuit is configured to: when the pulse signal is a high level, output a low level; and when the pulse signal is a low level, output a high level.

Abstract: A full-wave rectifier-circuit (110) supplies a pulsating-DC-voltage (Vdc) obtained by rectifying an AC voltage (Vac). A switching element (T131) consisting of a power supply apparatus (130) is turned on during a fixed on-period Mon and turned off during a fixed off-period Moff (=M-Mon) in each fixed control period M. When the switching element (T131) is turned on, a current (I2) caused by electric charge accumulated in a capacitor (C132) flows through a path formed by an inductor (L131) and the switching element (T131). When the switching element (T131) is turned off, a flywheel current (I3) caused by electromagnetic energy accumulated in the inductor (L131) flows through a path formed by a diode (D131) and a parallel circuit consisting of a capacitor (C131) and a load (120), and a current (I1) is supplied from the full-wave rectifier circuit (110) to the capacitor (C132) via an inductor (L132).

Abstract: A low voltage differential signaling driver includes at least one output circuit, a first control circuit, and a second control circuit. The output circuit includes a first input terminal to receive a first input signal, a second input terminal to receive a second input signal, a first output terminal to output a first output signal, a second output terminal to output a second output signal, and first to sixth transistors. The first control circuit controls a voltage of a control terminal of the first transistor to make a voltage of the first output signal equal to a first reference voltage when the first input signal has a first value. The second control circuit controls a voltage of a control terminal of the second transistor to make the voltage of the first output signal equal to a second reference voltage when the first input signal has a second value.

Abstract: A load switch includes a switch element and first and second control circuits. The switch element has an input terminal for receiving an input voltage, an output terminal for providing an output voltage, and a control terminal for receiving a switch signal, which turns the switch element on and off. The first control circuit is connected to the control terminal of the switch element and turns off the switch element in response to a first control signal. The second control circuit also is connected to the control terminal of the switch element and keeps the switch element turned off, after the first control circuit has turned off the switch element.