By Mechanical Means Patents (Class 324/750.25)
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Patent number: 10557866Abstract: A probe seat of a vertical probe device includes a lower die, a middle die fixed on the lower die, at least one upper die fixed on the middle die, and at least one reinforcing die fixedly disposed in at least one through trough of the middle die. The lower die has lower probe holes located below the through trough, such that probes are be inserted through the lower probe holes respectively and inserted through the through trough. The at least one upper die has upper probe holes located above the through trough for the probes to be inserted therethrough. The at least one reinforcing die has middle probe holes for the probes to be inserted therethrough. As a result, the probe seat has improved rigidity to avoid bending.Type: GrantFiled: November 29, 2016Date of Patent: February 11, 2020Assignee: MPI CORPORATIONInventors: Tsung-Yi Chen, Shih-Shin Chen
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Patent number: 10551412Abstract: A contact for use in a test set which can be mounted to a load board of a tester apparatus. The contact, which serves to electrically connect at least one lead of a device being tested with a corresponding metallic trace on the load board, has a first end defining multiple contact points. As the test pin is rotated about an axis generally perpendicular to a plane defined by the contact, successive contact points are sequentially engaged by a lead of the device being tested. The test pin has a hard stop edge which engages a hard stop wall which limits its rotation movement. The bottom of the pin has a shallow convex curvature preferably with a flat region and the tip of the test pin has a chisel edge.Type: GrantFiled: October 27, 2017Date of Patent: February 4, 2020Assignee: Johnstech International CorporationInventor: Michael Andres
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Patent number: 10541010Abstract: Methods, systems, and apparatuses for a memory device that is configurable based on the type of substrate used to couple the memory device with a host device are described. The reconfigurable memory device may include a plurality of components for different configurations. Various components of the reconfigurable memory die may be activated/deactivated based on a type of substrate used in the memory device. The memory device may include an input/output (I/O) interface that is variously configurable. A first configuration may cause the memory device to communicate signals modulated using a first modulation scheme across a channel of a first width. A second configuration may cause the memory device to communicate signals modulated using a second modulation scheme across a channel of a second width. The I/O interface may include one or more switching components to selectively couple pins of a channel together and/or selectively couple components to various pins.Type: GrantFiled: August 8, 2018Date of Patent: January 21, 2020Assignee: Micron Technology, Inc.Inventor: Timothy M. Hollis
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Patent number: 10495688Abstract: A test device for manually testing chips/ICs is disclosed. A housing includes a receiver for a device under test (DUT). The DUT must be pressed into the housing to make adequate contact with the test pins in the bottom of the test device. A screw drive presses the DUT into position and a plurality of holes in the turning knob accommodate through-going pins which on one leg extend through the knob and into an interference path of a fixed barrier stop. The extended leg then engages the stop during rotation to end the downward movement of the screw. Adjustment is made by selecting holes where the pins are inserted. Reversing the pins in the hole allows for storage of the pins when not in use.Type: GrantFiled: April 21, 2017Date of Patent: December 3, 2019Assignee: Johnstech International CorporationInventors: Jose Lopez, Mehdi Attaran
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Patent number: 10466300Abstract: A top housing having a back slot and a front slot parallel with each other, and both stacked on top of a row of lower slots, which is perpendicular to the back and front slots. In this way, the juxtaposition of the back and front slots and the row of lower slots forms two rows of virtual rectangular through-openings. The back of these rows receives a row of first contacts extended through them. The front of these rows receives a row of second contacts extended through them. The through-openings thus guide the contacts at a position of the contacts that is very close to where they contact the lead of the DUT. Hence, there is a very high amount of precision and control of the contact tip that contacts the lead of the DUT.Type: GrantFiled: May 18, 2018Date of Patent: November 5, 2019Assignee: JF MICROTECHNOLOGY SDN. BHD.Inventors: Wei Kuong Foong, Kok Sing Goh, Shamal Mundiyath, Eng Kiat Lee, Mei Chen Chin
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Patent number: 10416230Abstract: The present invention relates to an aligning device and handling device, and in particular to an aligning device for the positionally accurate coupling of a handling device for exchanging an interface unit to another device for receiving at least one interface unit and to a handling device for exchanging an interface unit.Type: GrantFiled: August 21, 2014Date of Patent: September 17, 2019Assignee: Turbodynamics GmbHInventor: Stefan Thurmaier
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Patent number: 10379156Abstract: An integrated circuit testing system includes a conductive structure, a conductive pad electrically connected with the conductive structure, a test circuit electrically connected with the conductive pad, a conductive line electrically connected with the conductive structure, the conductive line being configured to be connected with a ground, and a controller coupled with the test circuit. The controller is configured to selectively cause the test circuit to supply a voltage to the conductive structure via the conductive pad. The test circuit is configured to provide feedback to the controller indicative of whether the conductive structure is electrically connected with the conductive pad.Type: GrantFiled: July 31, 2015Date of Patent: August 13, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chewn-Pu Jou, Min-Jer Wang
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Patent number: 10302675Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.Type: GrantFiled: September 10, 2018Date of Patent: May 28, 2019Assignee: Johnstech International CorporationInventors: John E. Nelson, Jeffrey C. Sherry, Brian Warwick, Gary W. Michalko
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Patent number: 10281491Abstract: A probe card is disclosed. The probe card includes a first disc, a second disc, an alignment plate and multiple micro probes. One of the micro probes includes a linear segment and a curved segment connected to each other at an angle stop. The first disc includes a recessed area having multiple holes formed therein, wherein one of the holes is configured to receive the linear segment of the micro probe. The second disc includes a recessed area having multiple holes formed therein, wherein one of the holes is configured to receive the curved segment of the micro probe. Placed within the recessed area of the second disc, the alignment plate includes multiple holes formed therein, wherein one of the holes is configured to receive the curved segment of the micro probe.Type: GrantFiled: November 30, 2016Date of Patent: May 7, 2019Assignee: TRANSLARITY, INC.Inventors: Francis T. McQuade, Raul Ramon Molina, IV, Michael Chrastecky
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Patent number: 10274761Abstract: A detecting device for light-emitting property of a light source is provided and the detecting device for light-emitting property of a light source includes: a positioning device configured for fixing the light source; and a detection apparatus configured for acquiring a parameter of an emergent light from the light source. The detecting device for light-emitting property of a light source can detect the light-emitting property of the light source, thus help to select the chrominance and brightness degree, of a light source, required by a display module, and shorten the researching and manufacturing period for a liquid crystal display.Type: GrantFiled: May 27, 2014Date of Patent: April 30, 2019Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.Inventors: Jinku Lv, Rong Tang, Junjie Guo, Dan Wang, Bin Zou, Yutao Hao, Hongyu Zhao, Qian Zhang
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Patent number: 10278302Abstract: Techniques and mechanisms for providing socket connection to a substrate. In an embodiment, a socket device includes a first socket body portion that is to provide for signal exchanges as part of a socket connector including the first socket body portion and a second socket body portion. The first socket body portion and the second socket body portion comprise respective zones, wherein, of the two zones, only one such zone has a first electro-mechanical characteristic. The first electro-mechanical characteristic is selected from the group consisting of an interconnect dimension, an interconnect material, an interconnect structure, a socket body material, and a shielding structure. In another embodiment, modular socket sub-assemblies each comprise a respective one of the first zone and the second zone.Type: GrantFiled: December 23, 2015Date of Patent: April 30, 2019Assignee: Intel CorporationInventors: Anne M. Sepic, Zhen Zhou, Evan M. Fledell
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Patent number: 10274515Abstract: A structure and method for providing a housing which includes a high frequency (HF) connection between a device under test (DUT) having a wave port 20 and a load board via a waveguide structure. The waveguide includes a wave insert 42, a waveguide adapter 24 and a conductive compliant member 40 which maintains bias between the adapter 24 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT wave port. The adapter may also include a projection 64 which is received in a recess in the waveguide so that the shielding between the waveguide and adapter has full integrity.Type: GrantFiled: August 4, 2016Date of Patent: April 30, 2019Assignee: Johnstech International CorporationInventors: Jeffrey Sherry, Cory Kostuchowski
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Patent number: 10256564Abstract: An electric component socket in which a first electric component is housed in a first plate, a second plate is disposed to face the second electric component, a third plate is disposed at a middle position between the first and the second plates, and a plurality of electric contacts are used to electrically connect the first and second electric components, the electric contact includes: a spring part that is inserted into an insertion hole in the third plate; first and second contact parts extending from both terminals of the spring part, and inserted into insertion holes in the first and second plates to be in contact with electrodes of the first and second electric components.Type: GrantFiled: March 22, 2016Date of Patent: April 9, 2019Assignee: ENPLAS CORPORATIONInventor: Takahiro Oda
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Patent number: 10197621Abstract: A testing device includes a system circuit board, a first chip component, a supporting structure, a circuit board and an interposer. The system circuit board has a surface where the first chip component is disposed. The first chip component is connected to the system circuit board. The supporting structure is disposed on the surface and surrounds the first chip component; the circuit board is fixed on the supporting structure and keeps distance from the first chip component. The circuit board has a connector for connecting to a chip component that is to be tested. The interposer is located between the circuit board and the first chip component. The circuit board is connected to the first chip component via the interposer. The first chip component need not connect to the chip component to be tested, so is less liable to be damaged by the frequent testing.Type: GrantFiled: June 6, 2014Date of Patent: February 5, 2019Assignee: Kingston Digital, Inc.Inventors: David Chen, Chengvee Ong, Chichih Yu
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Patent number: 10197599Abstract: A test pin for a test device for electrically contacting a device under test to be tested, wherein the test pin comprises an electrically conductive base structure for electrically conducting a test signal between the device under test and the test device, and an exchangeable electrically conductive pin tip body configured to directly contact the device under test and to be exchangeably assembled with the base structure.Type: GrantFiled: December 16, 2015Date of Patent: February 5, 2019Assignee: Infineon Technologies AGInventors: Fu San Hiew, Siao Kiat Tan, Wee Kuan Tan, Arieff Ridzwan Yussuff, Murad Hudda, Wang Xiaojun, Ge Dandong, Yusman Sugianto, Tay Chyeo Yong, Lee Chow York, Gan Swee Lee
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Patent number: 10181817Abstract: The invention relates to a testing device for testing a photovoltaic device having an electrical contact area, the testing device comprising: a support base for supporting the photovoltaic device, the support base having a support surface for receiving the photovoltaic device, a measurement device, at least one electrical wire for temporarily establishing an electrical contact between the measurement device and an electrical contact area of the photovoltaic device, the electrical wire is a flexible wire being electrically conductive and arranged to receive the photovoltaic device between the support surface and the flexible wire, at least a portion of the flexible wire abuttingly adapts along its longitudinal extension against the electrical contact area of the photovoltaic device when the photovoltaic device is received by the support surface.Type: GrantFiled: May 14, 2013Date of Patent: January 15, 2019Assignee: PASAN SAInventors: Derk Baetzner, Charles Clerc, Emanuel Neto, Patrick Volluz, Pierre-Rene Beljean, Bas Albers, Pierre Papet
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Patent number: 10177021Abstract: Aspects of the present disclosure are directed to methods and apparatuses involving a chip carrier having openings therein that align integrated circuit (IC) chips relative to an alignment feature. The IC chips and carrier are tested, such as by final testing the affixed IC chips after manufacture, and further testing after subjecting the affixed IC chips to one or more stress conditions. A test probe is aligned to one or more contacts on each chip based on the location of an alignment feature of the carrier relative to the opening in which the IC chip being tested is located. Responsiveness of the IC chip, before and after application of the one or more stress conditions, can be assessed by probing the IC chip via the aligned test probe, and assessing electrical signals received over the test probe.Type: GrantFiled: January 13, 2016Date of Patent: January 8, 2019Assignee: NXP B.V.Inventors: Chung Hsiung Ho, Wen-Hsuan Lin, Ju-Hsuan Ko, Chih Hung Chang
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Patent number: 10120116Abstract: A light-emitting apparatus includes: a first light guide which includes a first photoreceptor, a second photoreceptor, and a leak, the first light guide guiding light radiated by a radiation apparatus and received by the first photoreceptor and the second photoreceptor, the leak allowing leakage light to be leaked out, the leakage light being part of the light; a converter which converts a wavelength of the leakage light leaked out of the first light guide; a second light guide which is disposed along the first light guide, the second light guide guiding the light radiated by the radiation apparatus and received by a third photoreceptor to the second photoreceptor; and a protector which is tubular and in which the first light guide and the second light guide are disposed such that the first photoreceptor and the third photoreceptor are disposed at a same open end.Type: GrantFiled: July 25, 2017Date of Patent: November 6, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventor: Shintaro Hayashi
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Patent number: 10090615Abstract: A dielectric housing with a forward mating portion, a flange and a rear portion. The forward mating portion is receivable in a cutout in a mounting panel. The flange extends from the housing and is dimensioned larger than the cutout. The rear portion has a rear face with terminal-receiving cavities extending inwardly through the rear face. A top surface of the forward mating portion extends from the flange at an obtuse angle, the top surface is essentially perpendicular to a forward mating face of the forward mating portion of the housing. The terminal-receiving cavities extend from the rear face to the forward mating face, with the longitudinal axis of the terminal-receiving receiving cavities extending in a straight line. The forward mating face of the housing is angled relative to the flange and the mounting panel to prevent condensation from occurring on the forward mating face.Type: GrantFiled: September 22, 2017Date of Patent: October 2, 2018Assignee: TE CONNECTIVITY CORPORATIONInventors: Chong Hun Yi, Tom Morris
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Patent number: 10082525Abstract: A probe unit according to the present invention is suitable for allowing a large current to flow. In the probe unit that accommodates a plurality of contact probes for electrically connecting an inspection target object and a signal processing device used to output an inspection signal, both ends of a large current probe (3) are electrically connected to electrodes of a contact target object, and a large current is made to flow via a metal block (50) that comes into contact with both end portions of the large current probe (3).Type: GrantFiled: September 18, 2015Date of Patent: September 25, 2018Assignee: NHK Spring Co., Ltd.Inventors: Yoshio Yamada, Kohei Hironaka
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Patent number: 10073117Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.Type: GrantFiled: June 12, 2017Date of Patent: September 11, 2018Assignee: Johnstech International CorporationInventors: John E. Nelson, Jeffrey C. Sherry, Brian Warwick, Gary W. Michalko
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Patent number: 10060949Abstract: A probe device of a vertical probe card is provided and includes a die assembly and at least one pin assembly. The die assembly includes a first die, a second die, and a middle die disposed between the first die and the second die. The at least one pin assembly has a first pin, a second pin, and at least one electrical connector. The at least one electrical connector is connected to the first pin and the second pin. The at least one pin assembly is electrically contacted with at least one contact pad of a device under test. The at least one contact pad leans against the at least one pin assembly, so that the at least one pin assembly generates a deformation in a longitudinal direction.Type: GrantFiled: February 17, 2017Date of Patent: August 28, 2018Assignee: CHUNGHWA PRECISION TEST TECH. CO., LTD.Inventors: Wen Tsung Li, Kai Chieh Hsieh
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Patent number: 10061685Abstract: A system, method, and computer program product are provided for High Volume Test Automation (HVTA) utilizing recorded automation building blocks. In operation, a testing system identifies at least one HVTA test to perform on a system under test as part of a testing project based on an existing set of tests. The testing system identifies a plurality of generic test functions in an automation repository that are applicable to the at least one HVTA test that has been identified by the testing system as relevant. Additionally, the testing system identifies dependency rules associated with the plurality of generic test functions. Further, the testing system generates at least one test flow utilizing the plurality of generic test functions, based on the dependency rules associated with the plurality of generic test functions. In addition, the testing system organizes an overall test sequence for the at least one HVTA test including the at least one test flow, based on a type of HVTA test to be performed.Type: GrantFiled: August 31, 2016Date of Patent: August 28, 2018Assignee: AMDOCS DEVELOPMENT LIMITEDInventors: Svend White, Ammar Bhutta, Yaron Weiss, Nathan Chittenden
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Patent number: 10056239Abstract: An ultra-high vacuum (UHV) compatible feedthrough structure and a detector assembly using such feedthrough structure, the feedthrough structure comprising a printed circuit board (PCB) for carrying one or more detectors, wherein said PCB comprises a top surface covered with a first UHV sealing layer and one or more first electrical electrodes and at least a first thermally conductive layer extending at least partly over said top surface; and, a back surface comprising one or more second electrodes and at least a second thermally conductive layer extending at least partly over said back surface, wherein one or more conductive wires are embedded in said PCB for electrically connecting said one or more first electrodes with said one or more second electrodes respectively; and, wherein one or more thermally conductive vias are embedded in said PCB for thermally connecting said at least first thermally conductive layer with said second thermally conductive layer.Type: GrantFiled: November 19, 2013Date of Patent: August 21, 2018Assignee: PARTICLE PHYSICS INSIDE PRODUCTS B.V.Inventors: Dirk-Jan Spaanderdam, Julia Helga Jungmann, Ronald Martinus Alexander Heeren
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Patent number: 10056339Abstract: A semiconductor device includes a substrate, a first insulation layer, data storage elements, a contact plug, and a first dummy dam. The first insulation layer is on the substrate and includes a pad region and a peripheral region adjacent to the pad region. The data storage elements are on the pad region of the first insulation layer. The contact plug penetrates the first insulation layer on the peripheral region. The first dummy dam penetrates the first insulation layer and is disposed between the data storage elements and the contact plug.Type: GrantFiled: June 20, 2017Date of Patent: August 21, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Hyeon-Woo Jang, Junghwan Park, Ramakanth Kappaganthu, Sungjin Kim, Junyong Noh, Jung-Hoon Han, Seung Soo Kim, Sungjin Kim, Sojung Lee
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Patent number: 10041976Abstract: Aspects of the present disclosure provide a gimbal assembly test system including: a protective cover affixed to a test surface of a wafer probe card mounted within a gimbal bearing, wherein the protective cover includes an exterior surface oriented outward from the test surface of the wafer probe card; and a recess extending into the exterior surface of the protective cover and shaped to matingly engage a load cell tip therein.Type: GrantFiled: February 3, 2016Date of Patent: August 7, 2018Assignee: GLOBALFOUNDRIES INC.Inventors: David L. Gardell, David M. Audette, Peter W. Neff
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Patent number: 9989583Abstract: A cross-bar unit for a test apparatus for circuit boards having at least one cross-bar spanning a test field in which a circuit board to be tested may be placed, and is configured to hold positioning units for test fingers in a linearly traversable manner so that the test fingers are able to scan at least part of the test field. The cross-bar unit is configured to hold at least two linear guides, independent of one another, for guiding in each case at least one of the positioning units.Type: GrantFiled: March 13, 2014Date of Patent: June 5, 2018Assignee: Xcerra CorporationInventors: Victor Romanov, Bernd-Ulrich Ott
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Patent number: 9985005Abstract: An electronic package includes an interposer, a die attached to a first side of the interposer, an embedded electronic package attached to a second side of the interposer, an encapsulation compound, a set of vias providing electrical paths from a first side of the electronic package to the interposer through the encapsulation compound, and a redistribution layer electrically redistributing the set of vias to form a set of interconnect-pads. Either the die or the embedded electronic package, or both, are electrically connected to the interposer.Type: GrantFiled: March 8, 2016Date of Patent: May 29, 2018Assignee: Intel Deutschland GmbHInventors: Thorsten Meyer, Sven Albers, Andreas Wolter
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Patent number: 9958476Abstract: A test socket for facilitating testing of a device under test (DUT) includes a holder comprising a mounting structure for attaching the holder to other components of the socket and a floating nest structure in which the DUT can be disposed. The floating nest structure can have a seat cavity sized and shaped to receive and hold the DUT such that at least some of the DUT terminals are in contact with corresponding contacts of a test board while the test socket is attached to the test board. A flexure located laterally between the mounting structure and the floating nest structure and can allow the nest structure to move relative to the mounting structure and thus float.Type: GrantFiled: November 22, 2016Date of Patent: May 1, 2018Assignee: FormFactor, Inc.Inventor: Benjamin N. Eldridge
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Patent number: 9958500Abstract: A vacuum socket includes a lower housing including a concave portion with a first hole, the concave portion having a recessed cross section and a printed circuit board in the concave portion, wherein the printed circuit board includes a second hole coupled to the first hole and pads provided along an edge region thereof, a cover provided in the concave portion to cover the printed circuit board, and a vacuum pad inserted in the first hole, the vacuum pad having a third hole coupled to the second hole, wherein the printed circuit board is electrically connected to a first semiconductor chip loaded between the printed circuit board and the cover, via the pads.Type: GrantFiled: June 20, 2016Date of Patent: May 1, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Jang-Sun Kim, Il Jin, Seungchul Lee
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Patent number: 9927462Abstract: An electrical device testing fixture is disclosed. The electrical device testing fixture includes a stationary base, an electrode holder, a negative electrode and a positive electrode, a stopper holder, and a stopper; the stationary base is provided with two through wire mounting holes in which wires are routed; the electrode holder is provided with two separate long slots; the two electrodes are fixed in the two long slots respectively and movable in the slots respectively; an electrical device is connected between the two electrodes; a restoring spring is provided between the stopper and the stopper holder; and the stopper is configured to fix the electrical device. The electrical device testing fixture can address the high cost problem due to the requirement of different testing fixtures corresponding to different models of electrical devices.Type: GrantFiled: May 15, 2015Date of Patent: March 27, 2018Assignees: BOE TECHNOLOGY GROUP CO., LTD., BOE OPTICAL SCIENCE AND TECHNOLOGY CO., LTD.Inventor: Kejun Shen
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Patent number: 9924600Abstract: A process for manufacturing a printed circuit board, comprising a first main circuit board having a first structure, comprises steps suitable for inserting one or more secondary printed circuit boards having a different structure from that of the main printed circuit board, comprising: defining one or more cavities suitable for receiving the one or more inserts; preparing the one or more inserts comprising, on at least one side intended to make contact with a wall of the cavity, etched features and a metallization, and one or more vias; inserting the one or more inserts into the one or more cavities in the main circuit board; placing a resin in the one or more cavities to ensure cohesion of the assembly formed by the main circuit board and the one or more secondary circuit boards; laminating the assembly formed by the one or more inserts placed in the main circuit board.Type: GrantFiled: January 24, 2014Date of Patent: March 20, 2018Assignee: THALESInventor: Christian Maudet
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Patent number: 9911185Abstract: The present invention relates to a method of generating reference data for inspecting a circuit board. The method comprises steps of scanning a bare circuit board to obtain image information of the bare circuit board, generating a compensation matrix using pad coordinate information extracted from the image information and pad coordinate information prestored in design data, and generating, by applying the compensation matrix to the image information, a reference data including coordinate information of a distinctive object. According to the method, inspection efficiency may optimized through quickly generating reference data without CAD information necessary for circuit board inspection.Type: GrantFiled: September 11, 2014Date of Patent: March 6, 2018Assignee: KOH YOUNG TECHNOLOGY INC.Inventors: Seungwon Jung, Jongjin Choi, Heewook You
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Patent number: 9910068Abstract: A semiconductor chip test device may include: a guide plate having a seating groove formed at the bottom thereof; a substrate coupled to the bottom of the guide plate, and having an upper semiconductor chip mounted on the top surface thereof such that the upper semiconductor chip is positioned in the seating groove; an upper socket having upper pogo pins coupled to the bottom of the guide plate in a state where the upper pogo pins are in contact with bottom patterns of the substrate, and having lower pogo pins formed on the bottom surface thereof, wherein the upper pogo pins protrude upward, and the lower pogo pins protrude downward; and a lower socket having a lower semiconductor chip seated on the top surface thereof, the lower semiconductor chip being in contact with the lower pogo pins.Type: GrantFiled: September 11, 2014Date of Patent: March 6, 2018Assignee: NTS CO., LTD.Inventor: Tae Young Jang
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Patent number: 9891273Abstract: Test structures, methods of manufacturing thereof, and testing methods for semiconductors are disclosed. In one embodiment, a test structure for semiconductor devices includes a printed circuit board (PCB), a probe region, and a compliance mechanism disposed between the PCB and the probe region. A plurality of wires is coupled between the PCB and the probe region. End portions of the plurality of wires proximate the probe region are an integral part of the probe region.Type: GrantFiled: June 29, 2011Date of Patent: February 13, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Hsin Kuo, Wensen Hung, Po-Shi Yao
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Patent number: 9863978Abstract: An electrical contacting device for electrical physical contact with a specimen, particularly wafers, taking place in a contacting direction, with at least one conductor substrate which can be electrically connected to a testing device, at least one contact distance transformer and at least one contact head having electrical contact elements, particularly resilient contact elements, preferably serving to compensate different physical contact distances existing in the contacting direction particularly at the contact elements.Type: GrantFiled: March 25, 2014Date of Patent: January 9, 2018Assignee: FEINMETALL GMBHInventors: Gunther Böhm, Georg Steidle, Wolfgang Schäfer, Achim Weiland
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Patent number: 9797928Abstract: The disclosure describes a probe card assembly for nondestructive integrated circuit testing. The probe card assembly includes an outer gimbal bearing with a tapered bearing surface being mounted on a top surface of a printed circuit board. The probe card assembly further includes an inner gimbal bearing with a spherical bearing surface which contacts the tapered bearing surface of the outer gimbal bearing at a single point of contact about a circumference thereof. The probe card assembly further includes a spring plate mounted to the outer gimbal bearing, providing a downward force to a substrate.Type: GrantFiled: September 15, 2014Date of Patent: October 24, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David M. Audette, Dustin Fregeau, David L. Gardell, Peter W. Neff, Frederick H. Roy, III, Grant W. Wagner
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Patent number: 9798188Abstract: The disclosure provides a detecting accessories of a liquid crystal panel. The detecting accessories comprises a backlight module and two adjusting plates. The backlight module comprises a bottom plate, an edge frame surrounding the bottom plate, a backlight source assembled on the bottom plate, and a diffusion plate disposed opposite to the bottom plate, and the diffusion plate covers the edge frame. Each adjusting plate comprises a carrying section and an assembling section. The two adjusting plates are disposed adjacent with each other. The assembling sections of each adjusting plates are detachably assembled on one side of the edge frame away from the bottom plate. The light of the backlight source emits outward through the diffusion plate. The carrying sections of the two adjusting plates are configured for shading an edge of the diffusion plate for changing an emitting area of the diffusion plate.Type: GrantFiled: August 21, 2015Date of Patent: October 24, 2017Assignee: Shenzhen China Star Optoelectronics Technology Co., LtdInventors: Quan Li, Yujun Xiao, Guofu Tang
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Patent number: 9766268Abstract: A spring probe contactor includes an angled spring probe configuration that causes the tips of the spring probes to “swipe” the contact pads/solder balls of an IC device under test as the contacts are made. The angulation of the spring probes permit penetration through foreign material layers on the pad/ball surfaces with less contact force.Type: GrantFiled: December 21, 2007Date of Patent: September 19, 2017Assignee: Essai, Inc.Inventors: Nasser Barabi, Oksana Kryachek, Ho Chee-Wah
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Patent number: 9739826Abstract: A method for testing a workpiece (3), in particular a circuit board, by a test pin (2) arranged on a holder (1), the test pin (2) approaching a predetermined position on or in the workpiece (3), a position of the test pin (2) with respect to the holder (1) is intended to be changed.Type: GrantFiled: November 21, 2013Date of Patent: August 22, 2017Assignee: KONRAD GMBHInventors: Michael Konrad, Stefan Werner
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Patent number: 9733301Abstract: A system for communicatively connecting devices for testing to respective test pins of a test head of an automatic test equipment (ATE). The system includes a tester interface device for communicative connection to the test pins of the ATE. The tester interface device includes a first connector and a second connector. The first connector is communicatively connected by the tester interface device to a first group of the test pins and the second connector is communicatively connected by the tester interface device to a second group of the test pins. The first group and the second group can be different test pins, same test pins, or combinations of some same and some different test pins. The system may also include a first pogo pin block device and a second pogo pin block device.Type: GrantFiled: February 7, 2011Date of Patent: August 15, 2017Assignee: CELERINT, LLCInventor: Howard Roberts
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Patent number: 9696347Abstract: The test system provides an array of test probes having a cross beam. The probes pass through a first or upper probe guide retainer which has a plurality of slot sized to receive the probes in a way that they cannot rotate. The probes are biased upwardly through the retainer by an elastomeric block having a similar array of slots. The elastomer is then capped at its bottom by a second or lower retainer with like slots to form a sandwich with the elastomer therebetween. The bottom ends of the probes are group by probe height. A plurality of flex circuits at the different heights engage bottom probe ends at their respective height levels and take continue the circuits to a probe card where test signals originate.Type: GrantFiled: July 10, 2014Date of Patent: July 4, 2017Assignee: Johnstech International CorporationInventors: John DeBauche, Dan Campion, Michael Andres, Steve Rott, Jeffrey Sherry, Brian Halvorson, Brian Eshult
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Patent number: 9696369Abstract: A wafer test apparatus includes a probe station comprising a probe card that contacts a wafer positioned on a chuck during a wafer test. A test head is disposed on the probe card and tests electrical characteristics of a semiconductor chip positioned on the wafer. A probe card horizontality adjustment unit is positioned between the test head and the probe card and adjusts horizontality of the probe card during the wafer test.Type: GrantFiled: December 10, 2014Date of Patent: July 4, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Woo-kyu Lee, In-seok Hwang, Jong-koo Kil, In-ki Kim
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Patent number: 9638746Abstract: A probe card comes in touch with a test object to perform an inspection. The probe card contains: a probe substrate provided with a plurality of probes on the first surface and a plurality of anchor receiving portions on the second surface; and a supporting body disposed to support the periphery of the probe substrate, with at least a plurality of anchor receiving portions located within a probe existence region being arranged regularly and at an equal distance from each other on the second surface of the probe substrate.Type: GrantFiled: November 27, 2013Date of Patent: May 2, 2017Assignee: KABUSHIKI KAISHA NIHON MICRONICSInventors: Yoshiro Nakata, Yoshinori Kikuchi, Hirose Fujita
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Patent number: 9599844Abstract: An inspection apparatus capable of reducing the effect of noises is provided. An inspection apparatus according to the present invention includes a work table 26 on which an object, a fixed body 28 disposed above the work table 26, a probe assembly that holds a probe stylus 38a, a support base member 40 supported on the fixed body 28, a suspension mechanism 46 that supports the probe assembly 38 above the work table 26, and a signal circuit substrate 54 including therein an IC chip 54a that generates an inspection signal supplied to the probe stylus 38a, the signal circuit substrate 54 being supported by the suspension mechanism 46 below the suspension mechanism 46, in which the probe assembly 38 and the support base member 40 are electrically isolated from each other.Type: GrantFiled: October 23, 2014Date of Patent: March 21, 2017Assignee: KABUSHIKI KAISHA NIHON MICRONICSInventor: Takayoshi Kudo
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Patent number: 9603259Abstract: An active substrate includes a plurality of active components distributed over a surface of a destination substrate, each active component including a component substrate different from the destination substrate, and each active component having a circuit and connection posts on a process side of the component substrate. The connection posts may have a height that is greater than a base width thereof, and may be in electrical contact with the circuit and destination substrate contacts. The connection posts may extend through the surface of the destination substrate contacts into the destination substrate connection pads to electrically connect the connection posts to the destination substrate contacts.Type: GrantFiled: August 7, 2015Date of Patent: March 21, 2017Assignee: Semprius, Inc.Inventor: Christopher Bower
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Patent number: 9578776Abstract: A secure device is used for securing a printed circuit board assembly. The secure device includes a fixed base and a plurality of removable securing member. The fixed base includes a base body, a plurality of locking structures and fixed structures. The fixed structure has a key-shape hole. Each of the removable securing members respectively includes a post, an interference portion and a lock portion. When the printed circuit board assembly is operated to be secured by the removable securing members, a first side of the printed circuit board assembly needs to be locked by the locking structure firstly; the interference portion of each removable securing member needs to be inserted into the key-shape hole, and interfered with the key-shape hole after the respective of the removable securing members is turned along a rotation direction, thereby to make the printed circuit board assembly secured by the removable securing members.Type: GrantFiled: March 31, 2015Date of Patent: February 21, 2017Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATIONInventor: Chia-Liang Hsiao
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Patent number: 9564421Abstract: A semiconductor device includes a first substrate, a second substrate stacked over the first substrate, and a pillar member extending obliquely between the first and second substrates. The first substrate includes a mounting surface on which a semiconductor chip is mounted, with a resin interposed between the semiconductor chip and the mounting surface and extending beyond the periphery of the semiconductor chip on the mounting surface. The first substrate further includes a first pad forming part of the mounting surface and disposed outside the resin. The second substrate includes a second pad forming part of its surface facing toward the mounting surface. The second pad at least overlaps the resin when viewed in a direction in which the second substrate is stacked over the first substrate. The pillar member has first and second ends joined to the first and second pads, respectively, to electrically connect the first and second substrates.Type: GrantFiled: May 16, 2016Date of Patent: February 7, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Yoshihiro Machida
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Patent number: 9551745Abstract: A semiconductor device assessment apparatus that electrically assesses a semiconductor device formed on a semiconductor substrate includes a holding unit having a surface to hold the semiconductor substrate thereon, and a detection unit to detect irregularity on the surface of the holding unit. The holding unit on the surface includes a plurality of grooves formed such that when the semiconductor substrate is held on the surface, the grooves overlap a periphery of the semiconductor substrate and also have a portion located outer than the periphery of the semiconductor substrate.Type: GrantFiled: February 24, 2014Date of Patent: January 24, 2017Assignee: Mitsubishi Electric CorporationInventors: Hajime Akiyama, Akira Okada, Kinya Yamashita
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Patent number: 9523711Abstract: A probe apparatus includes a card clamp unit detachably supporting a probe card; and a wafer mounting table adsorbing the semiconductor wafer and bringing electrodes on the semiconductor wafer into contact with the probes. In order to mount the semiconductor wafer including an annular portion protruding from a rear surface of an outer peripheral portion and a thin portion having a thickness smaller than the annular portion, the wafer mounting table includes a planar portion on which the thin portion is mounted; and a step-shaped portion which is formed at an edge of the planar portion and mounts the annular portion thereon. Multiple circular vacuum chuck grooves are concentrically formed in the planar portion, and at least some of the vacuum chuck grooves are connected to multiple vacuum paths through which vacuum evacuation is performed at multiple positions separated from each other by 90° or more along a circumferential direction.Type: GrantFiled: April 25, 2013Date of Patent: December 20, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Kazuya Yano, Eiji Hayashi, Munetoshi Nagasaka