Abstract: A fully differential circuit in which all inputs and outputs of transconductors Gm1+, Gm1−, Gm2+, Gm2− and fixed gain amplifier GA are fully differential signals. The number of feedback loop elements is made odd by the addition of a fixed gain amplifier with a gain of 1 which is not used in conventional filter architecture, each element of the configuration consequently inverts the common voltage, and since the feedback loop has negative feedback with respect to the common voltage, the operating point can be determined without a need for a dedicated DC feedback circuit.

Abstract: A transconductance cell has first and second transistors, each transistor having a control terminal and first and second terminals. A signal is output from the second transistor in response to a voltage input applied to the control terminal of the first transistor. The transconductance cell includes a linear element coupled between the first terminal of the first transistor and the first terminal of the second transistor. A tank circuit is coupled between a reference potential and a node between the linear element and the first terminal of the second transistor.

Abstract: The apparatus for converting a differential input voltage to two fully balanced output currents is achieved by providing a common mode control circuit of a simplified circuit construction to an operational transconductance amplifier. The apparatus includes an operational transconductance amplifier that is comprised of an OTA input section for converting two input voltages of the differential input voltage to a pair of interim output currents and an OTA output section for converting the interim output currents to the output currents, and a common mode controlling circuit for providing a control voltage to the OTA.

Abstract: A voltage-to current (V-to-I) converter circuit for use in combination with a current-controlled oscillator (ICO) to form a voltage-controlled oscillator (VCO), wherein the V-to-I converter circuit provides a current to the ICO while this current ranges itself corresponding to the process, supply voltage, and temperature needs of the ICO, thus allowing a more stabilized ICO and VCO. In one embodiment, the V-to-I circuit allows for independent adjustability to compensate for each quantity of required process, supply voltage, and temperature. In another embodiment, the V-to-I circuit includes compensation circuitry for process and temperature only. There is no need for supply voltage compensation because the supply voltage for the V-to-I converter circuit is provided from a supply that has been linearly regulated and preferably built-in on the chip.

Abstract: An arrangement (1) for converting voltage (Vin) into current (Iout), implemented on a chip (100), comprises a first V/I converter (3), the operation of which is based on a conversion resistor (Rconv) formed on the chip. This resistor has an unknown fabrication tolerance (&agr;). This is compensated for by the presence of a second V/I converter (13) having a compensation resistor (Rcomp), which is also formed on the chip and which has the same fabrication tolerance (&agr;). Furthermore, a third V/I converter (23) is present, which operates on the basis of an external resistor (Rref). The second V/I converter (13) converts a reference voltage (Vref) into a compensation current signal (Icomp), and the third V/I converter (23) converts the reference voltage (Vref) into a reference current signal (Iref).

Abstract: Current mirror circuit including a current input terminal (2), a current output terminal (6), a common terminal (8), a first transistor (T1) arranged between the current input terminal (2) and the common terminal (8), a second transistor (T2) arranged between the current output terminal (6) and the common terminal (8), a transconductance stage (TS) having an input terminal coupled to the current input terminal (2), and an output terminal coupled to the common terminal (8), and a bias source (22) for biasing the control electrodes of the first and second transistors (T1, T2). This configuration provides a large bandwidth independently of the input current, accurate current transfer and a single pole system.

Abstract: A current pulse generator with process-independent and temperature-independent symmetric switching times, includes a differential stage which is adapted to generate a transmission current and a circuit for driving the differential stage which is adapted to generate a control voltage for the differential stage. The generator also includes a circuit for compensating the variations in the values of degeneration resistors of the differential stage, to generate, with the differential stage driving circuit, a current for controlling the differential stage, to keep the switching times of the current pulses of the generator substantially unchanged and symmetrical despite variations in the manufacturing process of the generator and the temperature.

Abstract: This invention relates to a method and apparatus for converting a current signal into a two-level output voltage depending on a reference current signal. In one embodiment, a first current, which is the reference current signal is applied to the apparatus. A negative feedback sets the output of the apparatus in a certain configuration. Any current signal to be compared to the reference current signal may be then applied. The output voltage level depends on whether the current signal is lower or higher than the reference current signal.

Abstract: A transconductance bias circuit includes: a differential pair having a first transistor M14 and a second transistor M15; a resistor R coupled between a gate of the first transistor M14 and a gate of the second transistor M15, the gate of the first transistor M14 is coupled to a reference voltage node; a third transistor M10 coupled to the first transistor M14; a fourth transistor M11 coupled to the second transistor M15; a fifth transistor M8 coupled to the third transistor M10, a gate of the fifth transistor M8 is coupled to the reference voltage node; a sixth transistor M9 coupled to the fourth transistor M11, a gate of the sixth transistor M9 is coupled to the reference voltage node; a current mirror 22 coupled to the fifth and sixth transistors M8 and M9; and a seventh transistor M6 coupled to the fourth transistor M11, a current in the seventh transistor M6 is equal to a current in the resistor R.

Abstract: An improved integrated self-adjustable continuous time band pass filter based upon a Gm cell with Gm compensation and bipolar transistors for use in a low power processing system for processing bursted amplitude modulated signals performing impedance-related measurements across a load. The system may be used for estimating stroke volume using the output and/or estimating hemodynamic maximum sensor rate using the output. The improved Gm cell provides for stabilization of the transconductance by compensating for manufacturing process variation of the value of the linearizing resistance RG by varying the transconductance bias current using a feedback signal proportional to the resistance of a resistor which is a replicate of the linearizing resistor.

Abstract: The evaluation circuit has a current interface (1,1′; 11,11′) for a current signal (i2) from an electronic signal transducer (6,6′; 16,16′); a current-sensing FET (3,3′; 13,13′) having a gate (G), a source (S), a drain (D) and a sensing output (sense), which is connected so that the current signal from the transducer passes through the source and drain; a monitoring circuit (5,5′; 15,15′) for controlling the current-sensing FET in the event of a malfunction connected between the gate (G) and to the drain (D) or source (S); a current reflector circuit (4,4′; 14,14′) having an input connected to the sensing output (sense) of the current-sensing FET and a resistor (2,2′; 12,12′) for converting current to voltage, which is connected to an output of the current reflector circuit, so that the current signal is converted to a voltage signal tapped between the resistor and the current reflector circuit.

Abstract: In a ultra-large scale integrated circuit of CMOS structure, high speed operation can be performed without being affected by the wiring capacitance and the gate input capacitance. A current-output type gate is used as a transmitting gate 11, and a capacitor 54 is charged or discharged only during the transition time of a signal. The charge or discharge current is multiplied by current Miller circuits 55, 56 to supply the current to a conductive path 15. A current-input type gate is used as a receiving gate 31. This gate 31 is arranged such that the output and input ends of an inverter 35 of CMOS structure are interconnected, respective ends of the inverter to be connected to power supplies are connected to a positive power supply terminal 16 through the current Miller circuit of p-channel MOS.FETs 37, 39 and connected to a negative power supply terminal 17 through the current Miller circuit of n-channel MOS.

Abstract: A low noise transconductance device having a transconduction comprising of two transconductive elements and a load, the transconduction of the first element equals N*Gm1, the transconduction of the second element equals Gm1/N, and a load having a resistance of 1/Gm1. The output of the first device is coupled to the input of the second element, and the load is coupled in parallel to the output of the first element. The accumulative transconduction of the device equals Gm1, and the noise generated by the device is lower than the noise generated by a single transconduction device having a gain of Gm1. N>2.

Abstract: A voltage to current converter comprises a first long tail pair comprising transistors whose emitters are connected via equal value resistors to a constant current source. The first long tail pair forms a main transconductance stage. A subsidiary or corrector transconductance stage is connected in anti-phase with the main stage. The corrector stage is based on another long tail pair comprising transistors whose emitters are connected via resistors to another constant current source. The linear part of the transconductance of the corrector stage is substantially less than that of the main stage but the non-linear part is substantially equal to that of the main stage. Thus, non-linear distortion can be substantially reduced.

Abstract: A circuit is designed with a first transconductor circuit (903) with a first input terminal (901) coupled to receive a voltage signal, a second input terminal (1017) coupled to receive a control signal and an output terminal. The first transconductor circuit has a gain responsive to the control signal. A first integrator circuit (905) has an input terminal coupled to the first transconductor circuit output terminal and has an output terminal. A second transconductor circuit (909) has an input terminal coupled to the first integrator circuit output terminal and an output terminal. A second integrator circuit (911) has an input terminal coupled to the second transconductor circuit output terminal and has an output terminal.

Abstract: The circuits and methods of the present invention provide rail-to-rail output stages that cancel the non-linear components of the transconductances of transistors used in the output stages, that allow the idling current in the output stages to be controlled by external current sources and device size ratios, and that enable the idling current in the output stages to be maintained independently of manufacturing processes, temperature, and power supply voltages. The output stages generally comprise a complementary subcircuit, a current mirror and an output driver. The output stages receive an input signal and a bias voltage from an external source and responsively produce a push current that feeds current into a load and a pull current that pulls current from the load. When the push current matches the pull current, the output stages are said to be “idling.” The bias voltage controls the idling current.

Abstract: The invention relates to an elementary biquadratic cell for programmable time-continuous analog filters. The biquadratic cell is coupled between a first voltage reference and a second voltage reference and has at least one pair of input terminals and first and second pairs of output terminals. The cell includes a pair of half-cells, which half-cells are structurally identical with each other. Each half-cell comprises at least a first transistor coupled between the first and the second voltage reference and having a base terminal connected to a respective one of the input terminals. Each half-cell further comprises second and third transistors coupled between the first and second voltage references. The second transistor has a base terminal connected to the first output terminal of the first pair of output terminals and a collector terminal connected to the first output terminal of the second pair of output terminals.

Abstract: A voltage-controlled oscillator is provided which has input and output characteristics that do not depend upon fluctuations or variations in the power supply voltage, operating temperature, and manufacturing process, and which provides a high oscillation frequency. A ring oscillator comprises a plurality of inverters that are connected in a ring-like arrangement. A voltage-current converter controls an amount of current flowing through each of the inverters of the ring oscillator according to a voltage of an input signal. The voltage-current converter comprises a first transistor (P101) that is connected to a power supply line and disposed such that current corresponding to the voltage of the input signal flows through the first transistor. Each of the inverters of the ring oscillator has a second transistor (P103) that is connected to the power supply line and forms a current mirror circuit with the first transistor.

Abstract: Current measuring device which comprises a current sense resistor (2) for generating a voltage proportional to the current to be measured. The voltage is measured by a MOS transistor (4) having its gate terminal connected to a first terminal of the current sense resistor, and having its source terminal connected to a second terminal of the current sense resistor. The drain current of the MOS transistor is coupled via a current coupling device to the source terminal of a further MOS transistor (10) having its gate and source terminals interconnected. The drain current of the MOS transistor causes a voltage across the further MOS transistor which is proportional to the current in the current sense resistor. This is true only if the voltage across the current sense resistor exceeds the threshold voltage of the MOS transistor. By introducing an offset source (6, 8), an output voltage is obtained which is proportional to the current to be measured for all current values as long as the MOS transistor is conducting.

Abstract: A method and system for calibrating analog integrated circuits. Initially, a single calibration circuit is formed integral with a group of analog integrated circuits. A control signal and a calibration signal are generated from the calibration circuit. Next, the control signal and the calibration signal are selectively coupled to an input of a particular analog integrated circuit among the group of analog integrated circuits. The particular analog integrated circuit is then selected for calibration via the control signal.

Abstract: A semiconductor integrated circuit has an amplifier circuit for amplifying a voltage change accompanying a change in a capacitance of a capacitor in an electric microphone. The integrated circuit includes a voltage conversion circuit for voltage converting this voltage change; an amplifier for amplifying a voltage converted by the voltage conversion circuit; and a reference bias circuit for producing and outputting a reference bias voltage to the amplifier. The voltage conversion circuit operates so that the midpoint of the voltage change is a value approximately ½ the dc voltage supplied to the amplifier.

Abstract: In a wide dynamic range and with constant transconductance (Gm) differential voltage-to-current converter, operating in class AB, essentially comprising two complementary pairs of transistors, respectively of pnp (Q1, Q2) and npn (Q3, Q4) type, and two nominally equal resistors (RE1 and RE2), the emitters of the first pair transistors (Q1, Q2) are connected to the respective ones of dse second pair transistors (Q3, Q4) through the two resistores (E) having equal nominal resistance; a junction is provided between the emitters of the second pair transistors (Q3, Q4); and input voltages (V1 and V2) are respectively applied to the bases of first pair transistors (Q1, Q2), from collectors of which transistor output currents (I1, I2) are taken. Preferably, in this differential voltage-to-current converter, biasing and thermal balancing circuits (VP1, VP2) are connected to the first (Q1, Q3) and, respectively, to the second (Q2, Q4) transistors of said two pairs of transistors.

Abstract: A circuit and method are disclosed for controlling the slew rate of the output voltage of a driver in a push-pull configuration. The circuit includes a capacitive element and a current generator circuit for generating one or more currents. The circuit further includes a switching circuit for selectively charging and discharging the capacitive element in response to an input signal, wherein the voltage across the capacitive element is a voltage signal whose edge transitions have slopes which are controlled based upon the capacitance of the capacitive element and the current level of the one or more currents. The circuit further includes a conversion circuit for converting the voltage signal into one or more current signals, the one or more current signals being used to control a pull-up device and pull-down device of the driver so that the slopes of the edge transitions of the output voltage thereof is based upon the slopes of the edge transitions of the voltage signal appearing across the capacitive element.

Abstract: An integrated transconductor circuit has an active load element and two parallel sets of transconductor stages. The active load element provides a high impedance without requiring a large area within the integrated transconductor circuit, and provides linear impedance when the active load devices are biased in the triode region of their respective characteristic curves. The multiple transconductor stages prevent saturation from reducing the dynamic range available at the output of the transconductor circuit. The parallel sets of transconductor stages are used to improve output linearity by reducing the differences between the threshold voltages of the serially-connected transconductor stages.

Abstract: An integrator input circuit is disclosed.

Abstract: Many applications require the conversion of a differential current signal into a single-ended signal. The shortcomings encountered with existing approaches include poor conversion efficiency, limited bandwidth, and large size. The converter disclosed uses active devices to obtain a unit of small size and high efficiency having a wide bandwidth of operation.

Abstract: The present invention is to provide an apparatus for driving a flat panel display which allows the amount of electrons emitted from a cell to be easily controlled and which performs a stable display gradation processing. To this end, the present invention comprises a shift register for sequentially shifting a video signal input from the exterior in synchronism with a clock signal; a latch for temporarily storing and outputting said video signal which has been sequentially inputted from said shift register; an AND gate for adjusting the time of outputting said video signal output from said latch; and an output driving circuit for inputting said video signal from said AND gate and performing a display gradation control. The present invention allows the amount of electrons emitted from a cell to be easily adjusted so that a 16 step of gradation processing of a display is made possible.

Abstract: Embodiments of the invention provide a transconductance control circuit, particularly for a continuous-time filter, comprising a transconductor across which a constant voltage is input. The transconductor is connected to a digital-to-analog converter (DAC) to set a reference current. A feedback loop is provided between an output of the transconductor and an input. In particular, the circuit further comprises a means for mirroring the reference current set by the DAC both to the feedback loop and to at least one cell of a cascade-connected filter.

Abstract: The invention is an amplifier configuration which provides signal gain at very low levels of distortion. The inventive amplifier configuration consists of two amplifiers whose outputs are added to give the total amplified signal. A first amplifier functions in the usual way, amplifying a signal from a voltage source and having a controllable feedback gain. A second amplifier is also fed by the voltage source but applies a feedback gain to the total amplified signal rather than to its own output signal. By selecting the feedback gains to be substantially identical, portions of voltage waveforms that have been removed or altered due to clipping or other forms of distortion are restored by the second amplifier. The invention is particularly useful when amplifier gain is low, e.g., at high frequencies. Suitable implementations are in the voltage domain, using operational amplifiers, or in the current domain, using, for example, voltage-controlled current sources.

Abstract: A battery-charging electronic device comprises a current generator adapted to supply a charging current to a battery and a controlled current edge switch having a circuit for controlling the switching edges of current being flowed through a power transistor. The switching edge control circuit comprises a controlled edge variable voltage generator for generating a controlled edge voltage signal, a voltage/current converter for converting the voltage signal to a controlled edge current signal, and a driver circuit for the power transistor being input the controlled edge current signal to mirror, onto the power transistor, an output current which is proportional to the controlled edge current signal.

Abstract: The present invention discloses a mixer using a replica voltage-current converter, and more particularly a mixer using the replica voltage-current (V-I) converter of the present invention, which feedbacks the output current of the replica voltage-current converter using an additional amplifier so as to improve the linearity thereof by the gain of the amplifier because the conventional mixer operating at a high speed dissipates a lot of electrical power to have low output impedance.

Abstract: A comparator (20, 30) for comparing first and second current inputs includes a first stage that has a first resistor (43) being coupled to a first input node and operable to produce the a first voltage level corresponding to the first current input at a first voltage node when a CLK signal is high. A second resistor (45) is provided and is coupled to a second input node and operable to produce a second voltage level corresponding to the second current input at a second voltage node when the CLK signal is high. A pair of cross-coupled transistors (36, 37) are coupled to the first and second voltage nodes when a CLK signal is high and are operable to latch the first and second voltage levels when the CLK signal is high. A first differential amplifier (60) is coupled to the first voltage node and is operable to receive the latched first voltage level at a non-inverting input and the latched second voltage level at an inverting, input and to generate a first amplified voltage level when the CLK signal is high.

Abstract: An impedance conversion circuit for the use with a video apparatus, an audio apparatus, or a communication apparatus is provided. The impedance conversion circuit can be used at a frequency higher than that conventionally used and is suitable for formation as an integrated circuit. A video apparatus using this impedance conversion circuit, and the like are also proposed. Driving current is supplied to first and second terminals of an impedance circuit in accordance with voltages of first and second input terminals, respectively, and current is made to flow out of the second and first output terminals in accordance with the first and second terminal voltages of the impedance circuit, respectively.

Abstract: An OTA having a completely linear transconductance characteristic or a squarer having an accurate square-law characteristic is provided, which is comprised of first and second differential circuits. The first differential circuit has a first differential pair of first and second MOSFETs whose sources are coupled together and a third MOSFET serving as a bypass transistor for the first differential pair. The first differential pair is driven by a first constant tail current. The second MOSFET is driven by a first constant driving current. The second differential circuit has a second differential pair of fourth and fifth MOSFETs whose sources are coupled together and a sixth MOSFET serving as a bypass transistor for the second differential pair. The second differential pair is driven by a second constant tail current. The fifth MOSFET is driven by a second constant driving current.

Abstract: A method and circuit, for use with a parallel data bus of defined width, which provide a parallel data transmission and reception rate which is greater than the defined width of the parallel data bus. With respect to improving transmission, provided is a width-reduction circuit element, having at least two inputs through which are received a first set of parallel digital data signals and having one or more outputs through which are transmitted a second set of parallel digital data signals where the second set is both smaller than the first set and representative of the information contained within the first set. The one or more outputs interface with a parallel connector which is sufficient to form an operable connection with the parallel data bus of defined width.

Abstract: A high-speed current switch has complementary switching stages for collectively producing a square-wave output current. Spurious currents and charging delays caused by intrinsic capacitances in one stage substantially cancel those in the other stage.

Abstract: A method and system is described wherein a signal with a lower frequency is up-converted to a higher frequency. In one embodiment, the higher frequency signal is used as a stable frequency and phase reference. In another embodiment, the invention is used as a transmitter. The up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used as a frequency or phase reference, the oscillating signal is not modulated, and controls a switch that is connected to a bias signal. When the invention is being used in the frequency modulation (FM) or phase modulation (PM) implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate the bias signal.

Abstract: A current sensing circuit with high input impedance comprises a first transconductance amplifier connected across the terminals of a resistor, through which a current to be measured flows. A voltage amplifier is cascade-connected to the first transconductance amplifier. A second transconductance amplifier is feedback connected between an output of the voltage amplifier and a virtual ground node of the voltage amplifier. A ratio between the output voltage of the voltage amplifier and the voltage across the resistor are equal, in absolute value, to a ratio of the transconductances of the first and second transconductance amplifiers.

Abstract: A capacitor current sensing circuitry (100) for sensing the current through a bandpass capacitor (20) of a first biquad stage (80) and generating an output current in response. The capacitor current sensing circuitry (100) includes a differential input circuit comprising a transistor (123) and a transistor (124), a fixed current source (130), a variable current source (120), a variable current, source (122), an input current sink (126), a differential output circuit comprising a transistor (132) and a transistor (134), and a programmable output current sink (138). The differential input circuit receives an input sense voltage and generates a first input current, a second input current, a first output voltage, and a second output voltage in response. The fixed current source (130) generates a current that is used to provide a first current component to the first input current and a first current component to the second input current.

Abstract: A method and apparatus of biasing a transistor to perform as a resistive device in an integrated circuit die is disclosed. A base lead of a transistor is coupled to a first lead of the transistor. A voltage is applied to a first lead such that the voltage does not exceed a threshold voltage of the transistor.

Abstract: A comparator circuit with low current consumption for driving a sawtooth generator includes two differential amplifiers connected back to back, which control the bias current of an operational amplifier through a current measuring device and a means for impressing bias current. During normal operation, that is to say outside a switch-over point of the operational amplifier, the means for impressing bias current is supplied by a comparatively small standby current. Near the switch-over point of a sawtooth signal, the bias current of the operational amplifier is increased. Since the bias current source supplies a current pulse only at the switch-over point of the sawtooth signal, but remains switched off for the remainder of the time, the comparator circuit current consumption is minimized.

Abstract: A variable transconductance method and circuit is disclosed along with a filter and an amplifier using the same. An output transconductance is set by selectively adding at least two transconductances which are set according to a select signal for variably selecting an output transconductance.

Abstract: A voltage/current converting circuit whose gain is hard to be influenced by the fluctuation in process has a constant current source for generating a constant current; a shunt circuit for flowing the constant current generated by said constant current source to a first and second current paths, the first current path flowing a first current corresponding to an input voltage, and the second current path flowing a second current defined as a difference between the constant current and the first current; and an output circuit for taking out a current bearing a predetermined relationship with the first current.

Abstract: A method for generating a response in a transconductance circuit includes receiving a circuit differential voltage input and providing a differential voltage input to each of a plurality of differential pairs to control, in part, a differential current generated by each differential pair. Each differential voltage input has a different common-mode voltage level. The method also includes sinking current through each of the differential pairs to control the differential current generated by each differential pair. The magnitude of the current sunk through one of the differential pairs is different from the magnitude of the current sunk through at least one of the other differential pairs. The method also includes combining the generated differential current from each of the plurality of differential pairs to produce a differential current output.

Abstract: A circuit for generating at least two output voltages in response to an input current. A first stage comprises a first impedance for providing a first output voltage when the input current passes through the first impedance. At least a second stage comprises a second impedance coupled to the first impedance, wherein the second impedance provides a second stage voltage when the input current passes through the second impedance. At least a second output voltage is equal to the sum of the second stage voltage and the first output voltage. The second stage further comprises a second stage shunt operable to shunt the input current away from the second impedance when the magnitude of the second output voltage is above a predetermined amount.

Abstract: A hard disk drive system (10) has a read/write head (12) coupled to a read channel circuit (23) in an integrated circuit (13). The read channel circuit includes a bipolar transconductance-C filter (26) having at least one capacitor (27) with a capacitance value that may vary from an intended value. A temperature compensating voltage (VPTAT) is converted to a first current, a programming circuit (51) produces a second current (IPROG) as a function of the first current and a digital compensating input (54), and the second current is converted to a voltage (61) and used to control characteristics of the filter circuit. A trimming circuit (46) shunts away from the programming circuit a portion of the current generated by the voltage-to-current converter circuit, which portion is defined by a digital trim input (48).

Abstract: A shock sensor circuitry (26) is provided for processing an input signal generated by a shock sensor (28) in response to the shock sensor (28) detecting a force or shock. The shock sensor circuitry (26) includes a leakage tolerant input amplifier (38) for receiving the input signal, and any leakage currents that may also be provided, and amplifying the input signal to generate an amplified input signal. The leakage tolerant input amplifier (38) provides an ac gain of ten and a dc gain of zero. The shock sensor circuitry (26) also includes a filter and amplification circuit and a window comparator. The filter and amplification circuit filters the amplified input signal and amplifies select frequencies of the amplified input signal to generate a summed signal that is provided to the window comparator and compared to a reference value.

Abstract: An integrated, tuning circuit for tuning a MOSFET-C filter contains a tuning MOSFET and a differential amplifier. A current source is connected to the drain of the tuning MOSFET. The output of the amplifier is coupled to the drain of the tuning MOSFET and to a terminal that connects to the drains of the MOSFETs of the filter, so that the equivalent resistance of the filter is dependant on the current. The current source is coupled to a reference current generator, such that current supplied by the current source to the tuning MOSFET is proportional to the current supplied in the reference current generator, which in turn varies with process and environmental conditions of a capacitance. As a result, changes in process and environmental conditions oppositely affect the capacitance and resistance in the filter, resulting in a fixed RC product and fixed frequency response from the filter.

Abstract: The present invention relates to an integrated circuit adapted to perform the function of a diode of the DIAC type, the circuit having an input terminal and an output terminal. The circuit includes a first input transistor having a first terminal connected to a fixed voltage reference, a second terminal, and a control terminal coupled to the input terminal of the circuit. The circuit further includes second and third transistors in a current mirror configuration, each having a first terminal for coupling to the input terminal of the circuit, and a second terminal, and associated control terminals connected together and coupled to the second terminal of the first input transistor, the second terminal of the second transistor being connected to the control terminal of the first transistor.

Abstract: A transcurrent circuit in which a first current flows in an output-stage circuit based on a second current flowing in an input-stage circuit and a given current transform ratio of the first current to the second current. In the transcurrent circuit, at least one of the input-stage circuit and the output-stage circuit in the transcurrent circuit is constructed with a plurality of transistors. Further, all the transistors in both of the input-stage circuit and the output-stage circuit have the same gate length.