Abstract: Distortion control in a push-pull output stage of a speech amplifier of a telephone powered through the telephone line is more effectively and advantageously implemented by independently sensing an eventual state of saturation reached by any of the two output transistors of the amplifier, summing the current signals representative of the sensed state of saturation of either or both output transistors, integrating the resulting sum current signal to produce a DC signal and using the DC signal for activating an AGC loop. The DC signal indiscriminately accounts for any cause of saturation, though virtually representing the level of the amplified AC signal. Distortion may be controlled without penalizing output voltage swing and power consumption.

Abstract: Current feedback amplifier circuits, and current-to-voltage converter circuits, employing operational amplifier current mirror circuits are provided. Also provided is an output compensation circuit that, in a current feedback amplifier circuit employing the output compensation circuit together with the operational amplifier current mirrors, reduces the input bias current to be comparable to the input bias current of a voltage feedback amplifier. Additionally, a circuit and method of providing a current source that is proportional to absolute temperature is provided. A current feedback amplifier circuit employing the output compensation circuit and the operational amplifier current mirrors, and having input transistors biased by the proportional to absolute temperature current source is also provided. The drift of the input bias current over temperature are thereby made predictable and, with trimming, substantially reduced.

Abstract: An integrated circuit employing quantized feedback is capable of compensating for decay in capacitively-coupled digital signals. In an exemplary embodiment, the integrated circuit includes a quantized feedback receiver connected to a capacitively-coupled integrated circuit input. The capacitively-coupled input produces a decaying signal for corresponding intervals of an input digital signal that are substantially DC voltages. Longer sequences of consecutive data bits of the same logic state in the input signal are represented by a corresponding longer DC voltage signals resulting in a greater decay in the capacitively-coupled signal. The receiver operates by generating a complementary feedback signal which is combined with the capacitively-coupled signal. The feedback signal is generated with a magnitude rate of change that compensates for the decay in the capacitively-coupled signal such that the digital information in the combined signal can be detected substantially without error due to the decay.

Abstract: An output circuit, for minimizing output idle current fluctuations and improve the output voltage range, has first and second transistors connected to first and second power sources, with a plurality of diodes connected to control terminals of the first and second transistors. The output circuit further includes a third transistor having a first terminal connected to the second power source and a second terminal connected to a predetermined position among the plurality of diodes. A predetermined voltage is applied from the diodes to the control terminal of the first transistor when the third transistor is saturated, to bring a level of an output of said output circuit close to a level of the second power source. A fourth transistor, a fifth transistor, a first resistor, and a capacitor are also provided.

Abstract: The inventor has created several methods to eliminate or greatly reduce the ground loop problem. The inventor has discover that ground loop distortion is caused by the switching from positive to negative in alternating current. He has designed several devices to eliminate this problem. In his first embodiment he places a set of two diodes either cathode to cathode or anode to anode, or a neon bulb, or piezoelectric crystals in parallel with all the capacitors in an amplifier or other electronic device. These sets of diodes eliminate the ground loop distortion within the amplifier or electronic device. The applicant has also devises several power supply that eliminate or greatly reduce the ground loop distortion in an amplifier or electronic device they are attached to. Also the applicant has found that by attaching two diodes either anode to anode or cathode to cathode, or a neon bulb, or a piezoelectric crystals between an audio, video or digital cable and its ground will reduce distortion within the cable.

Abstract: A control system for controlling periodic disturbances employing a delayed inverse filter (5), a variable delay (6), a controller, a system model (4) and a comb filter (9).

Abstract: A voltage overshoot limiter having a detector circuit that looks at the node at which the undesirable overshoot would occur and provides a signal that is proportional to the unipolar rate of change of voltage at the node. This output is fed back to the first stage of the control circuit, error amplifier, etc. in such a manner as to reduce the rate of change of the circuit's nodal voltages to less than their slewing rates. By modifying the value of the detector's output for a given detected slew rate at the node, it is possible to reduce both its overshoot significantly and to reduce its unipolar rate of voltage change. The invention is described as being unipolar, that is, responding to rates of change of voltages which are either positive or negative, though bipolar implementations may be realized.

Abstract: In a D.C. restoration circuit for a digital FM radio receiver, in which demodulated signals may be presented at the output of the demodulator as low-level differential signals superimposed on a variable D.C. level, the differential signal paths are capacitively coupled to the inputs of a comparator, and the voltage excursions at these inputs are clamped when the voltage between the inputs exceeds a predetermined value.

Abstract: An electronic circuit is provided with a first field effect transistor and a second field effect transistor, in which a drain of the first field effect transistor connected to a source of the second field effect transistor. This electronic circuit inputs a first signal to a gate electrode of the first field effect transistor, inputs a second signal to a gate electrode of the second field effect transistor and outputs a signal from a drain of the second field effect transistor. This electronic circuit is a cascode circuit related to the current drivability of the second field effect transistor is set to be larger than the current drivability of the first field effect transistor, and there is an effect that third-order or higher order distortion characteristics of a cascode type or dual-gate circuit can be reduced.

Abstract: A novel compensation device for conditioning or generating signals to have an arbitrarily defined shape, produced to an arbitrarily specified accuracy. The device comprises a plurality of bounded polynomial function generators having outputs summed into a summing network to produce a signal which is the composite of the effects of all of the polynomial generators. Accuracy is achieved through the use of fusible link trimming of the compensation circuits, which are configured to provide mathematically well-behaved polynomial functions with predictable responses to the programming, and which produce effects only over desired segments of the range of interest. The result is a monotonic signal with no discontinuities, which can be made arbitrarily close to a specified signal.

Abstract: A ring oscillator circuit which provides an output signal having a substantially constant, fifty (50%) percent duty cycle. The circuit includes a plurality of cascaded inverting stages, each of which has an input circuit for detecting an output voltage of a preceding inverting stage. One inverting stage provides a voltage to an output node. A clamping circuit, coupled to the output node, provides current to the output node whenever the instantaneous voltage output at the output node departs from a threshold voltage of a subsequent logic circuit. The current is such as to clamp the average voltage output to the threshold voltage. The plurality of cascaded inverting stages is coupled to power supply voltage across capacitor configured transistors. The ring oscillator circuit can be employed within a voltage controlled oscillator.

Abstract: This invention deals with the problem of an error voltage in a MOSFET analog switch sample and hold circuit caused by the turn off charge in the MOSFET analog switch. The invention provides a compensating circuit which can be adjusted to exactly compensate for the turn off charge which causes the error so that the error can be reduced to zero or nearly zero. The compensating circuit can be used in both open loop and closed loop sample and hold circuits. The compensating circuit can be used in combination with a Miller feedback circuit for eliminating the error voltage.

Abstract: A virtual ground array semiconductor memory device includes a matrix of memory cells, which performs writing and erasing operations utilizing FN current, reduces the electric power consumption and the deterioration of a tunnel insulating film. Each memory cell has a floating gate on one side of a channel region and a control gate covering the floating gate and the other side of the channel region.

Abstract: There is disclosed a filter circuit wherein a current control portion (12) controls a constant current (I.sub.2) specifying the sum of currents flowing in transistors (T119, T120) of a control portion (11) and transistors (T19, T20) of a control portion (9) on the basis of a potential difference between an output voltage (V.sub.1) of an operational amplifier (7) and a constant voltage (V.sub.3) whereby, if there is a difference in voltage level between a control voltage (V.sub.2) of the control portion (9) and the constant voltage (V.sub.3) of the control portion (11), a filter control portion performs the same control as a reference filter output characteristic of a filter portion (8) to an ideal input-output characteristic.

Abstract: A MOS-based current-switch/driver multiplexed and coupled with a tapped delay line so as to form a generator for transmitting on unshielded, unfiltered transmission lines highly-symmetric data pulses displaying minimal transient aberrations and minimal common-mode noise. The switch/driver is a basic differential current switch incorporating two MOS output transistors controlled by a novel switching means. The novel switching means ensures the symmetry of the output signals by compensating for the turn-on/turn-off asymmetries inherent in MOS transistors. The compensation is provided by the control circuit interposed between the switch/driver inputs and the control gates of the output transistors, a control circuit which includes deliberately-skewed CMOS inverters and a pair of MOS driver-transistors associated with each output transistor. The output signals from these current generators are referenced to ground.

Abstract: A method for processing electrical signals includes the steps of: storing a plurality of first data signals, each representative of an instantaneous amplitude of a first input signal in a memory; selecting one of the first data signals in response to a second input signal; combining the selected one of the first data signals with a second data signal representative of a subsequent instantaneous amplitude of the first input signal, to produce a difference signal; producing a first output signal in response to the difference signal; and combining the difference signal and the selected first data signal to produce a modified data signal and for replacing the selected one of the first data signals with the modified data signal in the memory. The method can be performed by an equalizer in a circuit for compensating for amplitude variations in a radio frequency signal or by a comb notch filter.

Abstract: An input signal is split into two signals, one of which is provided to a distortion generator and a the other of which is provided to a three-way combiner. The distortion generator comprises a single composite amplifier stage having two nonlinear amplifiers and two 180 degree splitters. The amplifiers produce signals having both odd and even-order distortion components because the amplifiers exhibit non-linear behavior. The distortion generator produces two output signals, one of which consists of the fundamental signal and odd-order distortion components, and the other of which consists only of even-order distortion components. The three-way combiner combines these two signals with a portion of input signal at a phasing that produces a resultant output having both the odd and even-order distortions suppressed. Equalizers may be used to provide phase and/or amplitude compensation for the two signals produced by the distortion generator before providing them to the three-way combiner.

Abstract: A generalized frequency dependent predistortion circuit for nonlinear optic devices such as semiconductor lasers and light emitting diodes includes a pre-filter and post-filter associated with a linearizer (distorter). A multi-channel sub-carrier electrical signal is input to a splitter which provides on a primary path a signal to a time delay and hence to a coupler to the secondary paths. In the first secondary path, a pre-filter provides a signal to a second order distorter. This signal is then subject to a post-filter and then to a variable attenuator. In the second secondary path, a third order distorter again has an associated pre-filter and post-filter with a variable attenuator downstream of the post-filter. The variable attenuators in each path provide frequency independent attenuation. In one version the distorters in both paths are nonlinear diode circuits. The second secondary path provides very low fundamental leak-through.

Abstract: A rectangular-to-sine wave converter circuit (10) is provided that comprises a flip-flop (12) that provides for a square wave and an inverse square wave circuit with fifty percent duty cycles. Each of the square wave signals is passed through a multi-stage low pass filter. The stages of the low pass filters are separated by buffers (26) and (32). The common mode voltage of the output signals at output nodes (40) and (44) are adjusted with respect to an arbitrary bias voltage V.sub.bias by using bias resistors (42) and (68).

Abstract: A circuit and method provides a low distortion buffer by using a resistive divider stage (18, 20) and a gain stage (12) whose gain is equal to the inverse of the attenuation ratio of the resistive divider to provide unity gain. Multiple inputs (14, 42, 44, . . . 46) to the buffer circuit are accommodated by an input switching network (30, 38). The gain error introduced by the resistance of the switching network (30, 38) is canceled by placing an equivalent network (60) in a feedback path of the gain stage. The preferred circuit topology is well-suited to low-voltage applications and provides a low-distortion output. Circuits for reducing power consumption (68, 70) and minimizing undesirable transients (72) are also provided.

Abstract: In a distortion compensating circuit, an initial value sufficient to provide a distortion compensating effect is previously set in a memory storage for storing distortion compensating data, whereby the convergence time of the distortion compensating effect is shortened.

Abstract: A distortion compensating unit is provided which can reduce the time required to converge distortion compensation values into a given value and operate with an improved stability after said convergence. Constants of multipliers in a correcting factor generating circuit are switched from one to another, depending on the time from the start of operation of a distortion compensating circuit or the temperature in a power amplifier. A constant to be switched is selected to be larger than that of the prior art until the convergence is completed and to be smaller than that of the prior art after the convergence has been completed. Thus, the time required to converge the corrected value into a given value can be reduced to less than that of the prior art. In addition, the distortion compensating unit can operate with an improved stability after the convergence.

Abstract: An amplitude- and rise-time-insensitive timing-shaping filter (10) for converting a selected input signal into a bi-polar output signal having a zero-crossing point which is independent of the rise-time and amplitude of substantially linear-edge input signals, and which is amplitude insensitive for input signals of arbitrary fixed shapes. The amplitude- and rise-time-insensitive timing-shaping filter (10) includes an attenuator (14) for generating an attenuated signal, a delay path (12) for generating a delay signal, and a differencer (16) for subtracting the attenuated signal from the delayed signal. The delay path (12) of the present invention includes a low-pass filter of a selected order and configuration, an all-pass filter with a selected order and configuration, or an all-pass-low-pass filter combination for generating a delayed signal.

Abstract: A compressor which is capable of compressing an input signal having an extremely large magnitude, without the signal being distorted and without the necessity of a additional circuit element such as an automatic level controller external thereto. The compressor includes a summing amplifier, a full-wave rectifier, an active limiter, and a gain controller. The summing amplifier compresses an input signal and produces a compressed output signal which is a compressed version of the input signal. The full-wave rectifier full-wave rectifies the compressed output signal and converts the rectified compressed output signal to a DC voltage output, and converts the DC voltage output to a first DC output. The active limiter compares the DC voltage output with a prescribed limit voltage, and is only enabled when the DC voltage output is greater than the limit voltage to produce a second DC output which is proportional to the difference between the DC voltage output and the limit voltage.

Abstract: An input signal provided by a generator is applied to a laser emitting diode via a predistortion circuit for improving the linearity of the response of the source. The predistortion circuit includes a linear pi attenuator member constituted by resistances and a non-linear compensating element constituted by a Schottky diode connected in parallel with said attenuator member. The invention is particularly applicable to making light transmitting cable heads for optical fiber telecommunications systems.

Abstract: A geometry correction waveform synthesizer includes a plurality of DC controlled multipliers each coupled to respective sources of complimentary geometry correction signals. The DC controlled multipliers are coupled to respective gain control voltage sources as well as null adjustment voltage sources to provide a variable amplitude and polarity correction signal output. The individual correction signal outputs of the DC controlled multipliers are combined to form a composite geometry correction signal which is applied to a gain control circuit. The individual gain control signals used by the DC controlled multipliers are added to form a combined gain control signal which is used to control the composite correction signal amplitude and maintain correction signal amplitude within a predetermined range. An overall gain control couples the composite geometry correction signal to the scan system.

Abstract: The disclosure relates to the linear power amplification, in a single channel, of a composite signal formed by two independent signals. In a single channel formed by correction means followed by a linear preamplifier followed by a saturated amplifier, the filtering and symmetry effect produced, both in the correction means and in the saturated amplifier, is advantageously used to compensate for clipping of the composite signal due to the amplifier. This makes it possible to obtain an undistorted output signal whose amplitude exceeds the level of saturation of the saturated amplifier. The compensation makes it necessary for the transfer characteristic of the correction means to have a given slope between two points beyond which the saturation appears in the saturated amplifier and a slope that is substantially thrice the given slope on each side of these two points.