With Tuned Circuit Patents (Class 327/329)
  • Patent number: 11848666
    Abstract: Methods and devices to reduce the switching time of radio frequency (RF) switches including antenna switches are disclosed. The disclosed teachings include selective bypassing of the capacitive and resistive elements of the circuit during the transition of RF switches from one state to another. Several implementations of the disclosed methods and devices are also presented.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: December 19, 2023
    Assignee: pSemi Corporation
    Inventors: Joseph Porter Slaton, Parvez Daruwalla
  • Patent number: 8416738
    Abstract: A communication method for at least one mobile station that includes a target mobile station that performs a Cooperative Multi-Point (CoMP) communication with at least two base stations, is provided. The communication method includes determining a beamforming vector used by the at least two base stations based on channel vectors and at least one channel matrix such that a signal-to-leakage-plus-noise-ratio (SLNR) for a target antenna from among antennas of a target mobile station is maximized. A Cholesky factorization may be used to determine an optimal beamforming vector with a low complexity.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: April 9, 2013
    Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Won Jae Shin, Young Jun Hong, Jung Hyun Park, Chang Yong Shin, Dong Jo Park
  • Patent number: 8243479
    Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: August 14, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Houfei Chen
  • Patent number: 8023293
    Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: September 20, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Houfei Chen
  • Patent number: 7902883
    Abstract: In one embodiment, a system includes a replica driver that includes n-type digital-to-analog converter (NDAC) current sources. The replica driver can produce a reference voltage based on current supplied by the NDAC current sources. The system includes driver fingers that are coupled to the replica driver and each include a driver bias circuit and an output driver. The driver bias circuit includes an operational amplifier (op-amp) that can adjust current-source gate voltage in the output driver to produce voltages at output nodes of the driver fingers that approximately match the reference voltage produced by the replica driver.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: March 8, 2011
    Assignee: Fujitsu Limited
    Inventor: Yasuo Hidaka
  • Patent number: 7633773
    Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: December 15, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Houfei Chen
  • Patent number: 6140858
    Abstract: The invention relates to a predistortion circuit for an analog signal in a video communication network. In one embodiment the circuit according to the invention includes a primary branch connecting an input to an output, a delay circuit for delaying a signal in the primary branch, a first coupler/shunting device which samples a fraction of the input signal, a secondary branch connected to the shunting output of the coupler/shunting device, the secondary branch including a second-harmonic generator, and a second coupler/shunting device which receives the output signal from the secondary branch and adds it to the signal at the output of the primary branch. The circuit according to the invention makes possible a symmetrical filter with improved performance characteristics and low manufacturing cost.
    Type: Grant
    Filed: November 18, 1997
    Date of Patent: October 31, 2000
    Assignee: U.S. Philips Corporation
    Inventor: Fran.cedilla.ois Dumont
  • Patent number: 5793127
    Abstract: An inductive load driver circuit with shared flyback protection includes a first transistor (209) which drives a first load (229), and a second transistor (231) drives a second load (251). A first clamp voltage steering diode (217) is coupled between an input terminal (207) of the first transistor (209) and a zener diode (203), and a second clamp voltage steering diode (239) coupled between an input terminal (233) of the second transistor (231) and the zener diode (203). A power supply terminal (201) is coupled to the zener diode (203).
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: August 11, 1998
    Assignee: Motorola Inc.
    Inventor: John R. Qualich
  • Patent number: 5793245
    Abstract: A switch mode regulator circuit is provided to facilitate the conversion from one voltage level to another in a substantially power lossless manner. The circuit is particularly advantageous in instances where the power supply can be operable in a discontinuous mode, as inductor-capacitor oscillatory transients ("ringing"), along with its associated voltage spikes at the associated output transistor source, can be avoided. Such transients and their associated voltages are avoided by clamping the gate-source voltage on the circuit's output NMOS transistor over the entire positive operation voltage range.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: August 11, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Andrew Marshall, Joseph A. Devore, Raymond T. Summerlin