Abstract: An inter-vehicle communication and driving assistance device performs wireless communication with other vehicles, and includes an inter-vehicle communication unit including a reception level detection unit, a position information reception unit, and an arithmetic processing unit. The arithmetic processing unit calculates inter-vehicle distances to other vehicles using latitude and longitude information of the other vehicles and the own vehicle, receives a position error radius, and acquires a reception level from the other vehicles. When a difference between the inter-vehicle distances is smaller than position error radius, a vehicle with a larger reception level is determined as a vehicle closer to the own vehicle. When the difference between the inter-vehicle distances is larger than the position error radius, a vehicle with a smaller inter-vehicle distance is determined as a vehicle closer to the own vehicle, and a distance to a leading vehicle is calculated.

Abstract: The present invention provides a circuit including a reference voltage generator and a plurality of receivers, wherein the reference voltage generator is configured to generate a reference voltage, and each of the receivers is configured to receive the reference voltage and a corresponding input signal to generate a corresponding output signal. In addition, for at least a specific receiver of the plurality of receivers, the specific receiver comprises at least one amplifying stage, the amplifying stage comprises a first input terminal configured to receive the corresponding input signal, a second input terminal configured to receive the reference voltage, a first output terminal configured to generate a first signal, and a second output terminal configured to generate a second signal; and the specific receiver further comprises a first feedback circuit coupled between the first output terminal and the second input terminal.

Abstract: A gain modulation circuit includes a load circuit, a differential circuit, a current source, a resistor, a first transistor, and a detector circuit. The load circuit is configured to receive a supply voltage. The differential circuit is coupled to the load circuit. The differential circuit and the load circuit are configured to generate a pair of output voltages according to a pair of input voltages and the supply voltage. The current source is coupled to the differential circuit. The resistor is coupled to the differential circuit and the current source. The first transistor is coupled to the differential circuit. The detector circuit is configured to generate a detection signal according to the pair of input voltages. A turned-on degree of the first transistor is adjusted based on the detection signal, to adjust a linear region of the gain modulation circuit.

Abstract: A first device (110) for distance measurement via wireless communication (130) uses a ranging protocol for determining a distance (140) to a second device (120) via a round trip time measurement, wherein first time data represents the round trip time and second time data represents a response time between receiving a request and sending a corresponding acknowledge. The second device receives the round trip time and determines the distance. The first device determines third time data by subtracting from the first time data a calculated travelling time of the messages between the first device and the second device based on the determined distance, and determines identifier data indicative of hardware and/or software present in the second device. The device then obtains, from a database based on the identifier data, a reference interval value, and verifies whether the determined distance is reliable by comparing the third time data to the reference interval value.

Abstract: A continuous time linear equalization (CTLE) circuit is disclosed. The CTLE circuit includes an input port, an output port, a first differential transistor pair coupled to the input port and the output port and a second differential transistor pair. The CTLE circuit further includes a first degenerative impedance circuit coupled between the first differential transistor pair and ground. The first degenerative impedance includes switchable components to vary impedance of the first degenerative impedance circuit. The CTLE circuit also includes a second degenerative impedance circuit coupled between the second differential transistor pair and ground. The second degenerative impedance includes switchable components to vary impedance of the second degenerative impedance circuit, wherein the resistive part of the impedance of the first degenerative impedance circuit is equal to the impedance of the second degenerative impedance circuit.

Abstract: An integrator circuit includes: an operational amplifier; a first capacitor coupled to an input of the operational amplifier; a second capacitor coupled in parallel to the first capacitor so that a first terminal of the first capacitor is configured to be electrically coupled to a first terminal of the second capacitor by a first switch; and a second switch configured to electrically couple the first terminal of the second capacitor to a second terminal of the first capacitor.

Abstract: A touch panel device includes a touch panel which is equipped with a plurality of electrostatic capacitive sensors of which the electrostatic capacitances vary as an object comes close to, or comes into contact with, the touch panel. A measurement unit measures the electrostatic capacitance of the electrostatic capacitive sensor, and a touch detection unit detects an object coming close to, or coming into contact with, the touch panel on the basis of a difference between a measured raw value and a base line value. A base line value update unit updates the base line value to follow the raw value of the electrostatic capacitance of the electrostatic capacitive sensor to correct a variance in electrostatic capacitance of the electrostatic capacitive sensor. A proximity detection unit detects an object approaching the touch panel, and an update control unit controls the update speed on the basis of a detection result of the proximity detection unit.

Abstract: A method for conversion attribution. The method includes obtaining a first identifier associated with a first device, obtaining a second identifier associated with a second device, bridging the first identifier and the second identifier based on a determination, made by a probabilistic classifier, that the first identifier and the second identifier are associated with a common user, and attributing, using the bridge, a conversion on a website accessed using the second device.

Abstract: A power amplifier circuit for broadband data communication over a path in a communication network can reduce or avoid gain compression, provide low distortion amplification performance, and can accommodate a wider input signal amplitude range. A dynamic variable bias current circuit can be coupled to a differential pair of transistors to provide a dynamic variable bias current thereto as a function of input signal amplitude. Bias current is increased when input signal amplitude exceeds a threshold voltage established by an offset or level-shifting circuit. The frequency response of the bias current circuit can track the full frequency content of the input signal, rather than its envelope. Gain degeneration can be modulated in concert with the bias current modulation to stabilize amplifier gain.

Abstract: Systems and methods for improving source-follower-based Sallen-Key architectures are disclosed. In particular, systems and methods for circumventing the non-idealities associated with source-follower-based Sallen-Key biquad filters when used in either baseband signal or radiofrequency paths. The systems and methods disclosed herein present power-efficient, cost-efficient solutions that can be implemented in a reduced area of a circuit.

Abstract: A dynamic amplification circuit includes a first drive circuit (310) generates a first driving voltage according to a first control signal and a first driving current; a second drive circuit (320) generates a first driving signal according to the first and a second driving voltage; a third drive circuit (330) generates a second control signal according to the first control signal and the first driving signal; and a dynamic amplifier DA (340) includes a first branch (101) including a first capacitor and a second branch (102) including a second capacitor which are connected by a first resistor (150) and a second resistor (160), an operation state of the DA (340) is controlled through the first and second control signals, a duration of the DA (340) in an amplification phase is proportional to a product of a resistance value of the first resistor and a capacitance value of the first capacitor.

Abstract: Various embodiments of the present technology may provide methods and apparatus for an amplifier integrated circuit. The amplifier integrated circuit may provide a low gain bandwidth product to amplify at a higher speed and a high gain bandwidth product to amplify at a lower speed. The amplifier integrated circuit may achieve the low and high gain bandwidth product by generating a first current and a second current through a plurality of sets of series-connected transistors and operating a plurality of switches.

Abstract: A comparator includes a first circuit including first, second, and third transistors, and a second circuit. One of the first transistor and the second transistor in the first circuit is an input transistor to which an input analog voltage is applied. The third transistor is configured to short-circuit a drain and a source of each of the first transistor and the second transistor during a period when the input analog voltage is applied.

Abstract: A transimpedance amplifier includes a variable gain circuit configured to generate a pair of complementary signals in accordance with an input signal and a reference signal. A first differential circuit of the variable gain circuit includes a first transistor including a control terminal to receive the input signal, a second transistor including a control terminal to receive the reference signal, and a variable resistance circuit including a first field effect transistor (FET) and a second FET. A first timing when a voltage of a first linearity adjustment signal input to the first FET reaches a first threshold voltage of the first FET and a second timing when a voltage of a second linearity adjustment signal input to the second FET reaches a second threshold voltage of the second FET are different from each other.

Abstract: An interface circuit includes an amplifier having a first input, a second input, and an output, a drive capacitor coupled to the first input of the amplifier, and a feedback path coupled between the output of the amplifier and the second input of the amplifier. The interface circuit also includes a current driver coupled to the first input of the amplifier and the second input of the amplifier, wherein the current driver is configured to drive the drive capacitor with a first current, and to drive a touch panel capacitor coupled to the second input of the amplifier with a second current.

Abstract: A display driver includes a digital-to-analog (D/A) converting circuit, an inverting amplifier circuit, and current compensating circuits. The D/A converting circuit converts display data into a gradation voltage. The inverting amplifier circuit includes an operational amplifier, a resistor provided between an input node to which the gradation voltage is input and an inverting input terminal of the operational amplifier, and a resistor provided between an output terminal of the operational amplifier and the inverting input terminal. The current compensating circuit causes a compensation current to flow from a first node of a first supply voltage to an input node. The current compensating circuit causes a compensation current to flow from the input node to a second node of a second supply voltage.

Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a variable gain amplifier (VGA) device that includes a low-gain tuning section and a high-gain tuning section. The low-gain tuning section includes both resistor and transistor elements. The high-gain tuning section includes a transistor element and is activated when an output gain is greater than a predetermined threshold level. There are other embodiments as well.

Abstract: A detection circuit (physical quantity detection circuit) includes a ?? modulator (A/D converter) that digitizes a detection signal corresponding to a physical quantity and outputs detection data, an arithmetic operating portion that includes at least one of adders and a multiplier, a main sequence counter (counter) that counts the number of clocks of a clock signal and initializes a count value periodically, and a control circuit (control portion) that causes the arithmetic operating portion to perform a plurality of arithmetic operation processes, having types different from each other, for generating arithmetic operation data according to a magnitude of the physical quantity on the basis of the detection data, in accordance with the count value.

Abstract: An example system includes input circuitry configured to obtain first data corresponding to first signals on a communication channel, with the first data having a first frequency that is less than a predefined frequency; and sampling circuitry configured to sample the first data to produce second data having a second frequency that is greater than or equal to the predefined frequency. The example system also includes switching circuitry configured to support AC-coupled data having a frequency that is greater than or equal to the predefined frequency, with the switching circuitry being configured to receive the second data and to forward the second data; and output circuitry to receive the second data and parametric data representing non-information signal content, to produce third data based on the second data, and to produce, based on the third data and the parametric data, second signals for output from the system.

Abstract: Described herein is a transceiver circuit for a capacitive micromachined ultrasonic transducer (CMUT), provided with: a transmitter stage, which generates excitation pulses for a first node of the CMUT transducer during a transmitting phase, a second node of the CMUT transducer being coupled to a biasing voltage; a receiver stage that is selectively coupled to the first node during a receiving phase and has an amplification stage; a switching stage that couples the receiver stage to the first node during the receiving phase and decouples the receiver stage from the first node during the transmitting phase. The amplification stage is provided with a charge amplifier that has an input terminal and is biased as a function of a biasing voltage; and the switching stage is coupled to the same biasing voltage thereby minimizing an injection of charge into the input terminal upon switching from the transmitting phase to the receiving phase.

Abstract: This disclosure provides a charging-steering amplifier circuit and the control method thereof. The charging-steering amplifier circuit includes a charging-steering differential amplifier and a sample and hold circuit. The charging-steering amplifier circuit operates in a reset phase or in an amplifying phase to amplify a differential input signal. The control method includes steps of: in the reset phase, obtaining a common mode voltage of the differential input signal according to the differential input signal; in the reset phase, providing the common mode voltage to one of the charging-steering differential amplifier and the sample and hold circuit; in the reset phase, sampling the differential input signal by the sample and hold circuit to generate a voltage signal; and in the amplifying phase, inputting the voltage signal to the charging-steering differential amplifier.

Abstract: A field-programmable analog array including an array of a plurality of programmable analog timing circuits, the field-programmable analog array being field-programmable to a plurality of analog or analog-to-digital conversion circuits, such as relaxation oscillators, phase shifters, phase interpolators, pulse width modulators, pseudo exponential digitally controlled oscillators, etc. through programming, without physical re-processing of circuit.

Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a variable gain amplifier (VGA) device that includes a low-gain tuning section and a high-gain tuning section. The low-gain tuning section includes both resistor and transistor elements. The high-gain tuning section includes a transistor element and is activated when an output gain is greater than a predetermined threshold level. There are other embodiments as well.

Abstract: A sample-and-hold circuit, which includes a hold capacitor at its output terminal and at least one intermediate capacitor, intermittently receives an input voltage, and a first value of a switch enable signal causes the sample-and-hold circuit to sample the input voltage and to charge the at least one intermediate capacitor and the hold capacitor to the input voltage, and when it is not receiving the input voltage, a second value of the switch enable signal causes the sample-and-hold circuit to hold, at its output terminal, the input voltage until the hold capacitor discharges, which starts to discharge only after the at least one intermediate capacitor has substantially discharged.

Abstract: Embodiments of the present invention may provide a method of measuring an unknown capacitance of a device. The method may comprise the steps of driving a test signal to a circuit system that includes a current divider formed by the device with unknown capacitance and a reference capacitor; mirroring a current developed in the reference capacitor to a second circuit system that includes a measurement impedance; measuring a voltage within the second circuit system; and deriving a capacitance of the unknown capacitance based on the measured voltage with reference to a capacitance of the reference capacitor and the measurement impedance.

Abstract: A transition enforcing coding (TEC) receiver includes a first delay line circuit, a transition detection circuit, and a data sampling circuit. The first delay line circuit delays a plurality of vector signals to generate a plurality of delayed vector signals, respectively. The transition detection circuit detects a transition of at least one specific delayed vector signal among the delayed vector signals. The data sampling circuit samples the vector signals according to a sampling timing determined based on an output of the transition detection circuit.

Abstract: Disclosed are a sensing circuit and a capacitive touch panel having the sensing circuit. The capacitive touch panel has a glass substrate, first lead wires, second lead wires, third lead wires, signal input channels and signal output channels; amounts of the second, third lead wires are N, and any two of the first, the second and the third lead wires are isolated; each signal input channel is coupled to the first lead wire corresponding thereto; each third lead wire signal output channel of the signal output channels is coupled to the N/2 third lead wires, and an amount of the second lead wire signal output channels is N/2, and each second lead wire signal output channel of the signal output channels is coupled to two second lead wires. The amount of the IC channels is decreased to save the touch panel material cost with the present invention.

Abstract: Described is an apparatus which comprises: a power delivery distribution network (PDN) to provide a power supply to at least one circuit; and an on-die synchronous power supply noise injector to inject noise to the power supply on the PDN. Described is another apparatus which comprises: a PDN to provide power supply to various circuits; an on-die power supply noise (PSN) sampler to sample the power supply with an injected noise, wherein the PSN sampler to sample the power supply with at least two different clock signals; and a phase noise accumulator to randomize the periods of the at least two different clock signals.

Abstract: In one embodiment, a current detection circuit configured for a switching regulator can include: (i) a feedback controlling circuit configured to control a feedback signal to be consistent with a reference signal, and to generate a feedback control signal; and (ii) a feedback signal generator configured to receive a rise time and a fall time of inductor current of the switching regulator, and to generate the feedback signal in direct proportion with the feedback control signal.

Abstract: A method of forming an integrated circuit includes forming at least one transistor over a substrate. Forming the at least one transistor includes forming a gate dielectric structure over a substrate. A work-function metallic layer is formed over the gate dielectric structure. A conductive layer is formed over the work-function metallic layer. A source/drain (S/D) region is formed adjacent to each sidewall of the gate dielectric structure. At least one electrical fuse is formed over the substrate. Forming the at least one electrical fuse includes forming a first semiconductor layer over the substrate. A first silicide layer is formed on the first semiconductor layer.

Abstract: A baseline restore circuit includes a current input for receiving a current pulse having a DC current baseline; a charge amplifier having an input coupled to the current input, and an output referenced to a DC voltage baseline; a feedback baseline restore circuit comprised of a switched capacitor integration circuit having an input coupled to the output of the charge amplifier, and an output coupled to the current input; and a sample control circuit controlling the switched capacitor circuit input to the integrator so that only the reference voltage baseline is sampled. The inputs to the sample control circuit are a window comparator, and a high rate pulse detector, both with inputs from the charge amplifier output.

Abstract: A method and an apparatus relating to an amplifier (e.g., an operational transconductance amplifier or OTA) are provided. The OTA includes a first node and a second node. The OTA further includes a differential transistor pair for receiving an input. The differential transistor pair is coupled to the first node and the second node. The OTA includes a pair of output nodes for outputting a response to the input. The response at the pair of output nodes includes a first frequency pole. A capacitive element is coupled between the first node and the second node. The response includes a second frequency pole based on the capacitive element. The second frequency pole is at a greater frequency than the first frequency pole.

Abstract: To provide a photoelectric conversion device with low power consumption and a method for operating the photoelectric conversion device. The photoelectric conversion device includes a charge storage capacitor portion, a photodiode, and a plurality of transistors. The charge storage capacitor portion is charged after being reset. Then, the charge storage capacitor portion is discharged through the photodiode or a current mirror circuit connected to the photodiode for a given period of time, and after that, the potential of the charge storage capacitor portion is read. Since power is consumed only at the time of charging, power consumption can be reduced.

Abstract: A circuit includes a PMOS transistor pair receiving a first voltage at a first circuit node and a second voltage at a second circuit node and outputting a third voltage at a third circuit node and a fourth voltage at a fourth circuit node; and an NMOS transistor pair receiving the third voltage at the third circuit node and the fourth voltage at the fourth circuit node and outputting the first voltage at the first circuit node and the second voltage at the second circuit node.

Abstract: The invention provides a temperature detecting apparatus, a switch capacitor apparatus and a voltage integrating circuit. The voltage integrating circuit includes an operating amplifier, a capacitor and a current source. The operating amplifier has a positive input end, a negative input end and an output end. The output end of the operating amplifier generates an output voltage, and the positive input end receives a reference voltage. The capacitor is coupled between the output end and the negative input end of the operating amplifier. The current source is coupled to the output end of the operating amplifier. The current source draws a replica current from the capacitor, and a current level of the replica current is determined according to a current level of a current flowing to the negative input end of the operating amplifier.

Abstract: System and method for integrating an input signal to generate an output signal. The system includes a first integrator configured to receive the input signal and generate an integrated signal based on at least information associated with the input signal, a second integrator configured to receive the integrated signal and generate the output signal based on at least information associated with the integrated signal, and a compensation capacitor coupled to the first integrator and the second integrator. The first integrator includes a first integration capacitor and a first operational amplifier including a first input terminal and a first output terminal, the first integration capacitor being coupled between the first input terminal and the first output terminal. The second integrator includes a second integration capacitor and a second operational amplifier including a second input terminal and a second output terminal.

Abstract: An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator.

Abstract: An electrical signal is processed by digitizing the electrical signal to produce a stream of digitized data in the time domain, wherein the stream has an original frequency spectrum, transmitting the stream to N signal paths (N>1), and down-converting and filtering the stream in each of the N signal paths to produce N streams of digitized data in the time domain, wherein the N streams have N frequency spectra, respectively, and the N frequency spectra cover N different portions of the original frequency spectrum, respectively.

Abstract: A coupling apparatus having a first branch and a second branch is disclosed. The first branch generally comprises (A) a first switch group configured to connect an input signal to an output node through a first capacitor, and (B) second switch group configured to connect either (i) a second signal, or (ii) a ground voltage, to the output node through a second capacitor. The second branch generally comprises (A) a third switch group configured to connect the input signal to the output node through a third capacitor, and (B) a fourth switch group configured to connect either (i) the second signal, or (ii) the ground voltage, to the output node through a fourth capacitor.

Abstract: A communication circuit facilitating communication between a first equipment and a second equipment including a conversion circuit, an input port, an output port, and a communication port is disclosed. The conversion circuit converts an input signal to a first intermediate signal, and converts a second intermediate signal to an output signal. The input port inputs the input signal to the first conversion circuit. The output port outputs the output signal to the control unit. The communication port inputs the second intermediate signal to the conversion circuit, and outputs the first intermediate signal to the second equipment. A voltage of the first intermediate signal is determined based on a voltage of a power source if the first intermediate signal is logic high, and a voltage of the second intermediate signal is determined based on the voltage of the power source if the second intermediate signal is logic high.

Abstract: A zero-crossing detector with effective offset cancellation includes a set of series connected capacitors and an amplifier having an input terminal. An offset capacitor is operatively connected between the amplifier and the set of series connected capacitors. A switch is operatively connected to the input terminal, and an offset sampling capacitor is operatively connected to the switch. The switch connects the offset sampling capacitor to the input terminal of the amplifier during a charge transfer phase.

Abstract: Systems and methods are disclosed to integrate signals. Some embodiments include an integrator comprising an active input; a passive input; a first integrator having a first integrator input and a first integrator output; a second integrator having a second integrator input and a second integrator output; a first plurality of switches coupled with the first integrator input, the second integrator input, the active input, and the passive input; a second plurality of switches coupled with the first integrator output and the second integrator output; and a controller. The controller may be configured to control the operation of the first plurality of switches to switch the active input between the first integrator input and the second integrator input, and control the operation of the first plurality of switches to switch the passive input between the first integrator input and the second integrator input.

Abstract: Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.

Abstract: Embodiments of the present invention may include an apparatus and method to reduce an output swing in each stage of a multi-stage loop filter while also maintaining a desired signal transfer function for each respective stage. A given stage of the loop filter may include an integrator, a feedback path, a first cancellation path, and a second cancellation path. The first cancellation path may be coupled to the output of the integrator. The second cancellation path may be coupled to a feedback path provided about the input and output of the integrator. A first cancellation signal may be injected into the first cancellation path to reduce the output swing of the integrator. A second cancellation signal may be injected into the second cancellation path to minimize a change in the integrator's signal transfer function caused by the first cancellation signal.

Abstract: A switched capacitor integrator circuit is disclosed. The switched capacitor integrator circuit comprises an inverting switched capacitor integrator circuit, and a non-inverting switched capacitor integrator circuit connected to the inverting switched capacitor integrator circuit. A sampling capacitor of the inverting switched capacitor integrator circuit is shared by the non-inverting switched capacitor integrator circuit.

Abstract: An integral value measuring circuit includes an operational amplifier and a capacitor connected between input and output sides thereof, an electric potential of an output terminal where a predetermined resistance element connected to an output side of the operational amplifier is being zero, positive and negative DC voltage generating circuits which comprise positive and negative power sources, respectively, at the output side of the operational amplifier, the positive and negative DC voltage generating circuits and being connected to positive and negative power terminals, respectively, of the operational amplifier through switches, and a connection line between the negative power terminal and one switch and a connection line between the positive power terminal and another switch being connected to the positive and negative power terminals, respectively, of the operational amplifier through cross resistance elements having resistance values negligible compared to a leakage resistance value of the switches.

Abstract: An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator.

Abstract: Embodiments of a capacitance sensing system including an integrating amplifier and methods for operating the same to provide a higher slew rate and bandwidth are described. In one embodiment, the integrating amplifier comprises an input stage including an inverting input coupled to an electrode of a capacitor to sense a capacitance and a non-inverting input coupled to a reference potential, and an output stage including a compensating capacitor coupled to an output. The compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor.

Abstract: An integrator (100) comprises an amplification and phase shifting element (170) with a feedback path (130) forming a loop and comprising a capacitive element (140). An input signal is summed into the loop, and the loop is arranged to oscillate at an oscillation frequency higher than the frequencies of interest in the input signal. The loop includes a filter (160) for attenuating the oscillation signal to ensure that the amplification and phase shifting element (170) can provide amplification for the input signal. The input signal is integrated and the integrated signal perturbs the zero crossings of the oscillation signal.

Abstract: An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator.