Abstract: A wireless communication system includes a) a first device having a transmitter part with a Tx-antenna for transmitting an electrical signal having a signal bandwidth BWsig and b) a second device having a receiver part with an Rx-antenna for receiving the transmitted electromagnetic signal. At least one of the Tx- and Rx- antennas is a narrowband antenna having an antenna bandwidth BWant, wherein the Tx- and/or Rx-antenna bandwidths fulfil the relation BWant=k·BWsig. The system is adapted to provide that k is smaller than 1.25, and the antenna bandwidth BWant is defined as the ?3dB bandwidth of the loaded antenna when it is connected to the communication system, and the signal bandwidth BWsig is defined as the bandwidth within which 99% of the desired signal power is located.

Abstract: In one aspect, reduced power consumption and/or circuit area of a discrete time analog signal processing module is achieved in an approach that makes use of entirely, or largely, passive charge sharing circuitry, which may include configurable (e.g., after fabrication, at runtime) multiplicative scaling stages that do not require active devices in the signal path. In some examples, multiplicative coefficients are represented digitally, and are transformed to configure the reconfigurable circuitry to achieve a linear relationship between a desired coefficient and a degree of charge transfer. In some examples, multiple successive charge sharing phases are used to achieve a desired multiplicative effect that provides a large dynamic range of coefficients without requiring a commensurate range of sizes of capacitive elements. The scaling circuits can be combined to form configurable time domain or frequency domain filters.

Abstract: The device is used for decoding convolution-encoded reception symbols. In this context, transmission data are modulated with a modulation scheme to form symbols, which are encoded with a transmission filter to form convolution-encoded transmission symbols. A convolution-encoded transmission symbol contains components of several symbols arranged in time succession. These transmission symbols are transmitted via a transmission channel and received as reception symbols. The Viterbi decoder decodes the reception symbols by use of a modified Viterbi algorithm. Before running through the Viterbi decoder, the reception symbols are processed by a state-reduction device, which determines additional items of information relating to possible consequential states of the decoding independently of the decoding through the Viterbi decoder in every state of the decoding. The state-reduction device uses the additional items of information to restrict the decoding through the Viterbi decoder to given consequential states.

Abstract: An apparatus for removing harmonic noise from a power transmission line transmitting electricity at a primary frequency includes a filter and a controller coupled to the sensor and to an actuator-generator. The filter separates electricity at a harmonic of a primary frequency from the electrical signal transmitted by the power transmission line. The controller is configured to modulate consumption of electricity from the power transmission line. The consumption is controlled by electrical actuation of the actuator-generator, such that the electrical actuation of the actuator-generator causes consumption of electricity from the power transmission line at a harmonic of the primary frequency. The actuator-generator is coupled to an elastically deformable component, such that electrical actuation of the actuator-generator generates tension in the elastically deformable component.

Abstract: A power factor correction device, and a controller and a total harmonic distortion (THD) attenuator used by same. The power factor correction device comprises a converter and a controller (320) connected to the converter to obtain an input voltage. The controller (320) comprises a THD attenuator (407) for automatic THD optimization. The converter comprises an input current detection resistor (3R8), a power switch tube (3NMOS) and an output circuit. The input current detection resistor (3R8), the power switch tube (3NMOS) and the output circuit form a feedback control loop to maintain a constant output voltage. A THD optimization function is built in the device so that the entire device is capable of being accurately offset to a designed voltage so as to be used for THD optimization, thereby dispensing with external manual adjustment and overcoming internal technical deviations while achieving high consistency.

Abstract: A communication device according to an embodiment of the present invention includes a communication antenna that receives a transmission signal where a spectrum spread signal subjected to a spectrum spread is modulated; an intermediate frequency converting unit that converts the transmission signal received by the communication antenna into an intermediate frequency signal having a predetermined frequency; an analog to digital converting unit that discretizes the intermediate frequency signal and outputs a discretization signal; a noise removing unit that detects a noise other than a normal thermal noise included in the discretization signal and removes the detected noise from the discretization signal; and a demodulating unit that demodulates the spectrum spread signal, based on the discretization signal that is output from the noise removing unit.

Abstract: A circuit and method for debouncing an electrical signal are disclosed. A representative embodiment of the present invention may be set to remove (i.e., filter) noise or glitches in the low and high portions of an input signal, where the width of the noise or glitches while in the high or low state may be set using a programming interface. The filtering is done in a manner that results in a clean, debounced output signal having a low portion approximately equal to the low portion of the input signal, and a high portion approximately equal to the high portion of the input signal. Noise or glitches of less than programmable high or low glitch widths are filtered from the input signal and do not appear in the output signal.

Abstract: The following embodiments relate to an analog filter having an adjustable transfer function for use in a system or circuit that processes a signal having a changing data rate. The transfer function may be adjusted by adjusting the resistance and/or capacitance of components of the analog filter. The analog filter is calibrated based on an optimum operational parameter at a certain data rate, such as a median data rate. The analog filter may be further adjusted as the data rate of the signal changes.

Abstract: A circuit includes a passive element having an impedance. An active circuit can be configured to receive an impedance signal associated with the impedance. The impedance includes a real portion and an imaginary portion. The active circuit removes at least a portion of the real portion of the impedance signal. The circuit can be utilized in a wide array of applications including radio applications.

Abstract: A low pass filter circuit includes an amplifier having a single-ended output. A first line and a second line are arranged to receive a differential signal. A first switch selectively connects the first line to a first input of the amplifier in a first cycle of operation having a first observation window. A second switch selectively connects the second line to a second input of the amplifier in a second cycle of operation having a second observation window that is at least partially coincident with the first observation window. A signal measuring stage that is supplied with a modulated input signal generates the differential signal. The signal measuring state has an input switch to reverse a polarity of the differential signal applied to the first and second lines of the low pass filter circuit.

Abstract: In one embodiment, a method for signal processing is provided that uses an improved inversion to mitigate the imprecision introduced by fast approximate methods for division. An input signal is received and processed to generate a matrix M. The matrix M is inverted to generate an inverted matrix M?1. Matrix M is inverted by (i) decomposing the matrix M into a plurality of first sub-matrices, (ii) generating, based on the first sub-matrices and without any division operations, numerators for a plurality of second sub-matrices of the inverted matrix M?1, (iii) generating, based on the first sub-matrices and without any division operations, denominators for the second sub-matrices, and (iv) generating the second sub-matrices based on the numerators and denominators. The inverted matrix M?1 is processed to generate an output signal. Accordingly, a reduction in noise level from inaccuracy in division is achieved, and computational complexity is reduced.

Abstract: For an input signal with a ringing superposed thereon, a ringing-generating filter (12) generates an analogous ringing waveform from only a peak portion of the signal which precedes the ringing. A subtractor (11) subtracts the analogous ringing waveform from the input signal to eliminate the ringing. The coefficient of the filter (12) is determined by applying a calculation method similar to a polynomial division based on the complete pivoting Gaussian elimination to polynomials using a reference data expressing a peak waveform and a ringing waveform, and by using a least squares method for minimizing the square of the covariance so as to allow the presence of noise in the data. Furthermore, by a repetitive process on a plurality of the same datasets, the calculation accuracy of the coefficient is improved even under the condition that the ringing frequency is high and the number of samples in one cycle is small. Thus, the ringing can be correctly eliminated even if the signal frequency is high.

Abstract: An apparatus comprising a first circuit, a second circuit, and a third circuit. The first circuit may be configured to generate a first control voltage and a second control voltage. The second circuit may be configured to generate a bias signal in response to the first control voltage and the second control voltage. The third circuit may be configured to generate a filtered signal in response to the bias signal. The filtered signal may be added to the first control voltage and the second control voltage to provide AC noise suppression when generating the bias signal.

Abstract: A filter system capable of automatically adjusting bandwidth includes a filter and an adaptive unit. The filter is used for filtering a digital signal to generate an output signal to an application unit. The adaptive unit is used for generating an adjustment signal to the filter according to the digital signal and the output signal. The filter dynamically adjusts bandwidth of the filter according to the adjustment signal.

Abstract: A reception apparatus including: a detection unit detecting extrinsic information based on a tentative symbol decision signal, a channel estimation signal, a noise variance estimation signal, and a received signal that are obtained from a previous iteration process; a Cyclic Redundancy Check (CRC) aided channel decoding unit outputting an interleaved bit or a posteriori information thereof based on the extrinsic information; a tentative symbol decision unit determining a tentative transmission symbol based on an output of the CRC aided channel decoding unit; a channel estimation unit estimating a channel based on an output of the tentative symbol decision unit; and a noise variance estimation unit estimating a noise variance based on the output of the tentative symbol decision unit and an output of the channel estimation unit is provided.

Abstract: A filtering circuit includes a clock selection unit configured to transfer a first clock or a second clock having a frequency lower than the first clock as an operating clock in response to a frequence signal, and a filter configured to filter an input signal and generate a filtered signal in synchronization with the operating clock.

Abstract: In accordance with an embodiment, a noise reduction circuit includes one or more phase sampling circuits that receive an electromagnetic signal and splits the signal into an illuminated component and an ambient component. The illuminated component is transmitted along an illuminated signal path and converted to a digital signal and the ambient component is transmitted along an ambient signal path and converted to a digital signal. The digitized ambient component is subtracted from the digitized illuminated component to generate a light signal with a reduced noise component.

Abstract: Structures and methods are provided for reducing or eliminating crosstalk in devices. Based on a predetermined compensation schemes, a compensation scheme is selected that minimizes the deviation of the non-aggressed victim signal caused by one or more aggressor signals. Instances of a compensation circuit corresponding to the selected compensation scheme are placed along a victim signal line at locations defined by the compensation scheme.

Abstract: A filter circuit includes a plurality of shifting units configured to each store an initial value, receive at least one input signal, and shift the stored value to a next shifting unit in sequence from among the shifting units in response to at least one input signal, and an initial value setting unit configured to set the initial stored values of the shifting units to different sets of initial stored values in response to different filter setting signals, respectively, wherein the different filter setting signals represent respectively different criteria for filtering the at least one input signal, wherein the initially stored values have a first logic value or a second logic value, wherein the filter circuit is configured to activate an output signal when the first logic value is shifted to a selected shifting unit among the plurality of shifting units.

Abstract: The present invention provides a channel estimation apparatus in which channel estimation may be made higher than heretofore in accuracy and may be used for calculating the weight for an equalization filter to achieve an optimum equalizing performance. A subcarrier copying unit 20 copies K items of end-side subcarriers, using the channel estimation obtained by a correlation processing unit 14 and K which is a subcarrier copy number. An IDFT unit 15 transforms the channel estimation obtained at the subcarrier copying unit 20 into the time domain channel response. A noise path removing unit 16 removes noise paths from the channel response output from the IDFT unit 15. A DFT unit 17 performs DFT of the channel response, from which the noise paths are removed by the noise path removing unit 16, to output a noise-suppressed frequency domain channel estimation value. A weight calculation unit 5 inputs the frequency domain channel estimation value output from the DFT unit 17 to calculate an equalizing weight.

Abstract: A filter device includes a filter that separates a steady component and a non-steady component included in an input signal, a synthesis unit that synthesizes the separated steady component and the separated non-steady component according to a given ratio, and an evaluation unit that evaluates the magnitude of the amount of the non-steady component in the input signal, wherein the synthesis unit sets the given ratio to a first ratio in an instance in which the evaluation unit determines the amount of the non-steady component to be equal to or less than a predetermined reference, and sets the given ratio to a second ratio, in which the proportion of the non-steady component is less than that of the first ratio, in an instance in which the evaluation unit determines the amount of the non-steady component to be greater than the predetermined reference.

Abstract: Various schemes for reducing effects of interference within communication systems are disclosed. A transmitter transmits a signal in a first time interval and a scrambled version of the signal in a second time interval, which does not overlap with the first time interval. A receiver receives a composite signal including a signal transmitted from the desired transmitter as well as signals from interferers in the first or the second time interval. The receiver determines a dominant interferer and obtains knowledge of signal scrambling done by the interferer as well as the desired transmitter by sensing an identification associated with the interferer or the desired transmitter. This knowledge is employed to determine coefficients for combining the received composite signals received in the first and the second time interval in order to recover the desired signal in a manner that maximizes the SNR associated with the desired signal or completely cancels the dominant interference.

Abstract: Device for electromagnetic noise reduction in a hybrid automotive vehicle (12) comprising: at least one sensor (44A, 44B) for measurement of the conducted noise (BC,A, BC,B) generated by at least one noise source (18, 20); a reduction unit (33) for a radiated noise (Bim,A, Bim,B), referred to as modified, on a signal of interest (S2) made noisy by the modified radiated noise (Bim,A, Bim,B), where the reduction unit (33) includes means for determination of the noise corrected signal of interest from the noisy signal of interest (S2), where the means of determination include means for estimation of the modified radiated noise (Bim,A, Bim,B) from the conducted noise (BC,A, BC,B).

Abstract: A filter provides high-pass coupling between circuits. The filter includes charge storage elements and switch elements coupling the charge storage elements. A controller is coupled to the switch elements for sequencing configurations of the switch elements in phases for each of a succession of sample periods to perform a time sampled continuous value signal processing of the input signal to form the processed signal. The sequenced configurations include a configuration in which a charge representing a value of the input signal is stored on a multiple of the charge storage elements, a configuration in which charge storage elements are coupled with the switch elements, and a set of one or more configurations that implement a scaling of a charge on one of the charge storage elements to be on one or more of the charge storage elements.

Abstract: A SAR ADC includes a DAC including a first set of capacitors each having a first end connected to a common node, and a second end, and a first set of switches each connecting the second end of a respective one of the capacitors to a first reference voltage. The SAR ADC further includes a second set of capacitors each having a first end connected to the common node and a second end that receives an input to be converted when the common node is connected to ground. The SAR ADC further includes a second set of switches that selectively connect the second end of a first capacitor of the second set of capacitors to ground when the input is disconnected from the second ends of the second set of capacitors and when the common node is disconnected from ground during a first of a plurality of successive approximations.

Abstract: A high frequency circuit device includes: two transmission lines having ends which are opposed to each other and are spaced from each other; a capacitor that is mounted on the end of one of the two transmission lines and has a lower face electrode acting as a mount face and an upper face electrode positioned higher than the lower face electrode; a resistor element that is provided on a region between the ends of the two transmission lines and connects the ends of the two transmission lines; and a connection conductor electrically connecting the upper face electrode of the capacitor and the other of the two transmission lines.

Abstract: A noise suppression circuit for a power adapter is disclosed. The noise suppression circuit can reduce or eliminate adapter-induced noise that could interfere with an electronic device powered by the adapter. In one example, the noise suppression circuit can include an active circuit to detect and attenuate or cancel the induced noise. In another example, the noise suppression circuit can include an RLC circuit in parallel with the adapter choke to suppress the induced noise at the operating frequencies of the powered electronic device. In still another example, the noise suppression circuit can include a modified adapter Y capacitor connection so as to bypass the adapter choke, thereby reducing or eliminating the choke's induced noise.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract: A wireless receiver including receiving antennas, frequency-space transformers, noise wave removers, a back-end signal processor, a pattern detector, a broadcast interruption detector, and a back-end controller. The frequency-space transformers convert signals received by the antennas into frequency-space signals. The noise wave removers each at least perform the calculation of a transmission line coefficient matrix and the calculation of an inter-antenna covariance matrix on the frequency-space signals. A controller controls the back-end signal processor to operate when the multicarrier transmission waves have been detected to be interrupted. The noise wave removers each perform the calculation of the inter-antenna covariance matrix when a broadcast interruption detector has detected the interruption of the multicarrier airwaves. Thus, the wireless receiver removes noise generated within it, thereby having high reception sensitivity.

Abstract: Disclosed herein is a device that includes an input receiver circuit activated by a strobe signal to generate an output signal by comparing a potential of an input signal with a reference potential, and a noise canceller cancelling noise superimposed on the reference potential due to a change in the strobe signal.

Abstract: A reception apparatus including: a detection unit detecting extrinsic information based on an output of a tentative symbol decision unit, an output of a channel estimation unit, and an output of a noise variance estimation unit that are obtained from a previous iteration process; a Cyclic Redundancy Check (CRC) aided channel decoding unit outputting an encoded and interleaved bit, or a posteriori information thereof based on the extrinsic information; the tentative symbol decision unit determining a tentative transmission symbol based on an output of the CRC aided channel decoding unit; the channel estimation unit estimating a channel based on an output of the tentative symbol decision unit or a pilot symbol; and the noise variance estimation unit estimating a noise variance or an initial noise variance based on the output of the tentative symbol decision unit and the output of the channel estimation unit is provided.

Abstract: Polyphase nonlinear digital predistorters (pNDPs) mitigate nonlinear distortions generated by time-interleaved digital-to-analog converters (TIDACs). Processors in an example pNDP compute nonlinear and linear compensation terms representative of channel mismatches and other imperfections in the TIDAC based on the digital input to the TIDAC. The pNDP subtracts these compensation terms from a delayed copy of the digital input to yield a predistorted digital input. The TIDAC converts on the predistorted digital input into a fullband analog output that is substantially free of nonlinear distortion.

Abstract: An active RC resonator includes a first operational amplifier having first and second inputs and first and second outputs, a second operational amplifier having first and second inputs and first and second outputs, a first resistor coupled between the first input of the first operational amplifier and the second output of the second operational amplifier, a second resistor coupled between the second input of the first operational amplifier and the first output of the second operational amplifier, a third resistor coupled between the first output of the first operational amplifier and the first input of the second input of the second operational amplifier, a fourth resistor coupled between the second output of the first operational amplifier and the second input of the second operational amplifier, and at least one of 1) a first capacitor coupled between the first input of the first operational amplifier and the first output of the second operational amplifier, and a second capacitor coupled between the second

Abstract: An adaptive filter implemented in a communication system transmitter or receiver has a real time clock associated therewith, and one or more coefficients of the adaptive filter are determined based at least in part on an output of the real time clock. For example, the adaptive filter may comprise a coefficient update engine and a memory for storing a plurality of sets of adaptive filter coefficients in association with respective time indicators derived from the output of the real time clock, with the coefficient update engine being configured to determine a particular one of the sets of filter coefficients for use by the adaptive filter based at least in part on one or more of the time indicators. The time indicators may comprise respective time stamps generated based on the output of the real time clock at respective times at which the corresponding sets of coefficients are determined.

Abstract: An output circuit of a semiconductor apparatus having two different types of decoupling capacitors is presented. The output circuit includes a first pad, a second pad, a main output unit and a decoupling capacitor region. The first and second pads are configured to respectively provide a power supply voltage and a ground voltage. The main output unit is coupled to the first and second pads. One end of the decoupling capacitor region is coupled to the first pad and the other end is coupled to the second pad. The decoupling capacitor region includes a first decoupling capacitor region spaced apart from a portion of the main output unit by a first distance, and a second decoupling capacitor region spaced apart from the main output unit by a second distance which is greater than the first distance.

Abstract: A spectral transform system includes a first path having a signal input, a signal output, and an adjustable first path signal scaling block. A second path is connected to the forward path between the signal input and the signal output. The second path has an adjustable delay element and an adjustable second path signal scaling block. A detector is connected to the signal output for detecting properties of an output signal. A controller is connected to adjust the delay element, the second path signal scaling block, and the first path signal scaling block based on the properties detected by the detector to achieve a desired output signal.

Abstract: A protection relay device includes: an analog-to-digital converter that samples an analog signal inputted from an analog input unit and converts the analog signal into digital data; a variable filter that filters and outputs the digital data, the variable filter having a filter coefficient that is varied by external control; and an adaptive controller that variably controls the filter coefficient of the variable filter so that a difference between the digital data filtered by the variable filter and a target signal decreases.

Abstract: A filter circuit includes two parallel digital filters, a DAC, and an LPF. The DAC includes two parallel decoders, a parallel-to-serial converter, a switch driver, and a switch. A PLL circuit supplies a reference clock to the DAC. A frequency divider provided in the DAC divides the frequency of the reference clock by two, and supplies the half frequency clock to a parallel processing section (the two decoders and the parallel-to-serial converter) of the DAC and the two digital filters. This makes it easy to secure a timing margin, permitting use in high-speed communication on the order of several GHz.

Abstract: An apparatus comprising an analog filter, an analog to digital converter coupled to said analog filter; and a digital filter coupled to said analog to digital converter; wherein the apparatus is configured such that distortion introduced into a filtered signal by said analog filter is substantially compensated by said digital filter.

Abstract: A noise cancellation apparatus for an electrostatic capacity type touch panel includes a first grounding unit that provide an internal ground and a second grounding unit that provides an external ground. If the noise detected in the touch panel exceeds a reference value, the first grounding unit is connected to the second grounding unit. The second grounding unit is connected to a metallic component of a case of a terminal device housing the electrostatic capacity type touch panel and provides an external ground through a contact with user of the terminal device.

Abstract: Noise reduction circuit includes first and second reset signal generation circuits generating first and second reset signals activated when a data input signal goes to a low level or a high level and are deactivated in synchronization with a clock signal when a high or low level is maintained, and first and second counter circuits that count an inverted signal of clock signal and are reset by the first or second reset signal. The noise reduction circuit further includes a data output circuit including a selector circuit and an output flip-flop circuit that outputs a signal selected by the selector circuit in synchronization with the clock. The selector circuit selects and outputs any of: signal fixed at a high level or low level, and output signal of the output flip-flop circuit, according to logic levels of output signals of the first and second counter circuit.

Abstract: An electronic component includes a driver that outputs a signal to a reception apparatus; a storage device storing therein reflection information related to a reflected wave that returns to the driver when the signal is reflected back by the reception apparatus; a reflected wave detector that based on the reflection information, determines a measurement period for measuring the reflected wave and that based on the measurement period, measures an arrival time and a peak amplitude of the reflected wave; and a controller that based on the arrival time and the peak amplitude, extracts reflected-wave cancelling information for inhibiting effects of the reflected wave from the reception apparatus and that sets the extracted reflected-wave cancelling information in the driver.

Abstract: A differential transmission circuit comprises a sending unit that generates a pair of differential signals from an input signal, and sends the differential signals; a receiver that receives the differential signals sent by the sending unit; and a transmission path that transmits the differential signals from the sending unit to the receiver, wherein the sending unit has a selector that selects one of the input signal and a signal obtained by inverting a polarity of the input signal, and generates the differential signals from the signal selected by the selector.

Abstract: A relaxation oscillator for generating a first and a second oscillation signals, comprising: a reference-voltage providing circuit for providing a high and a low reference voltages; switches for directing the high and low reference voltages to inputs of a transconductance amplifier and a non-inverting input of a comparator; the transconductance amplifier for generating an output current with a value determined by its transconductance value, controlled by an input tuning voltage, and multiplied by its inputs' voltage difference; a capacitor connecting between the transconductance amplifier output and ground; and the comparator for generating a first and a second digital signals; wherein the first and second digital signals are digital control signals to the switches, and the first and second oscillation signal of the relaxation oscillator respectively; wherein the oscillation frequency of the relaxation oscillator is independent of the reference voltages, achieving accurate frequency turning, and simplifying t

Abstract: A controller and a circuit work together to enable a selective and dynamic adjustment to correct phase and gain imbalances in quadrature signal paths of a receiver. Under select conditions, it has been determined that statistical estimates of gain and phase imbalance can be applied to adjust signals in the quadrature signal paths of a receiver. The controller validates the select conditions before updating the estimate of the gain imbalance and the estimate of the phase imbalance. The controller directs a compensator under select operating conditions such that validated dynamic estimates of the gain and phase imbalance or calibration data is applied to the quadrature signal paths. The controller disables the compensator and enables an estimator and a calculator when estimates are unavailable for the present operating conditions.

Abstract: A method for the generation of a signal including a minimum of disturbances and noise is provided. A method for the detection of a signal including a minimum of disturbances and noise is also provided. An element of the signal is functionally dependent on at least one further element of the signal.

Abstract: An exemplary embodiment of a transmitter of the invention is provided. The transmitter includes a shaping means and a digital-to-analog converter (DAC). The shaping means digitally shapes a digital signal. The DAC is arranged to convert the shaped digital signal into an analog signal. The shaping means is arranged to decrease energy at an edge of an in-band portion of a frequency spectrum of the digital signal so as to lower a spectral re-growth of the analog signal happened after the DAC.

Abstract: In a mixer circuit that solves the problem of the extreme increase in circuit complexity that accompanies compensating for amplitude errors and phase errors, a voltage current conversion unit (11) converts an RF signal, which is a voltage signal, to a current signal and supplies the current signal. An RF path selection unit (12) connects its input terminal to any of its output terminals in accordance with the state of a four-phase clock signal and separately supplies, from its output terminals, a plurality of IF signals obtained by multiplying the RF signal by clock signals in the four-phase clock signal. An IF path selection unit (13) switches the connection relationship between its input terminals and its output terminals in accordance with a selection signal (S) and supplies the IF signal input to each of its input terminals from its output terminals that are connected to the input terminals.

Abstract: A method for reducing noise in an output of a voltage regulator at frequencies above a closed loop bandwidth, by providing a noise injection path for injecting external noise into the voltage regulator, where the noise injection path becomes active at the frequencies above the closed loop bandwidth, where the noise injection path reduces the noise in the output of the voltage regulator.

Abstract: An adaptive filter includes: a filter configured to perform a filtering process for an input signal with a filter coefficient set therein, and output the processed input signal as an output signal; a calculating unit configured to calculate a value indicative of an error between an amplitude of the output signal and a reference amplitude; an output unit configured to output a first constant as a parameter when the amplitude of the output signal is greater than the predetermined amplitude, the parameter used when updating the filter coefficient, and output a second constant as the parameter when the amplitude of the output signal is smaller than the predetermined amplitude; and an updating unit configured to update the filter coefficient with an update amount corresponding to the parameter and the value indicative of the error, such that the error is reduced.