Abstract: Provided are an analog digital converting device and a reference voltage controlling method thereof. The analog digital converting device includes: a first reference voltage generating circuit generating a first reference voltage; a second reference voltage generating circuit generating a second reference voltage; a first sub analog digital converter receiving an analog input signal and converting the analog input signal into a first digital signal by using the first reference voltage; an amplifier converting the first digital signal into a voltage corresponding to the first digital signal by using the first reference voltage and amplifying a difference between a voltage level of the analog input signal and a voltage level corresponding to the first digital signal to output a residual signal; and a second sub analog digital converter receiving the residual signal and converting the residual signal into a second digital signal by using the second reference voltage.

Abstract: Described is a method that includes receiving a signal through a channel; considering at least one channel-related criterion and, in response to the considered at least one channel-related criterion, setting a value of an adaptive combining threshold for a maximum ratio combiner that receives the outputs of a plurality of fingers of a rake receiver.

Abstract: A method and a device for cancelling transmitter interference in a transceiver, and a transceiver are provided. The method includes: coupling a part of radio frequency signals output from a transmitter, performing amplification, frequency conversion, analog-digital conversion, and digital filtration on the coupled signal by an interference receiver, and outputting a digital signal; performing adaptive equalization on the digital signal output from the interference receiver, and delaying predetermined time of the digital signal output from a receiver, and subtracting the equalized digital signal from the delayed digital signal.

Abstract: An equalizer includes an oversampling logic unit, a direct current setting unit, and an alternating current setting unit. The oversampling logic unit oversamples data from a channel to generate a plurality of direct current terms and a plurality of alternating current terms according to an oversampling clock, and outputting a plurality of direct current terms corresponding to an output clock and a plurality of alternating current terms corresponding to the output clock according to the output clock. The direct current setting unit adjusts a direct current setting of the equalizer according to a plurality of direct current terms inputted by the oversampling logic unit within a first predetermined time. And the alternating current setting unit adjusts an alternating current setting of the equalizer according to a plurality of alternating current terms inputted by the oversampling logic unit within the first predetermined time.

Abstract: An approach to time domain filtering uses a passive charge sharing approach to implement an infinite impulse response filter. Delayed samples of an input signal are stored as charges on capacitors of a first array of capacitors, and delayed samples of the output signal are stored as charges on capacitors of a second array of capacitors. Outputs are determined by passively coupling capacitors of the first and second arrays to one another, and determining the output according to a total charge on the coupled capacitors. In some examples, a gain is applied to the total charge prior to storing the output on the second array of capacitors. In some examples, a charge scaling circuit is applied to the charges stored on the arrays prior to coupling capacitors to form the output.

Abstract: Embodiments reduce crosstalk between multiple interconnects in a printed circuit board environment. Further, embodiments perform frequency-dependent modal decomposition of characteristics of two or more interconnects spanning one or more integrated circuits on an interconnect substrate. In addition, each interconnect includes one or more cascaded coupled traces, where the cascaded coupled traces have one or more discontinuities in a heterogeneous medium.

Abstract: Systems and methods are provided for decoding signal vectors in multiple-input multiple-output (MIMO) systems, where the receiver has received one or more signal vectors from the same transmitted vector. The receiver combines the received vectors by vector concatenation The concatenated vector may then be decoded using, for example, maximum-likelihood decoding. In some embodiments, the combined signal vector is equalized before decoding.

Abstract: An RC filter is calibrated to a desired cutoff frequency by initializing the filter with a cutoff frequency. An input signal is filtered by the RC filter to provide a filter output signal having phase and frequency values. The cutoff frequency of the RC filter is adjusted based on the phase and frequency values of the filter output signal if the phase and frequency values do not satisfy a predetermined condition. The filtering and adjusting are repeated until the phase and frequency values of the filter output signal satisfy the predetermined condition. A calibration apparatus has a frequency generator, a resistor-capacitor (RC) filter, a phase comparator, a frequency detector, and a state machine. The phase comparator, frequency detector, and state machine are configured to calibrate the RC filter to a cutoff frequency specified by the reference signal based on a filter output signal of the RC filter.

Abstract: A composite signal including a plurality of component signal streams is processed using QR-decomposition to detect symbols and calculate a decision metric for each of the signal streams (202). Soft serial interference cancellation is performed on the composite signal based on the symbols detected for different ones of the signal streams and a ranking of the signal streams (204). The symbols are re-detected and the decision metric re-calculated for each signal stream based on soft serial interference cancellation results (206). The different decision metric calculations for at least one of the signal streams are compared to determine whether symbol detection is more accurate with or without soft serial interference cancellation (208). The signal streams are decoded using symbols detected based on soft serial interference cancellation results when symbol detection is determined to be more accurate with soft serial interference cancellation (210).

Abstract: A system and method are disclosed for reducing the kickback disturbance in an electronic circuit. The system is based on the coupling of a programmable noise filter between bias blocks. In one embodiment the programmable noise filter includes capacitors, resisters and switches and forms a C-R-C circuit structure. By selecting the resistance and capacitance values and the status of the switches, the performance of the programmable noise filter is determined. Also disclosed is a system and method to reduce kickback disturbances comprising N+1 bias blocks, N programmable noise filters, and a bias reference generator, wherein N is equal to or greater than one.

Abstract: This invention provides a signal processing technique of suppressing various kinds of noise including unknown noise without storing a number of pieces of noise information in advance. To accomplish this, noise information is modified using modification information to obtain modified noise information. The noise in the noisy signal is suppressed using the modified noise information. The modification information is adapted and updated for the result of the step of suppressing.

Abstract: A method is provided. The method comprises calibrating noise prediction parameters by adapting one or more biases, adapting one or more filter coefficients using the adapted one or more biases, and adapting one or more prediction error variances using the adapted one or more biases and the adapted one or more filter coefficients.

Abstract: A wireless receiver including receiving antennas, frequency-space transformers, noise wave removers, a back-end signal processor, a pattern detector, a broadcast interruption detector, and a back-end controller. The frequency-space transformers convert signals received by the antennas into frequency-space signals. The noise wave removers each at least perform the calculation of a transmission line coefficient matrix and the calculation of an inter-antenna covariance matrix on the frequency-space signals. A controller controls the back-end signal processor to operate when the multicarrier transmission waves have been detected to be interrupted. The noise wave removers each perform the calculation of the inter-antenna covariance matrix when a broadcast interruption detector has detected the interruption of the multicarrier airwaves. Thus, the wireless receiver removes noise generated within it, thereby having high reception sensitivity.

Abstract: A power supply noise reduction circuit and a power supply noise reduction method for reducing power supply noise at any frequency, includes forcing a power supply noise to resonate to the resonance frequency of a parallel resonance circuit, including an inductor and a capacitor to set the frequency of the noise equal or close to the resonance frequency of the parallel resonance circuit and, attenuating the noise, set equal or close to the resonance frequency of the parallel resonance circuit, using a low-pass filter including a resistor and a capacitor.

Abstract: Provided are: plural circuit components including a circuit component which constitutes a receiving unit receiving a signal sequence which is arranged so that a desired signal and a signal different from the desired signal are lined up in time series, the desired signal indicating desired data which includes at least one of text data, sound data, image data, and a computer program product; and an operating parameter changing unit which changes an operating parameter of at least one of the plural circuit components, during a period in which the receiving unit receives the signal different from the desired signal.

Abstract: A signal extracting apparatus is provided based on independent component analysis with reference for a single measured signal as a signal processing technique that allows stable and quick extraction of a target signal from single measured signal even in a high-noise environment with a high noise ratio against a target signal to be extracted.

Abstract: A filter device includes a filter that separates a steady component and a non-steady component included in an input signal, a synthesis unit that synthesizes the separated steady component and the separated non-steady component according to a given ratio, and an evaluation unit that evaluates the magnitude of the amount of the non-steady component in the input signal, wherein the synthesis unit sets the given ratio to a first ratio in an instance in which the evaluation unit determines the amount of the non-steady component to be equal to or less than a predetermined reference, and sets the given ratio to a second ratio, in which the proportion of the non-steady component is less than that of the first ratio, in an instance in which the evaluation unit determines the amount of the non-steady component to be greater than the predetermined reference.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data.

Abstract: In order to reduce occurrence of a fetching error of a digital signal, caused by a power-source noise, there is provided a semiconductor device provided with a switching circuit for executing a switching operation according to a pulse control signal and a digital signal hold circuit for fetching a digital signal. The digital signal hold circuit includes a mask signal generation circuit for generating a mask signal from the pulse control signal, the mask signal being for use in keeping the digital signal from being fetched during a time period of power-source noise occurrence caused by the switching operation, and the digital signal is not fetched during the time period of power-source noise occurrence while the digital signal is fetched during a time period of power-source noise nonoccurrence.

Abstract: A high-frequency switch module that significantly reduces deterioration of high-frequency characteristics and improves harmonic wave distortion characteristics includes a high-frequency switch and SAW filters mounted on a multilayer substrate. Low pass filters are provided within the multilayer substrate. The terminals of the high-frequency switch are located on the bottom surface of the semiconductor substrate. The high-frequency switch includes a high-frequency circuit ground terminal and a control circuit ground terminal, the multilayer substrate includes therein a ground electrode which is electrically connected to a top surface connection electrode to which the high-frequency circuit ground terminal is connected, and a wiring electrode electrically connected to a top surface connection electrode to which the control circuit ground terminal is connected is arranged so as to be insulated from the ground electrode.

Abstract: The present patent application discloses a method and apparatus for decoding, comprising decoding signals iteratively, mutually exchanging extrinsic information, calculating APP LLRs for both systematic and parity bits and making a hard decision after a plurality of iterations is completed based on accumulated soft information. The present patent application also discloses a method and apparatus for post decoding soft interference canceling, comprising generating updated a posteriori probabilities for systematic and parity bits from a turbo decoder, mapping the posteriori probabilities to soft symbols, quantizing the soft symbols, re-encoding a data packet, filtering a chip sequence, reconstructing an interference waveform, and scaling reconstruction filter coefficients using the symbols.

Abstract: A method of Dirty Paper Coding DPC using nested lattices is disclosed. The complexity of DPC can be reduced by scaling nested lattices and mapping interference to a lattice point of the scaled lattice.

Abstract: Methods and systems are described for processing a signal in wireless communications. The signal may have synchronization information. A method of processing a signal having synchronization information may include receiving the signal, and determining a truncation region of the time domain estimated channel, the estimated channel having taps. The method further includes processing the channel taps within the truncation region.

Abstract: A communication device according to an embodiment of the present invention includes a communication antenna that receives a transmission signal where a spectrum spread signal subjected to a spectrum spread is modulated; an intermediate frequency converting unit that converts the transmission signal received by the communication antenna into an intermediate frequency signal having a predetermined frequency; an analog to digital converting unit that discretizes the intermediate frequency signal and outputs a discretization signal; a noise removing unit that detects a noise other than a normal thermal noise included in the discretization signal and removes the detected noise from the discretization signal; and a demodulating unit that demodulates the spectrum spread signal, based on the discretization signal that is output from the noise removing unit.

Abstract: A transmitting and receiving circuit includes a transmitting side amplifier circuit amplifying a transmission signal transmitted from an antenna, a receiving side amplifier circuit amplifying a reception signal received by the antenna and being electrically connected to the a transmitting side amplifier circuit, a first matching circuit matching the antenna and the transmitting side amplifier circuit, a second matching circuit matching the antenna and the receiving side amplifier circuit, a first current source circuit capable of controlling an operating state and setting a first connection point between the first matching circuit and an output terminal of the transmitting side amplifier circuit to a given voltage, and a second current source circuit capable of controlling an operating state and setting a second connection point between the second matching circuit and an input terminal of the receiving side amplifier circuit to a given voltage.

Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.

Abstract: System and method for evaluating a transmitter by estimating IQ impairments in an orthogonal frequency division multiplexed (OFDM) signal generated by the transmitter. The OFDM signal may be received. The OFDM signal may represent a stream of symbols, each comprising a plurality of subcarriers. At least a subset of the subcarriers may be pilot subcarriers. The pilot subcarriers may be grouped into one or more groups of pilot subcarriers based on one or more conditions: a pilot subcarrier which satisfies a condition in its relation to a mirror subcarrier may be grouped with other pilot subcarriers which also satisfy the condition in relation to mirror subcarriers. An estimate of one or more of gain imbalance or quadrature skew of the OFDM signal may be calculated based on the one or more groups of pilot subcarriers and the one or more conditions. The estimate may be used to evaluate the transmitter.

Abstract: A method for deriving interference signals from modulated, digital signals is provided. The receiver end reconstructs the modulated digital signals sent by a transmitter. These reconstructed modulated digital signals are then subtracted from the received modulated digital signals, and the result of the subtraction is used to estimate the interference signals without influence by prior filtering at the receiver end. By way of example, it is possible to demodulate the interference signals estimated at the receiver end in order to ascertain possible unauthorized carrier frequencies which disturb the regular carrier frequencies, even if the interference signals are not completely in the bandwidth of the regular carrier frequency or carrier frequencies.

Abstract: An initialization circuit comprises a section signal generator generating a section signal, of which a prescribed section is enabled in response to a power-up signal, a first oscillator generating a first period signal in response to the section signal, a first period multiplier generating a first multiplied signal by multiplying a period of the first period signal, and a signal selector transferring the first multiplied signal or a second multiplied signal selectively as a self-refresh enable signal in response to the section signal.

Abstract: Polyphase nonlinear digital predistorters (pNDPs) mitigate nonlinear distortions generated by time-interleaved digital-to-analog converters (TIDACs). Processors in an example pNDP compute nonlinear and linear compensation terms representative of channel mismatches and other imperfections in the TIDAC based on the digital input to the TIDAC. The pNDP subtracts these compensation terms from a delayed copy of the digital input to yield a predistorted digital input. The TIDAC converts on the predistorted digital input into a fullband analog output that is substantially free of nonlinear distortion.

Abstract: A transmitter (106) for transmitting a signal, the signal comprising a plurality of signal values, the signal values being grouped to at least one signal value block. The transmitter comprises a pre-transformation unit (101) adapted to process each signal value block by a pre-transformation to produce a block of modulation symbols, wherein the pre-transformation comprises a phase rotation of the signal block values, which corresponds to the multiplication of the signal value block with a phase rotation matrix. The transmitter also comprises a modulation unit (102) adapted to modulate at least one carrier signal based on the modulation symbols and a sending unit (104) adapted to send the modulated carrier signal.

Abstract: A digital loop filter includes a fine control circuit and a coarse control circuit. The fine control circuit adjusts a phase of a feedback clock signal by a first phase adjustment in response to a first phase error signal that indicates a sign of a phase error between a reference clock signal and the feedback clock signal. The coarse control circuit adjusts the phase of the feedback clock signal by a second phase adjustment in response to a second phase error signal. The second phase adjustment is larger than the first phase adjustment. The second phase error signal indicates a magnitude of a phase error between the reference clock signal and the feedback clock signal.

Abstract: A filter circuit includes a filtering unit configured to filter an input signal and generate an output signal, and a weight generation unit configured to monitor a variation of the output signal and generate weight information based on the monitored variation.

Abstract: A method includes obtaining an input signal and demodulating phase contamination in the input signal to generate a baseband signal. The method also includes modulating the input signal based on the baseband signal to generate an output signal, where the output signal has less phase contamination than the input signal. The phase contamination could be demodulated using a phase demodulator or a frequency modulation (FM) detector. A portion of the input signal could be down-converted to a lower frequency, and the phase contamination in the down-converted portion of the input signal could be demodulated. Additional phase contamination in the output signal can be demodulated and used to regulate a level of the baseband signal used during modulation of the input signal. The output signal could have less phase noise or period jitter than the input signal.

Abstract: A communications system receives a modulated signal that carries encoded communications data. An adaptive filter has a plurality of non-adaptive and adaptive filter taps with weighted coefficients and a tap order selection circuit for selecting the number and order of adaptive filter taps based on one of at least measured output power from the adaptive filter and signal modulation. A demodulator and decoder receives the filtered output signal and demodulates and decodes the signal to obtain the communications data.

Abstract: A digital broadcast transmitting/receiving system and a signal processing method thereof that can improve the receiving performance of the system. A digital broadcast transmitter has a randomizer to randomize an input data stream which has null bytes being inserted at a specified position, a multiplexer to output a data stream formed by inserting specified known data into the position of the null bytes of the randomized data stream, an encoder to encode the data stream outputted from the multiplexer, and a modulator/RF-converter to modulate the encoded data, RF-convert the modulated data and transmit the RF-converted data. The receiving performance of the digital broadcast transmitting/receiving system can be improved even in a multi-path channel by detecting the known data from the received signal and using the known data in synchronization and equalization in a digital broadcast receiver.

Abstract: A touch controller having noise reduction circuitry is disclosed. The touch controller can include a transmit section for generating stimulation signals to drive a touch display to sense a touch or hover event. The touch controller can also include a receive section for processing touch signals from the touch display indicative of the touch or hover event. The touch controller can reduce noise introduced into the stimulation signals and propagated through the touch display into the touch signals, thereby interfering with touch and hover sensing. To reduce the noise, the transmit section's noise reduction circuitry can isolate and subtract the noise from the stimulation signals. In addition or alternatively, the receive section's noise reduction circuitry can isolate and subtract the noise from the touch signals.

Abstract: A solution for compensating intermodulation distortion of a component is provided. A circuit element includes multiple connected components. At least two of the connected components comprise current-voltage characteristics of opposite signs (e.g., sublinear and superlinear current-voltage characteristics) such that the current-voltage characteristics of the circuit element produces a level of intermodulation distortion for the circuit element lower than a level of intermodulation distortion for each of the connected components.

Abstract: A filter circuit includes a plurality of shifting units configured to each store an initial value, receive at least one input signal, and shift the stored value to a next shifting unit in sequence from among the shifting units in response to at least one input signal, and an initial value setting unit configured to set the initial stored values of the shifting units to different sets of initial stored values in response to different filter setting signals, respectively, wherein the different filter setting signals represent respectively different criteria for filtering the at least one input signal, wherein the initially stored values have a first logic value or a second logic value, wherein the filter circuit is configured to activate an output signal when the first logic value is shifted to a selected shifting unit among the plurality of shifting units.

Abstract: A noise reduction circuit includes first and second reset signal generation circuits that generate first and second reset signals that are activated when a data input signal goes to a low level or a high level and are deactivated in synchronization with a clock signal when a high level or a low level is maintained, and first and second counter circuits that count an inverted signal of the clock signal, and are reset by the first or second reset signal. The noise reduction circuit further includes a data output circuit that includes a selector circuit and an output flip-flop circuit that outputs a signal selected by the selector circuit in synchronization with the clock, wherein the selector circuit selects and outputs any of: a signal fixed at a high level or a low level, and an output signal of the output flip-flop circuit, according to logic levels of output signals of the first and second counter circuit.

Abstract: A preamble noise cancellation circuit according to an aspect of the invention may include: a coupler dividing an input signal; a preamble noise detection unit subtracting a predetermined reference preamble signal from a received preamble signal output from the coupler to detect preamble noise included in the received preamble signal; and a noise cancellation unit subtracting the preamble noise detected by the preamble noise detection unit from the received preamble signal output from the coupler.

Abstract: An electronic system that partially or perhaps even fully mitigates the effects of EMI by having a dedicated antenna circuit for carrying an antenna signal that is not used for signal processing in the functional circuit, but is instead used to emit electromagnetic radiation that at least partially offsets EMI emitted by the operation signal of a functional circuit. An antenna signal generation circuit generates the antenna signal and asserts the antenna signal on the antenna circuit. The ante a signal has the characteristic such that when the antenna signal is applied to the antenna circuit, the resultant emitted electromagnetic radiation at least partially offsets electromagnetic interference emitted by the functional circuit.

Abstract: Disclosed are a nonlinear distortion compensating receiver and nonlinear distortion compensation method, wherein nonlinear distortion is reduced with a simple circuit configuration. A correction (opposite characteristics) filter (104) has characteristics opposite that of the frequency characteristics of a direct sampling mixer (102) and corrects signals sampled by the direct sampling mixer (102). In the main path, a LPF (106) extracts a frequency band component of a desired signal from the corrected signal. In the replica path, a BPF (107) extracts the frequency band component of a blocker signal from the corrected signal. A cubing circuit (108) uses the frequency band component of the blocker signal to generate a replica signal for the nonlinear distortion. An adaptive filter (110) performs filter processing on the replica signal while updating the filter coefficients.

Abstract: An embedded decoupling capacitor wearout monitor for power transmission line, which can be integrated and fabricated in any standard CMOS or BiCMOS circuits. The embedded noise monitor is employed to detect the degraded capacitor and disable it from further operation, which will extend the operation lifetime of the circuit system and prevent subsequent catastrophic failure as a result of hard-breakdown (or capacitor short). In one aspect, the monitor circuit and method detects early degradation signal before catastrophic decoupling capacitor failure and, further can pin-point a degraded decoupling capacitor and disable it, avoiding impact from decoupling capacitor breakdown failure. The monitor circuit and method provides for decoupling capacitor redundancy and includes an embedded and self-diagnostic circuit for functionality and reliability.

Abstract: An integrated circuit device includes an I/O circuit which buffers and outputs an input signal D from a pad when an enable signal ENB is set at a second voltage level, a circuit block to which an output signal from the I/O circuit is input, and a malfunction prevention circuit which outputs to the circuit block an output signal QP of which a voltage level is set by a first power supply VDDC in a period T1 in which the signal ENB is set at a first voltage level and a period T2 including a period in which the signal ENB changes from the first voltage level to the second voltage level, and outputs to the circuit block the output signal QP corresponding to an output signal QI from the I/O circuit in a period T3 in which the signal ENB is set at the second voltage level.

Abstract: A communications system receives a modulated communication signal that carries encoded communications data. A signal input receives the communication signal. An adaptive filter circuit is connected to the signal input and comprises N number of parallel adaptive filters. Each adaptive filter has non-adaptive and adaptive taps with weighted coefficients that are different in number from the respective other parallel adaptive filters within the adaptive filter circuit. A selection output circuit is connected to each adaptive filter and selects for output the adaptive filter having the most suppression or least output power or other criterion which can indicate a best choice to use of the N parallel adaptive filters. A demodulator demodulates the signal and a decoder receives the filtered output signal from the demodulator and decodes the signal to obtain the communications data.

Abstract: A semiconductor integrated circuit can include a first voltage pad, a second voltage pad, and a voltage stabilizing unit that is connected between the first voltage pad and the second voltage pad. The first voltage pad can be connected to a first internal circuit, and the second voltage pad can be connected to a second internal circuit.

Abstract: Embodiments relate to an ultra-low-power, high-voltage integrated circuit (IC) that also has high electromagnetic compatibility (EMC). Embodiments address the desire for an ultra-low-power, high-voltage IC that also has high EMC and comprise a high-voltage EMC protection circuit with normal current consumption coupled to an ultra-low-power, low-voltage oscillator that controls a sleep/wake, or duty, cycle of a high-voltage circuit.

Abstract: Reducing, suppressing or canceling parallel parasitic capacitance and/or resistive effects that affect the frequency response of components, elements and/or circuits in an electronic circuit or system that exhibit inductance is disclosed. Noise generated by parallel parasitic capacitance and/or parasitic resistance of the components, the physical orientation of the components, and/or the layout of components, devices and/or conductive tracks (board traces) on printed circuit boards within an electronic circuit or system is reduced, suppressed or canceled. The reduction, suppression or cancelation is achieved by adding a current source in parallel with a part or component of the electronic circuit or system that exhibits inductance, the current source being adapted to deliver a compensating current of roughly equal magnitude and roughly opposite phase to parasitic current associated with the part or component.

Abstract: A communications system receives a modulated signal that carries encoded communications data. An adaptive filter circuit has a plurality of adaptive filters each having a plurality of non-adaptive and adaptive filter taps with weighted coefficients. At a selected adaptive filter, an interference reduction circuit is responsive to one of at least a received state of a demodulator, the type of modulation used by communication system and the input and output power of adaptive filter for updating the adaptive gain of the adaptive filter, selecting the number and order of adaptive filter taps, separating the spacing of multipath introduced by adaptive filter, controlling input and output normalizing circuits to adaptive filter(s) and selecting if signal passed to demodulator is original received signal or signal output by adaptive filter. A demodulator and decoder receive the filtered output signal and demodulate and decode the signal to obtain the communications data.