Abstract: Systems and/or methods that facilitate security of data are presented. A random number generation component generates random numbers based in part on electron activity in a select memory cell(s) to facilitate data security. Sensor components that are highly sensitive can be employed to sense activity of the select memory cell(s) and/or reference memory cell in a noise margin associated with respective memory cells in the memory component. The activity of the select memory cell is compared to the reference memory cell(s) to facilitate generating binary data. The binary data is provided to the random number generation component where the binary data is evaluated to determine whether a predetermined level of entropy exists in the binary data. The binary data, or a portion thereof, can be processed to generate random numbers that are utilized in cryptographic processes and/or as a physical signature to facilitate data security.

Abstract: A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator.

Abstract: Four stochastic resonators 20-1 to 20-4 outputting a pulse signal in accordance with a stochastic resonance phenomenon are unidirectionally coupled in a ring-like form to constitute a fluctuation oscillator 10. When a signal output from each of the stochastic resonators 20-1 to 20-4 is successively transmitted in the stochastic resonators 20-1 to 20-4 coupled in a ring-like form, the output timings at each stochastic resonator 20 are synchronized with each other due to a cooperation phenomenon between the stochastic resonators 20-1 to 20-4, so that each stochastic resonator 20 is self-excited to oscillate at a constant period of time.

Abstract: A spread spectrum controller (20) controls a PLL (10) so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller (30) controls at least one of a phase detector (11), a loop filter (12), a voltage-controlled oscillator (13), and a frequency divider (14) in the PLL (10) during operation of the spread spectrum controller (20) to change a loop bandwidth of the PLL (10).

Abstract: In the field of direct mind-machine interactions, prior art devices and methods do not provide sufficiently fast and reliable results. Mental influence detectors (100, 140, 400, 430) and corresponding methods provide fast and reliable results useful for detecting an influence of mind and hidden or classically non-inferable information. An anomalous effect detector (100) includes a source (104) of non-deterministic random numbers (110), a converter (114) to convert a property of numbers, a processor to accept converter output (118) and to produce an output signal (124) representative of an influence of mind. The processor output signal (124) contains fewer numbers than the input (110).

Abstract: A frequency synthesizer is described illustrating a method for modulation having an adjustable standard curve used to modulate an input signal for spread spectrum modulation. In particular, the a standard curve is generated, wherein the standard curve modulates an input signal to generate a spread spectrum of frequencies. The standard curve is associated with a standard modulation frequency. The standard curve is sampled at a constant sampling frequency. A shape of the standard curve is adjusted, such that critical points of the standard curve are captured when sampling the standard curve. The shape of said standard curve that is altered varies between at least two periods.

Abstract: A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator.

Abstract: A PLL circuit is disclosed that comprises a controlling unit that switches at a predetermined timing to enable/disable the phase difference signal supplied from the phase comparator to the low pass filter; and a resistor element that is disposed between a predetermined potential and a signal line for supplying the phase difference signal from the phase comparator to the low pass filter, when the phase difference signal is enabled, the oscillation circuit performing oscillation operation based on the voltage signal corresponding to the phase difference signal, when the phase difference signal is disabled, the low pass filter being supplied with the predetermined potential through the resistor element to allow the oscillation circuit to perform oscillation operation based on the voltage signal generated depending on the supplied predetermined potential.

Abstract: A system including a pseudo-random number generator having a register to store an extended state having a reduced state and a dynamic constant, an initialization module to initialize a part of the extended state based on a Key and/or an Initial Value, a state update module to update the reduced state, an output word module to generate output words, the state update module and the output word module being adapted to operate through cyclical rounds, each round including updating the reduced state and then generating one of the output words, and an update dynamic constant module to update the dynamic constant, wherein in a majority of the rounds, updating of the reduced state and/or generation of the output word is based on the dynamic constant, and the dynamic constant is only updated in a minority of the rounds. Related apparatus and method are also described.

Abstract: A device for executing a cryptoalgorithm including a central processing unit for a first sub-group of operations and for a flow control of the cryptoalgorithm as well as a hardware circuit for a second sub-group of operations, wherein the first sub-group preferably includes arithmetic and/or logic operations, while the second sub-group includes rotation operations, permutation operations, substitution operations or selection operations.

Abstract: A random number generator includes a plurality of memory cells arranged in a series, a feedback processor for generating a feedback signal and for feeding the feedback signal into one of the memory cells, and a random number outputter formed to combine states of a group of at least two memory cells to obtain an output sequence. Sequences strongly differing from one another, the number of which is greater than the number of memory cells, can be generated by generating several output sequences AF0, AF1, AF2, . . . , AFk by combining states of different memory cells such that a safe and efficient bus encryption is achievable.

Abstract: A phase-locked loop control system and method are described. Present invention phase-locked loop control systems and methods facilitate control of phase-lock loop operations. In one embodiment, phase-lock loop control systems and methods are utilized in the implementation of a modulated frequency synthesizer for facilitating efficient frequency spreading over a designated spectrum. It is appreciated that present invention embodiments can have a variety of implementations and can be compatible with vector accumulation. For example, a phase-locked loop control system or method can facilitate generation of a variety of modulation patterns, including but not necessarily limited to linear or non-linear modulation, standard or non-standard modulation, etc.

Abstract: A phase-locked loop control system and method are described. Present invention phase-locked loop control systems and methods facilitate control of phase-lock loop operations. In one embodiment, phase-lock loop control systems and methods are utilized in the implementation of a modulated frequency synthesizer for facilitating efficient frequency spreading over a designated spectrum. It is appreciated that present invention embodiments can have a variety of implementations and can be compatible with vector accumulation. For example, a phase-locked loop control system or method can facilitate generation of a variety of modulation patterns, including but not necessarily limited to linear or non-linear modulation, standard or non-standard modulation, etc.

Abstract: A phase-locked loop control system and method are described. Present invention phase-locked loop control systems and methods facilitate control of phase-lock loop operations. In one embodiment, phase-lock loop control systems and methods are utilized in the implementation of a modulated frequency synthesizer for facilitating efficient frequency spreading over a designated spectrum. It is appreciated that present invention embodiments can have a variety of implementations and can be compatible with vector accumulation. For example, a phase-locked loop control system or method can facilitate generation of a variety of modulation patterns, including but not necessarily limited to linear or non-linear modulation, standard or non-standard modulation, etc.

Abstract: A system for testing radio frequency (RF) communications of a device capable of such communications is provided. The system includes a chamber for isolating the device from RF interference, an antenna that is suitable for RF communications with the device wherein the antenna is capable of communications over a range of frequencies, the antenna being located within the chamber, and a digital communication link for providing non-RF communications with the device.

Abstract: A system reduces a received RF signal from EMI generated by a digital electronic system that includes a clock. In the present invention the clock frequency, that generates signals and strobes data out, is purposely changed or modulated, by, illustratively, driving the power node of the clock. The typical filter circuit between the clock power node and the power supply is used to advantage in that the filter impedance allows a buffer to more easily drive the clock power node since the low impedance of the power supply is isolated by the filter circuit. The changing of the clock frequency spreads the EMI RF harmonics over a spectrum so that any harmonics received by an RF receiver will be short lived and therefore of small magnitude.

Abstract: A PLL is provided with an optimum operating point in order to have appropriately a frequency margin and a locking time. There is provided a phase looked loop which includes: a frequency divider for dividing an output signal by a dividing integer corresponding to an input code; an encoding unit for encoding the input code to generate an encoded code; and a loop filtering unit configured to adjust elements in response to the encoded code.

Abstract: Random number generators are used for entertainment in gambling, lotteries and video gaming devices. True Random Number Generators, as are now currently defined, must be actuated by a physical noise source, typically based on the uncertainty of the phase differences of a stable and an unstable autonomous oscillator. In this invention an autonomous random frequency modulated oscillator driven by a self contained pseudo-random number generator outputs three loosely correlated random binary streams. Included in the invention is a hardware method for proving wandering phase differences and also the existence of a colored random distribution of concatenated nibbles.

Abstract: A frequency jitter generation circuit having a voltage generator and an oscillator circuit is provided. The voltage generator receives an input voltage and converts the input voltage into an upper reference voltage output to the oscillator circuit. Voltage level of the upper reference voltage is varying. The oscillator circuit is coupled with the voltage generator. Voltage level of a reference voltage in the oscillator circuit is oscillated between the upper reference voltage and a lower reference voltage to generate a frequency signal with a jitter based on the variation of the upper reference voltage.

Abstract: An adjustable chaotic signal generator using pulse modulation for UWB communications, and a chaotic signal generating method thereof are provided. The chaotic signal generator for UWB communications includes a plurality of pulse generators which generates pulses of different frequencies; at least one combiner which combines the pulses generated at the pulse generators; and a plurality of local oscillators which receives signals from the combiner, respectively, and generates a chaotic signal by increasing the received signals to different frequency bands. Accordingly, a plurality of users can conduct the radio communications in a specific wireless communication range at the same time by generating the chaotic signal that can be split to the multiple channels. Also, the chaotic signal generator is structured using devices integratable on an integrated circuit.

Abstract: A signal generator, a signal generation method, and a communication system using the same are provided. The signal generator includes a plurality of nonlinear elements which are connected in a ring; and a signal distributor which is arranged in the ring to form a closed loop, feeds part of a signal to one of the plurality of the nonlinear elements, and outputs signal generated by one of the plurality of nonlinear elements. The method includes arranging a plurality of nonlinear elements connected in a ring; inputting a signal to one of the nonlinear elements; amplifying the signal; receiving the amplified signal and generating a harmonic component of a frequency; clipping the signal; and feeding part of the signal back to one of the nonlinear elements and outputting a remainder of the signal. The system includes a chaotic signal generator; a signal distributor; a modulator; and a transmission circuit.

Abstract: A circuit for generating chaotic signals implemented using heterojunction bipolar transistors (HBTs) and utilized in low probability intercept communications. The HBT chaotic circuit generates truly random analog signals in the GHz range that are non-repeating and deterministic and may not be replicated by preloading a predetermined sequence. A fully differential autonomous chaotic circuit outputs two pairs of chaotic signals to be used in a communication system. As it is impossible to generate identical chaotic signals at the transmitter and receiver sites, the receiver itself sends the chaotic signal to be used for encoding to the transmitter. The receiver includes a chaotic signal generator and digitizes, upconverts, and transmits the generated chaotic signal to the transmitter. The transmitter uses the received chaotic signal to code data to be transmitted. The receiver decodes the transmitted data that is encoded by the chaotic signal to retrieve the transmitted data.

Abstract: An apparatus and method for generation of a noise signal are provided. The apparatus includes a noise synthesizing module and a noise signal transfer module. The noise synthesizing module includes a voltage controlled oscillator, a phase frequency detector, a phase locked loop filter, and a reference generator which form a phase locked loop. An output signal of the reference generator is provided to a first phase-frequency input of the phase-frequency detector, and an output signal of the voltage controlled oscillator is provided to a second input of the phase-frequency detector. An output signal of the phase-frequency detector is provided to an input of the phase locked loop filter, and an output of the phase locked loop filter is provided to a frequency control input of the voltage controlled oscillator.

Abstract: The invention relates to the field of devices intended to generate a noise of high amplitude having specific spectral characteristics. It concerns a transmission device mainly comprising a transducer, means for synthesizing a digital noise sequence x?(n) and power sources. According to the invention, the device also comprises means such that according to the value, at each time t, of the synthesized noise sequence, the transducer is supplied by one or more noise sources placed in series, the overall voltage reflecting the value of the digital noise sequence. The transition times between two supply values are synchronous with the basic clock of means which synthesize x?(n). The invention also relates to a method for iteratively synthesizing, under spectral constraint, a noise having a power spectral density corresponding to a given template. The invention applies in particular to the submarine acoustic noise generators on board small-size autonomous craft.

Abstract: A frequency synthesizer is described. In particular, the frequency synthesizer includes a modulator circuit for producing a signal of modulated frequency. The frequency synthesizer includes an accumulator for summing a plurality of errors in the modulator circuit. An error sum value is generated. More particularly, the accumulator increases the rate of sign change of the plurality of errors. An error signal modulator is coupled to the accumulator and modulates an index that is associated with a current error based on the error sum value. The index that is modulated is used for selecting a feedback loop divider count value used for dividing a frequency of the signal. As a result, the error noise around a target signal shows an increased sign change of error, which moves the error noise to higher frequencies. This improves EMI performance.

Abstract: Exemplary embodiments of the invention provide a system, method and apparatus for spread spectrum functionality for a free-running, reference harmonic oscillator. In an exemplary embodiment, an apparatus comprises a reference oscillator adapted to provide a reference signal having a reference frequency; and a spread spectrum controller adapted to control the reference oscillator to generate a spread-spectrum reference signal at a plurality of different reference frequencies during a predetermined or selected time period. An exemplary apparatus may also include a coefficient register adapted to store a plurality of coefficients and a plurality of controlled reactance modules responsive to a corresponding coefficient of the plurality of coefficients to modify an amount of reactance effectively coupled to the reference oscillator.

Abstract: The invention relates to a method for controlling an oscillatory system with the aid of at least one measured variable by the detection of at least one oscillation component (Sx(t)) over time (t) in the form of at least one measured variable. According to said method a control variable (?u) for controlling the oscillatory system is determined from the sum of the weighted differences of the delayed oscillation component, which has been delayed at least twice by different delay times (?1>O, ?2>0) if there is one measured variable and the respective non-delayed oscillation component and if there are several measured variables the sum of the weighted differences of the delayed oscillation components (Si(t??i)), which have been respectively delayed at least once by a specific delay time (?i>0) and their respective non-delayed oscillation components (Si(t)) according to the relationship ?u=a1S1(t) b1S1(t??1)+ . . . +anSn(t)?bnSn(t??n), wherein a1, . . . , an and b1, . . .

Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for a random number generator (RNG) based on oscillator noise. In some embodiments, the RNG buffers effects of thermal noise from two independent oscillators impacted by effects of pseudo-stochastic processes and separates thermal noise from other effects. The RNG may then convert the thermal noise to a stochastic binary sequence based, at least in part, on a digital signal processing algorithm.

Abstract: A method for controlling a frequency output of a phase locked loop (PLL) is provided. The method includes providing digital control words to the PLL to discretely change at least one dividing factor within the PLL. The method further includes applying a time-varying control voltage to a voltage controlled oscillator. The method still further includes applying an output of the voltage controlled oscillator to the PLL as a reference frequency. The method further includes outputting a signal from the PLL, the signal varied in frequency based on one or more of the time-varying control voltage and the at least one dividing factor.

Abstract: A device and method for generating an adjustable chaotic signal are provided. The chaotic signal generation device includes a plurality of triangle pulse train generators which generate a plurality of triangle waves having different frequency cycles, an adder which adds the triangle waves output from the triangle pulse train generators and outputs a noise signal, and a frequency modulator which converts the noise signal to a certain frequency band to output a chaotic signal. Accordingly, the power consumption and cost are reduced and the manufacture of the chaotic signal generation device is simplified due to the components integrated on an IC. Also, a plurality of users can use wireless communications in a particular wireless communications area.

Abstract: A frequency jitter generation circuit having a voltage generator and an oscillator circuit is provided. The voltage generator receives an input voltage and converts the input voltage into an upper reference voltage output to the oscillator circuit. Voltage level of the upper reference voltage is varying. The oscillator circuit is coupled with the voltage generator. Voltage level of a reference voltage in the oscillator circuit is oscillated between the upper reference voltage and a lower reference voltage to generate a frequency signal with a jitter based on the variation of the upper reference voltage.

Abstract: Disclosed is a PLL circuit of a small circuit size capable of generating clock including a jitter component with ease. A phase comparator 11 compares the phase of an input reference clock signal CKR to the phase of a signal fed back from a frequency divider 14 to route an output signal corresponding to the phase difference to a filter unit 12. The filter unit 12 detects a low frequency component of the output signal of the phase comparator 11 to route the so detected component to a voltage controlled oscillator 13. The voltage controlled oscillator 13 generates, as an output signal CKF, an oscillation signal of an oscillation frequency which is controlled on the basis of the output voltage of the filter unit 12. The frequency divider 14 divides the frequency of the output signal CKF to output the resulting signal to the phase comparator 11.

Abstract: An inverting cell including a first inverter having first and second inputs; a second inverter having first and second inputs, wherein the second input of the second inverter is connected to the first input of the first inverter and the output of the first and second inverters is connected to the second input of the first inverter; and a third inverter connected between the output of the first and second inverters and the first input of the second inverter.

Abstract: A device for generating a random sequence (10) of bits is disclosed. The device comprises oscillating means (13), which will generate a random sequence of bits when biased with a noise signal. The oscillating means comprises at least one oscillator amplifier being protected from interfering signals by means of a load and a tail-current source for providing high noise-interference ratio. Further, the present invention relates to an integrated circuit and an electronic apparatus comprising the device for generating a random sequence according to the invention.

Abstract: Method and apparatus for generating ternary and multi-valued Gold sequences, are disclosed. Also methods to detect ternary and multi-valued sequences are disclosed. The detection can be performed by a ternary or multi-valued LFSR descrambler when the sequences are generated by an LFSR based sequence generator. A wireless system which can assign additional sequences to designated users is also disclosed. The wireless system can also transfer information to user equipment that enables methods for sequence generation and sequence detection.

Abstract: A pseudo random clock generator includes a clock generator for generating a clock signal. A pseudo random code generator receives the clock signal and thereby generating a pseudo random code. A code limiter enables the value of the pseudo random code being unchanged for at least two periods of the clock signal. A logic gate applies a logic operation to the pseudo random code and the clock signal and thereby outputting a pseudo random clock.

Abstract: The present invention “Infinite Radio Frequency Spectrum Transceiver” (IRFS for short) relates to a circuit that emits and receives the complete radio frequency spectrum transmission as it exists from 0 hertz to the region where radio frequency ends to j the infrared. Such a circuit causes infinite bandwidth output gain evenly over the entire radio frequency spectrum, can be readily used as a noise source, where such output even gain across the spectrum. Such circuit in its simplest form can be used as a noise source, subsequent use of single circuits organized in series or parallel increase power where they can readily be used as a radio frequency jamming array. Additional insertion into specific points of the circuit can be used to transmit a signal across the bandwidth where such signal takes on the attributes of all frequencies and appears as higher and lower frequency as amplitude gain at such points across the bandwidth. Additional use of various filters can restrict the frequency of transmission.

Abstract: A random number generator. The random number generator includes a noise source, a circuit controlling random current consumption, and a circuit generating random bits. A noise voltage output from the noise source drives the circuit controlling random current consumption, which also generates a random control signal. The circuit generating random bits also includes a voltage-controlled oscillator, a plurality of frequency dividers, and a plurality of flip-flops. The voltage-controlled oscillator is controlled by both the noise voltage and the random control signal. The output of the voltage-controlled oscillator is input to the frequency dividers and the flip-flops to generate a random number.

Abstract: A device for generating a noise signal, which may be used for generating a truly random sequence (10) of bits is disclosed. The device comprises a noise source (11), and an amplifier (12) connected to the noise source (11). The device according noise source according to the invention is protected from interfering signals to provide high noise-interference ratio. Further, the present invention relates to an integrated circuit and an electronic apparatus comprising the device for generating a noise signal according to the invention.

Abstract: Spread spectrum clock generation (SSCG) using asymmetric triangular profiles to reduce electromagnetic interference (EMI). The asymmetric triangular profiles provide better peak power attenuation and a more uniform power spectrum spread than conventional symmetric triangular profiles. The method receives a first clock signal that has a first frequency spectrum and modulates it with an asymmetric triangular profile to produce a second clock signal. The second clock signal has a wider frequency spectrum than the first clock signal and results in reduced electromagnetic interference compared with the first clock signal.

Abstract: A switched-current oscillator having a dc current source adapted to charge a capacitor so that the capacitor charging time is controlled based on a sequence of (pseudo)randomly selected values, each of those values defining a corresponding charging time. A discharge device is adapted to discharge the capacitor if the voltage across the capacitor reaches a threshold voltage, at which point the next value in the sequence is selected to determine the next charging time. A square-wave clock signal having spread-spectrum characteristics is generated in the oscillator by using the series of charge-discharge cycles corresponding to the sequence of randomly selected values to toggle a flip-flop operating as a delay line and zero-order hold.

Abstract: A noise signal generator includes a random word generator for generating a sequence of random words, each word representing an input value, a mapping unit for receiving the sequence of random words, mapping each input value to an output value of according to a probability distribution function, and providing a corresponding sequence of output values, and a digital-to-analog converter for generating a noise signal based on the output values.

Abstract: In a chaotic signal generator, a first signal generator generates a first signal. The first signal includes a first fundamental wave having a preset first frequency and a plurality of harmonic waves of the first fundamental wave. A second signal generator generates a second signal. The second signal includes a second fundamental wave having a preset second frequency and a plurality of harmonic waves of the second fundamental wave. Also, a mixer mixes the first signal from the first signal generator with the second signal from the second signal generator to generate a chaotic signal having a sum frequency of the first and second signals and the harmonic waves of the first and second signals. A filter passes a signal of a preset band out of the chaotic signal from the mixer.

Abstract: A stochastic pulse generator (1) of this invention includes a variable signal generator (61) operative to generate a variable signal (VC) which varies randomly, and a comparator (3) operative to output a binary signal (Vout) of High or Low depending on which of one input signal and another input signal is larger or smaller than the other, wherein when the variable signal (VC) is inputted, as the one input signal, to the comparator (3) from the variable signal generator (61), the comparator (3) stochastically outputs pulses, the number of which corresponds to a magnitude of the another input signal.

Abstract: Random number generators are used for entertainment in gambling, lotteries and video gaming devices. True Random Number Generators, as are now currently defined, must be actuated by a physical noise source, typically based on the uncertainty of the phase differences of a stable and an unstable autonomous oscillator. In this invention an autonomous random frequency modulated oscillator driven by a self contained pseudo-random number generator outputs three loosely correlated random binary streams. Included in the invention is a hardware method for proving wandering phase differences and also the existence of a colored random distribution of concatenated nibbles.

Abstract: A method and apparatus for a spread-spectrum oscillator for a switched power converter is provided. The spread-spectrum oscillator includes a current waveform generation circuit, a capacitor, a switch, and a comparator. The capacitor is arranged to receive an oscillator current to provide a ramp voltage. The comparator is arranged to compare the ramp voltage with a reference voltage to provide an oscillator voltage. Further, the switch is arranged to discharge the capacitor when the oscillator voltage is asserted. The current waveform generation is arranged to, if enabled, provide at least a portion of the oscillator current as a triangle wave, or other type of modulating waveform suitable for spread-spectrum. Accordingly, the oscillator voltage is a spread-spectrum signal.

Abstract: A spread spectrum frequency modulated oscillator circuit usable as a clock comprises a reference component such as a resistor, a voltage controlled oscillator and a first circuit coupled to the reference component and voltage controlled oscillator and configured to supply a first control signal to the oscillator to cause the oscillator to oscillate at a frequency corresponding to a value of the reference component. A second circuit configured to supply a random signal to the oscillator causes the frequency of the oscillator to dither.

Abstract: A modulation circuit includes a microelectronic electromechanical system (MEMS) based resonant structure having a resonant frequency, an excitation input and an output. A control module is coupled to the excitation input of the MEMS based resonant structure. The control module modifies resonant characteristics of the MEMS based resonant structure to modulate the resonant frequency of the MEMS based resonant structure to produce a modulated signal at the output.

Abstract: A method for designing an integrated circuit having analog and digital circuit portions is disclosed. The method involves providing an emulation circuit, which preferably comprises a number of gates equivalent to a number of gates in the digital circuit portion, affixing the emulation circuit on a test substrate together with a version of the analog circuit portion having at least some of the defined functions of the analog circuit portion, and then testing the analog circuit version.

Abstract: A random signal generator circuit includes a thermal noise generator circuit and a self-biased inverter having an input coupled to the thermal noise generator circuit and to a feedback resistor coupled to an output of the self-biased inverter, the self-biased inverter configured to produce a sensed noise signal at the output responsive to thermal noise generated by the thermal noise generator circuit. An amplifier circuit is coupled to the output of the self-biased inverter and configured to amplify the sensed noise signal to produce a saturated random signal. The saturate random signal may be sampled, e.g., with a flip-flop, to generate a random binary signal that may be used for random number generation.