Using Tem Lines Patents (Class 333/104)
  • Patent number: 7106146
    Abstract: A signal line, which branches into four more from a connecting line on the input side via a branch point and has the branch signal lines including ?/4 transmission lines at their parts, and FETs respectively connected in shunt with the branch signal lines between connecting points on the output terminal sides as viewed from the ?/4 transmission lines provided in the branch signal lines and ground ends are provided on a semiconductor substrate. Connecting points of the FETs at the two branch signal lines are disposed with being spaced such a distance that isolation corresponding to the frequency of an RF signal reaches more than equal to 25 dB and less than or equal to 35 dB at the ends of these branch signal lines.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: September 12, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiro Tsukahara, Makio Komaru
  • Patent number: 7098755
    Abstract: A high performance single-pole-double-throw (SPDT) Transmitter/Receiver (T/R) FET switch utilizes a plurality of multi-gate FETs in series to realize low insertion loss, low harmonic distortion and high power handling capabilities. The SPDT switch consists of an antenna port, a transmitter branch coupled to a transmitter port through a plurality of multi-gate FETs in series and a receiver branch coupled to a receiver port through a plurality of multi-gate FETs in series. When a high power signal passes from the transmitter port to the antenna port through the transmitter branch, the receiver branch is required to be shut off electrically to prevent the high power signal from leaking to receiver port. This leakage can degrade the isolation of the switch and cause harmonic distortion. Furthermore, the transmitter branch is required to provide a resistance as small as possible to reduce the power loss when it passes through the transmitter branch to the antenna port.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: August 29, 2006
    Assignee: Analog Devices, Inc.
    Inventors: Yibing Zhao, Shuyun Zhang, Robert J. McMorrow
  • Patent number: 7054795
    Abstract: A method for optimizing the segment lengths of a segmented transmission line, comprising the steps of modeling the electrical performance of the segmented transmission line, and evaluating the model for incremental changes in electrical performance, selecting a set of segment lengths which meets a set of predefined optimization criteria. The predefined optimization criteria is, for example, minimum peak VSWR.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: May 30, 2006
    Assignee: MYAT Inc.
    Inventor: Donald Aves
  • Patent number: 7012478
    Abstract: The invention relates to a method to control the power of millimeter waves for a V-band TR module. According to said method, the output power is detected and controlled at a constant level with an electronic control circuit by means of a variable attenuator. The invention proposes that in transmit mode, for operation at a frequency in the 60 GHz range and higher, a first SPDT (single pole double throw) MMIC switch is used as a variable attenuator and a second SPDT MMIC switch which acts as a transmit-receive switch is used as an output power detector. In receive mode, both SPDTs are used as switches. Overall, the power control for the entire TR module results in an increase of the module yield through compensation of chip spread and temperature effects. The multiple use of the SPDT MMICs as switches, variable attenuator and power detector saves costs.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: March 14, 2006
    Assignee: EADS Deutschland GmbH
    Inventors: Marion Filleboeck, Joerg Schroth
  • Patent number: 7005940
    Abstract: A multiband transformation stage (14) comprising a common first signal port (20), a common second signal port (26) and a signal path (50) coupled between the first signal port (20) and the second signal port (26) is described. The signal path (50) is switchable between a first state with a first quarter-wavelength transformer characteristic for a first frequency band, a second state with a second quarter-wavelength transformer characteristic for a second frequency band and a third state with a transmission characteristic. The invention also relates to a multiband switching device comprising the multiband transformation stage (14) in combination with a low-power switching stage (16).
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: February 28, 2006
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Walter Kodim
  • Patent number: 7005942
    Abstract: A 4-way power splitter/combiner circuit providing a plurality of transmission lines of selected impedance and phase shift to define four amplifier ports into which one to four amplifiers may be populated without reconfiguration of the circuit. The circuit provides acceptable VSWR and return loss under each operating condition.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: February 28, 2006
    Assignee: Anaren, Inc.
    Inventors: Brian E. Culliton, Chong Mei
  • Patent number: 6998933
    Abstract: A switch selectively provides one of a first input signal at a first frequency and a second input signal at a second frequency to an output terminal with low insertion loss and high isolation between the first and second input signals. The first input signal is received at a first input terminal and the second input signal is received at a second input terminal. A switching element electrically connects the first input terminal and the output terminal to provide the first input signal to the output terminal in a first state and isolates the first input terminal from the output terminal in a second state. A bias line is electrically connected to provide a control signal to the switching element to select between the first state and the second state. An AC coupled transmission line is electrically connected to the second input terminal and electrically connected between the switching element and the output terminal.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: February 14, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Adam E. Robertson, Lon A. Dearden
  • Patent number: 6998935
    Abstract: A switch matrix including a plurality of microstrip pairs arranged to form a grid and switches to couple the microstrip pairs where they cross. Each microstrip pair includes a first microstrip and a second microstrip for passing signals. The signals on the first and second microstrips are such that the electromagnetic forces produced by each one are canceled out by the other. By canceling out the electromagnetic forces, undesirable coupling between microstrips that cross and between microstrips and the substrate are minimized, thereby allowing inexpensive substrates such as silicon to be used.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: February 14, 2006
    Assignee: M/A-Com, Inc.
    Inventors: Nitin Jain, Jean-Pierre Lanteri, Noyan Kinayman
  • Patent number: 6987984
    Abstract: A high-frequency switch module comprising one band-separating circuit and two switch circuits, the first switch circuit being connected to one circuit separated by the band-separating circuit, and the second switch circuit being connected to the other circuit thereof; the first switch circuit being a circuit for switching a transmission system and a reception system for a first transmitting and receiving system; and the second switch circuit being a circuit for switching a transmission system and a reception system for a second transmitting and receiving system and a transmission system and a reception system for a third transmitting and receiving system.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: January 17, 2006
    Assignee: Hitachi Metals, Ltd.
    Inventors: Shigeru Kemmochi, Mitsuhiro Watanabe, Hiroyuki Tai, Tsuyoshi Taketa, Toshihiko Tanaka
  • Patent number: 6973330
    Abstract: According to one embodiment of the invention, a compact wireless modem card placement in compliance with thickness requirement of type II PCMCIA standard and type II Compact Flash form factor standard is provided which includes a first side and a second side. The first side has a height clearance of approximately 2 mm. The second side, which is opposite the first side, has a height clearance of approximately 1.45 mm. In one embodiment, those components with a height greater than 1.4 mm are placed on the first side of the card. The first side of the card includes a radio-frequency transmitter (RFT) chip located at the lower left of the first side. The RFT chip performs signal processing functions to up-convert baseband signals received from a mobile station modem (MSM) chip to radio-frequency signals. The first side also includes a radio-frequency (RF) surface acoustic wave (SAW) filter located above and to the left of the RFT chip.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: December 6, 2005
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Christopher Peter Wieck
  • Patent number: 6972637
    Abstract: Briefly, in accordance with one embodiment of the invention, a combiner may include transmission lines to couple a receive port and a transmit port to an antenna at a common junction. Shunt admittance elements may be utilized at the transmit and the receive ports to isolate one of the transmit and the receive ports from the antenna by shunting the at least one of the transmit and the receive ports to a power supply potential such as a ground reference. During a transmit mode, the shunt admittance element at the receive port may shunt the receive port to the power supply potential, thereby isolating the receive port from the antenna. During a receive mode the shunt admittance element at the transmit port may shunt the transmit port to the power supply potential, thereby isolating the transmit port from the antenna.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: December 6, 2005
    Assignee: Intel Corporation
    Inventor: Med A. Nation
  • Patent number: 6927647
    Abstract: A dual channel, RF switch with broadband frequency response is provided wherein an RF signal input to a transformer is provided to a first and second biasing circuit. Each biasing circuit includes one or more DC blocking capacitors and a biasing PIN diode. Thus the biasing circuit provides an RF output to an output port. A biasing circuit control signal selectively controls each biasing circuit. When a biasing circuit is biased, it presents a very low resistance to the output load, while in an unbiased condition; the biasing circuit provides a very high resistance or impedance to the output load. The PIN diode provides for a biasing element through which the RF signal does not flow.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: August 9, 2005
    Inventors: Ernesto G. Starri, David V. Kane
  • Patent number: 6917258
    Abstract: A high frequency switch configured particularly with FET switches. One end of second FET switch is connected between I/O port and reception port and the other end is ground. A parallel unit of strip line and capacitor is connected between second FET switch and I/O port. This parallel unit has the electrical length equivalent to ΒΌ wavelength of the high frequency signal input from transmission port.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: July 12, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kushitani, Yasushi Nagata, Takeo Yasuho
  • Patent number: 6909885
    Abstract: An RF modulator/switch selectably couples a locally generated and conducted RF signal or an antenna RF signal to a broadcast radio receiver. A local RF input receives the conducted RF signal. An antenna RF input receives the antenna RF signal in response to a radiated RF broadcast in a broadcast band. A resonant network has a first node coupled to the antenna RF input and has a resonant frequency corresponding to the broadcast band. A first relay has a first output selectably coupled to either the antenna RF input or a second node of the resonant network. A second relay has a second output selectably coupled to either the local RF input or the first output of the first relay. When the second relay selects the local RF input then the first relay selects the second node of the resonant network and when the second relay selects the first output of the first relay then the first relay selects the antenna RF input.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: June 21, 2005
    Assignee: Visteon Global Technologies, Inc.
    Inventors: John Francis Kennedy, Edmund Joe Tillo
  • Patent number: 6903623
    Abstract: A balanced line switching apparatus that provides high isolation at an expense of a marginal increase of loss. Practical implementation can give as much as 40 dB isolation in a single stage.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: June 7, 2005
    Assignee: Anokiwave, Inc.
    Inventor: Nitin Jain
  • Patent number: 6897738
    Abstract: A high-frequency switch includes a transmission terminal, an antenna terminal, a reception terminal, and a voltage-control terminal; a first diode, the cathode thereof being electrically connected to the transmission terminal, and the anode being electrically connected to the antenna terminal; a first transmission line, electrically connected between the antenna terminal and the reception terminal; a second diode, the cathode thereof being electrically connected to the reception terminal, and the anode being electrically connected to the voltage-control terminal; a second transmission line, one end thereof being electrically connected to the transmission terminal, and the other end being connected to ground; and a capacitor, electrically connected between the voltage-control terminal and ground. The above high-frequency switch can be miniaturized and has superior performance.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: May 24, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsuhide Kato
  • Patent number: 6882014
    Abstract: A protection circuit for MOS components. In the protection circuit, a bypass PMOS transistor has a gate, a source and a substrate, all coupled to a first voltage node and a drain coupled to a gate of a MOS component. A bypass NMOS transistor has a gate, a source and a substrate, all coupled to a second voltage node and a drain coupled to the gate of the MOS component. When positive charges are accumulated on the gate of the MOS component due to an antenna effect, the bypass PMOS transistor dissipates the positive charges to the first voltage node. On the contrary, when negative charges are accumulated on the gate of the MOS component due to antenna effect, the bypass NMOS transistor dissipates the negative charges to the second voltage node.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: April 19, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chih-Ping Tan
  • Patent number: 6844793
    Abstract: A circuit is provided where impedance converters (41-48) are provided such that active components (P1 to P8) can be switched off without power from the other active components leaking away through those components which are switched off.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: January 18, 2005
    Assignee: Andrew Corporation
    Inventor: Peter Kenington
  • Publication number: 20040246067
    Abstract: A balanced line switching apparatus that provides high isolation at an expense of a marginal increase of loss. Practical implementation can give as much as 40 dB isolation in a single stage.
    Type: Application
    Filed: June 9, 2003
    Publication date: December 9, 2004
    Inventor: Nitin Jain
  • Patent number: 6822531
    Abstract: Switchable path length coupler/dividers. Coupler/divider operation over multiple frequency bands is provided by using switchable path lengths. In one implementation, a Wilkinson-style device with switches to select different path lengths and therefore operating frequencies. In a rat-race style device, switches select races of different lengths, and therefore operating frequencies.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: November 23, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Brian W. Carlson
  • Patent number: 6819201
    Abstract: A high speed switching apparatus comprises first and second parallel balanced lines each directed from an input line end to an output line end and adapted to receive equal and opposite currents to provide balanced operation. Third and fourth parallel balanced lines are spaced apart one from the other and each directed from an input line end to an output line end and adapted to receive equal and opposite currents to provide balanced operation. A first switch is coupled between the output end of the first line and the input end of the third line, and operative in a first high impedance off state and a second low impedance on state. A second switch is coupled between the output end of the second line and the input end of the fourth line, and operative in a first high impedance off state and a second low impedance on state.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: November 16, 2004
    Assignee: M/A-Com
    Inventor: Nitin Jain
  • Patent number: 6801108
    Abstract: The present invention provides a millimeter-wave passive FET switch by using impedance transformation network to transfer the effective capacitance seen from the drain to source of an FET at off-state to low impedance, while transfer low impedance seen at on-state to high impedance. Since both on-state and off-state are transferred to high impedance, and low impedance respectively, a high-performance switch can be achieved. Since the size of the transformation network is small, the performance of the switch can be promoted with low cost.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: October 5, 2004
    Assignee: Taiwan University
    Inventors: Huei Wang, Yu-Jiu Wang, Kun-You Lin
  • Publication number: 20040189420
    Abstract: A high-frequency switch having two input terminals and two output terminals of which a broad pass band is required has (i) a circuit board that has two input electrodes along one side and two output electrodes along another side, and (ii) four PIN diodes mounted on this circuit board. Each side of the quadrangle made by connecting the input electrodes and the output electrodes is not parallel to the corresponding side of the quadrangle made by connecting electrodes for mounting the PIN diodes. Each side and the corresponding side form an angle other than 180°. This structure can provide a high-frequency switch capable of reducing a transmission loss in the paths and facilitating impedance matching.
    Type: Application
    Filed: March 24, 2004
    Publication date: September 30, 2004
    Inventors: Yutaka Taguchi, Yuki Satoh
  • Patent number: 6798314
    Abstract: Briefly, in accordance with one embodiment of the invention, a combiner may include transmission lines to couple a receive port and a transmit port to an antenna at a common junction. Shunt admittance elements may be utilized at the transmit and the receive ports to isolate one of the transmit and the receive ports from the antenna by shunting the at least one of the transmit and the receive ports to a power supply potential such as a ground reference. During a transmit mode, the shunt admittance element at the receive port may shunt the receive port to the power supply potential, thereby isolating the receive port from the antenna. During a receive mode the shunt admittance element at the transmit port may shunt the transmit port to the power supply potential, thereby isolating the transmit port from the antenna.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: September 28, 2004
    Assignee: Intel Corporation
    Inventor: Med A. Nation
  • Publication number: 20040160290
    Abstract: A switch matrix including a plurality of microstrip pairs arranged to form a grid and switches to couple the microstrip pairs where they cross. Each microstrip pair includes a first microstrip and a second microstrip for passing signals. The signals on the first and second microstrips are such that the electromagnetic forces produced by each one are canceled out by the other. By canceling out the electromagnetic forces, undesirable coupling between microstrips that cross and between microstrips and the substrate are minimized, thereby allowing inexpensive substrates such as silicon to be used.
    Type: Application
    Filed: February 19, 2003
    Publication date: August 19, 2004
    Inventors: Nitin Jain, Jean-Pierre Lanteri, Noyan Kinayman
  • Patent number: 6768898
    Abstract: A composite high frequency component which can be used in three different communication systems and a mobile communication apparatus which includes the same are provided. The composite high frequency component includes a first high frequency switch having a first common port and first, second, and third communication ports. The first communication port is connected to the transmitting sections of first and second communication systems. The second communication port is connected to a receiving section of the first communication system. The third communication port is connected to a receiving section of the second communication system. The composite high frequency component also includes a second high frequency switch having a second common port and fourth and fifth communication ports. The fourth communication port is connected to a transmitting section of a third communication system. The fifth communication port is connected to a receiving section of the third communication system.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: July 27, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Koji Furutani, Norio Nakajima
  • Patent number: 6765454
    Abstract: A semiconductor device includes a switching element, for example, a Schottky barrier diode, which controls transmission/cutoff of a signal transmitted between two portions of a transmission line. An anode electrode of the switching element is interposed between the two portions of the transmission line and the longitudinal direction of the anode electrode is aligned with the longitudinal direction of the transmission line. A cathode electrode of the switching element is disposed on at least one of the widthwise sides of the anode electrode, and is connected to ground.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: July 20, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiro Tsukahara
  • Publication number: 20040124944
    Abstract: Briefly, in accordance with one embodiment of the invention, a combiner may include transmission lines to couple a receive port and a transmit port to an antenna at a common junction. Shunt admittance elements may be utilized at the transmit and the receive ports to isolate one of the transmit and the receive ports from the antenna by shunting the at least one of the transmit and the receive ports to a power supply potential such as a ground reference. During a transmit mode, the shunt admittance element at the receive port may shunt the receive port to the power supply potential, thereby isolating the receive port from the antenna. During a receive mode the shunt admittance element at the transmit port may shunt the transmit port to the power supply potential, thereby isolating the transmit port from the antenna.
    Type: Application
    Filed: December 26, 2002
    Publication date: July 1, 2004
    Inventor: Med A. Nation
  • Publication number: 20040095205
    Abstract: A broadband multiple input, multiple output switch matrix. The switch matrix comprises multiple crosspoint switch element tiles. Each tile comprises RF MEMS switches disposed on a substrate to provide a crosspoint switching capability. The crosspoint switch element tiles are disposed in a flip-chip manner on the upper side of an RF substrate that provides RF connectivity between the various crosspoint switch element tiles. A bias line substrate disposed on the lower side of the RF substrate receives control signals for the crosspoint switch element tiles and routes the signals through the RF substrate using vias in the RF substrate.
    Type: Application
    Filed: April 3, 2003
    Publication date: May 20, 2004
    Applicant: HRL LABORATORIES, LLC
    Inventors: James H. Schaffner, Robert Y. Loo
  • Patent number: 6734761
    Abstract: A radio-frequency input stage is specified and has a radio-frequency coupling element which couples an air interface to the inputs of parallel-connected radio-frequency resonant circuits. In order to allow a circuit configuration which has no switches and is of simple construction, only one capacitance, which forms a low-pass filter, is provided in the coupling element, and splits an antenna signal between the various bands, in the process suppressing influences from bands other than that which has been selected. The radio-frequency input stage can be used, for example, in three-band TV tuners.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: May 11, 2004
    Assignee: Infineon Technologies AG
    Inventor: Sanggyu Sim
  • Patent number: 6731184
    Abstract: A high frequency switching component for being connected to a transmission circuit, a reception circuit, and an antenna to be used for switching to either a state in which the transmission circuit is connected to the antenna, or a state in which the reception circuit is connected to the antenna, comprising: a multilayer circuit board, on which there is formed a circuit including: a transmission circuit terminal to be connected to the transmission circuit; a reception circuit terminal to be connected to the reception circuit; an antenna terminal to be connected to be the antenna; a ground terminal; a first diode whose anode is connected to the transmission circuit terminal and the cathode thereof is connected to the antenna terminal; a second diode whose anode is connected to the reception circuit terminal and the cathode thereof is connected to the ground terminal; a signal line for connecting the transmission circuit terminal, the reception circuit terminal, and the antenna terminal via the first diode; and
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: May 4, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hideki Muto, Koji Tanaka, Koji Furutani, Takahiro Watanabe, Takanori Uejima, Norio Nakajima
  • Publication number: 20040021527
    Abstract: Switchable path length coupler/dividers. Coupler/divider operation over multiple frequency bands is provided by using switchable path lengths. In one implementation, a Wilkinson-style device with switches to select different path lengths and therefore operating frequencies. In a rat-race style device, switches select races of different lengths, and therefore operating frequencies.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Inventor: Brian W. Carlson
  • Publication number: 20040012460
    Abstract: Disclosed is a micromirror actuator having a two-axis freedom and actuated by an electromagnetic force and fabrication method thereof. The micromirror actuator includes a substrate, a frame configured to be connected with the substrate, a micromirror configured to be connected with the frame, first and second torsion bars connecting the substrate with the frame, third and fourth torsion bars connecting the frame with the micromirror, four interdigitated cantilevers configured to be connected to the substrate, four connecting bars connecting the four interdigitated cantilevers with the frame, interconnection lines formed on the four interdigitated cantilevers and the micromirror, and first and second magnets installed outside the substrate. since the micromirror actuator of the present invention can be actuated around two axes by electromagnetic force generated by electromagnetic field applied from outside, it is possible to obtain large force and large rotational angle.
    Type: Application
    Filed: January 15, 2003
    Publication date: January 22, 2004
    Applicant: Korea Advanced Institute of Science and Technology
    Inventors: Il-Joo Cho, Kwang-Seok Yun, Euisik Yoon
  • Publication number: 20040012459
    Abstract: A high speed switching apparatus comprises first and second parallel balanced lines each directed from an input line end to an output line end and and adapted to receive equal and opposite currents to provide balanced operation. Third and fourth parallel balanced lines are spaced apart one from the other and each directed from an input line end to an output line end and adapted to receive equal and opposite currents to provide balanced operation. A first switch is coupled between the output end of the first line and the input end of the third line, and operative in a first high impedance off state and a second low impedance on state. A second switch is coupled between the output end of the second line and the input end of the fourth line, and operative in a first high impedance off state and a second low impedance on state.
    Type: Application
    Filed: July 19, 2002
    Publication date: January 22, 2004
    Inventor: Nitin Jain
  • Patent number: 6677688
    Abstract: A scalable N×M switching matrix architecture is characterized by a readily calculable number of crossover locations and comprises one or more single pole, N throw (“SPNT”) switches and, for each such switch, an N state impedance converter/amplitude compensation network.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: January 13, 2004
    Assignee: Tyco Electronics Corporation
    Inventors: Andrew Freeston, Paul Schwab
  • Publication number: 20030234699
    Abstract: A high-frequency switch comprises: a substrate; a main line electrode provided between two terminals; a stub line electrode with one end thereof connected to the side edge of the main line electrode and the other end thereof grounded; and a ground electrode provided adjacent to the stub line electrode in the width direction thereof; wherein the substrate has a semiconductor activation layer which extends to below the stub line electrode and the ground electrode between at least one side edge of the stub line electrode and the ground electrode; and wherein a gate electrode which extends in the longitudinal direction of the stub line electrode is provided on the semiconductor activation layer between the stub line electrode and the ground electrode, thereby forming an FET structure, thus providing a high-frequency switch and electronic device therewith, capable of using high frequencies, having reduced insertion loss, and high signal cutoff capabilities.
    Type: Application
    Filed: June 23, 2003
    Publication date: December 25, 2003
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Hiroyuki Nakano
  • Patent number: 6664870
    Abstract: A phase shifter for changing the phase of a signal fed thereto. The phase shifter includes an inductive reactance element and a capacitive reactance element having one electrode connected to either the input or the output port and a pair of switching elements. A first switching element thereof switches between a conducting state and a non-conductive state when the control signal changes from a first logic state to a second logic state while a second switching element thereof switches between a non-conducting state and a conductive state when the control signal changes from the first logic state to the second logic state.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: December 16, 2003
    Assignee: Raytheon Company
    Inventors: James Lampen, Jaiyoung Park
  • Patent number: 6650199
    Abstract: An RF A/B switch associated with a receiver has first and second inputs and an output. A first diode circuit includes a plurality of diodes and an impedance network coupled between the first input and the output. A second diode circuit includes a plurality of diodes and an impedance network coupled between the second input and the output. A controller establishes a common series biasing current through at least one of the diodes in each of the first and second diode circuits. The common series biasing current biases one of the first and second diode circuits so as to configure a respective one of the impedance networks in a low pass filter configuration that couples a signal on one of the first and second inputs to the output, and the common series biasing current biases the other of the first and second diode circuits in a blocking configuration so as to block a signal on the other of the first and second inputs from the output.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: November 18, 2003
    Assignee: Zenith Electronics Corporation
    Inventor: Pierre Dobrovolny
  • Publication number: 20030206079
    Abstract: A high-frequency switch includes a transmission terminal, an antenna terminal, a reception terminal, and a voltage-control terminal; a first diode, the cathode thereof being electrically connected to the transmission terminal, and the anode being electrically connected to the antenna terminal; a first transmission line, electrically connected between the antenna terminal and the reception terminal; a second diode, the cathode thereof being electrically connected to the reception terminal, and the anode being electrically connected to the voltage-control terminal; a second transmission line, one end thereof being electrically connected to the transmission terminal, and the other end being connected to ground; and a capacitor, electrically connected between the voltage-control terminal and ground. The above high-frequency switch can be miniaturized and has superior performance.
    Type: Application
    Filed: April 28, 2003
    Publication date: November 6, 2003
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Mitsuhide Kato
  • Patent number: 6639489
    Abstract: A high-frequency module prevents distortion in first and second diodes of a high-frequency switch in a communication system which is not selected without providing a negative power source, and a communication apparatus includes such a high-frequency module. The high-frequency module includes a diplexer having inductors and capacitors, and high-frequency switches including first and second diodes, transmission lines, inductors, and capacitors.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: October 28, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Nobuyoshi Okuda, Tetsuro Harada
  • Patent number: 6633206
    Abstract: A high-frequency switch includes a transmission terminal, an antenna terminal, a reception terminal, and a voltage-control terminal; a first diode, the cathode thereof being electrically connected to the transmission terminal, and the anode being electrically connected to the antenna terminal; a first transmission line, electrically connected between the antenna terminal and the reception terminal; a second diode, the cathode thereof being electrically connected to the reception terminal, and the anode being electrically connected to the voltage-control terminal; a second transmission line, one end thereof being electrically connected to the transmission terminal, and the other end being connected to ground; and a capacitor, electrically connected between the voltage-control terminal and ground. The above high-frequency switch can be miniaturized and has superior performance.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: October 14, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsuhide Kato
  • Publication number: 20030112102
    Abstract: The present invention provides a millimeter-wave passive FET switch by using impedance transformation network to transfer the effective capacitance seen from the drain to source of an FET at off-state to low impedance, while transfer low impedance seen at on-state to high impedance. Since both on-state and off-state are transferred to high impedance, and low impedance respectively, a high-performance switch can be achieved. Since the size of the transformation network is small, the performance of the switch can be promoted with low cost.
    Type: Application
    Filed: December 14, 2001
    Publication date: June 19, 2003
    Applicant: Taiwan University
    Inventors: Huei Wang, Yu-Jiu Wang, Kun-You Lin
  • Publication number: 20030076190
    Abstract: Switching apparatus and method in an array having plural inputs and plural outputs crossing each other at a plurality of crosspoints. First and second tandem switches are disposed at each crosspoint, between a respective input and a respective output. A shunt capacitor is coupled to each first and second switch and to ground, to short crosstalk in the inputs and outputs. A method of making a semiconductor switch array is also provided.
    Type: Application
    Filed: November 27, 2001
    Publication date: April 24, 2003
    Inventors: William L. Clarke, Jules D. Levine, Stan Freske
  • Patent number: 6552626
    Abstract: A high power PIN diode single pole double throw (SPDT) switch for use in radar systems transmitting at over 50 watts of power. These systems require a switch that will provide adequate isolation for the sensitive amplifier circuits in the receiver subsystem of the radar from the high power transmit pulses in the event there is a bias failure such that the PIN diodes are at zero bias. By utilizing one single pole single throw (SPST) switch assembly between the transmitter and the antenna and at least two SPST switch assemblies between the antenna and the receiver, this isolation is achieved.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: April 22, 2003
    Assignee: Raytheon Company
    Inventors: Thomas M. Sharpe, Donald A. Charlton, Richard W. Burns
  • Publication number: 20030071698
    Abstract: An RF A/B switch associated with a receiver has first and second inputs and an output. A first diode circuit includes a plurality of diodes and an impedance network coupled between the first input and the output. A second diode circuit includes a plurality of diodes and an impedance network coupled between the second input and the output. A controller establishes a common series biasing current through at least one of the diodes in each of the first and second diode circuits. The common series biasing current biases one of the first and second diode circuits so as to configure a respective one of the impedance networks in a low pass filter configuration that couples a signal on one of the first and second inputs to the output, and the common series biasing current biases the other of the first and second diode circuits in a blocking configuration so as to block a signal on the other of the first and second inputs from the output.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 17, 2003
    Inventor: Pierre Dobrovolny
  • Patent number: 6545563
    Abstract: A transmit/receive module including digitally controlled analog circuits is described. The digital circuits use a logic family adapted for use with analog monolithic integrated circuits. The disclosure also describes a preferred process to provide digital and analog microwave circuits on a common semiconductor substrate.
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: April 8, 2003
    Assignee: Raytheon Company
    Inventor: Irl W. Smith
  • Patent number: 6529095
    Abstract: The cost of an antenna duplexer is reduced by decreasing the number of parts for antenna switching, and the size thereof is reduced by reducing the space of a printed-circuit board on which a receiving circuit and a transmission circuit are formed. The antenna duplexer includes an antenna, a transmission circuit, a receiving circuit, a first transmission line for connecting the transmission circuit to the antenna, and a second transmission line for connecting the receiving circuit to the antenna, wherein the length of the first transmission line is set to be approximately a quarter of the wavelength of the transmission frequency, and the length of the second transmission line is set to be approximately a quarter of the wavelength of the receiving frequency.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: March 4, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventor: Susumu Kanno
  • Publication number: 20030030509
    Abstract: A transmission lines arrangement comprising a first plurality of transmission lines each transmission line having an effective characteristic impedance. The arrangement further comprises a second plurality of transmission lines, said first plurality of transmission lines being coupled to a plurality of switching elements. The plurality of switching elements are conceived to redirect an input signal from one transmission line of the first plurality of transmission lines to at least one transmission line of the second plurality of transmission lines. The arrangement is characterized in that each of the switching elements of the plurality of switching elements have a relatively high input impedance in comparison with the effective characteristic impedance and a relatively high output impedance in comparison with the effective characteristic impedance.
    Type: Application
    Filed: July 18, 2002
    Publication date: February 13, 2003
    Inventors: Hugo Veenstra, Edwin Van Der Heijden, Mihai Adrian Tiberiu Sanduleanu
  • Patent number: 6518822
    Abstract: In a high frequency switch, first and second diodes are respectively connected between first and second ports and between first and third ports so that they are directed in the same direction with respect to the first port. Coupling capacitors are connected on both sides of the respective diodes. Distributed constant lines and capacitors are connected between points of connection between the respective diodes and the corresponding capacitors, and reference potentials. Control voltage terminals are connected to points of connection between the distributed constant lines and the capacitors. A distributed constant line and a capacitor are connected between the first port and a reference potential. A fixed voltage terminal is connected through a resistor to a point of connection between the distributed constant line and the capacitor.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: February 11, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Mitsuhide Kato, Teruhisa Tsuru
  • Patent number: 6512409
    Abstract: A signal switching circuit has first to fourth diode pairs each comprising two series-connected diodes disposed respectively between a first input terminal and a first output terminal, between a second input terminal and the first output terminal, between the first input terminal and the second output terminal, and between the second input terminal and the second output terminal, and first to fourth capacitor circuits connected respectively between diode-to-diode connection points in the diode pairs and the ground. The first or second diode pair is rendered conductive in an alternative manner. Likewise, the third or fourth diode pair is rendered conductive in an alternative manner. A low pass filter for passing therethrough the corresponding first or second signal uses residual inductance in each of the diode pairs thus rendered conductive and the associated capacitor circuit.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: January 28, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventor: Toshiharu Yoneda