Abstract: The present disclosure is directed to a receiver for Automatic Dependent Surveillance Broadcast (ADS-B) verification of a target aircraft including a first input for receiving flight tracking information from a target aircraft that indicates positional information of the target aircraft. The receiver further includes a second input for receiving positional and heading information indicating the location and orientation of a multi-element array antenna configured to be attached to the receiver, and a processing module that generates a measured bearing derived from angle of arrival data, and an expected bearing of the target aircraft derived from the indicated positional information of the target aircraft and the positional and heading information defining the receiver location and orientation. A comparator compares the expected bearing to the measured bearing and verifies the ADS-B flight tracking information of the target aircraft and outputs an indication of authenticity based on the verification.

Abstract: The present application relates to a reconfigurable analog front-end circuit and a reconfigurable Ethernet transceiver with a reconfigurable analog front-end circuit. The circuit is reconfigurable using the at least one signal-path switching element controlled by a mode signal to operationally establish a first or a second signal path. The first signal path comprises an optional first signal-conditioning section and a shared ADC. The second signal path comprises an optional second signal-conditioning section, an upstream ADC and the shared ADC. The signal paths are selectively switched in response to a mode signal.

Abstract: Described is an apparatus which comprises: a Variable Gain Amplifier (VGA); a set of samplers to sample data output from the VGA according to a clock signal; and a Clock Data Recovery (CDR) circuit to adjust phase of the clock signal such that magnitude of a first post-cursor signal associated with the sampled data is substantially half of a magnitude of a primary cursor tap associated with the sampled data.

Abstract: Embodiments of the disclosure relate to an analog-to-digital converter (ADC) with gain adjustment. One embodiment of an ADC with autonomous gain adjustment includes an ADC, a gain stage coupled to the ADC, a scaler coupled to the ADC, and a control logic that may be configured to configure the gain of the gain stage responsive to measured output of the ADC.

Abstract: A broadcast receiving apparatus is provided, which includes an input that receives input signals, a signal processing unit which amplifies only a signal in a band that corresponds to a selected channel from among the input signals, and automatic gain controls with a first sensitivity so that the amplified signal maintains a preset level value, and then outputs the result, a demodulator which demodulates the signals output from the signal processing unit into digital transport stream signals, a controller configured to control the signal processing unit so that the signal is automatic gain controlled with a second sensitivity less sensitive than the first sensitivity, when the selected channel is an ultra high frequency (UHF) range signal.

Abstract: In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths and a controller. The plurality of processing paths may include a static processing path configured to generate a first digital signal based on an analog input signal and a dynamic processing path configured to generate a second digital signal based on the analog input signal, wherein a parameter of the dynamic processing path is determined based on a characteristic of the analog input signal. The controller may be configured to select the first digital signal as a digital output signal of the processing system when a change is occurring to the characteristic and select the second digital signal as the digital output signal in the absence of change occurring to the characteristic.

Abstract: A scalable dynamic range analog-to-digital converter. In one instance, a method of scaling a dynamic range of an analog-to-digital converter is provided. The method includes operating the analog-to-digital converter at a first dynamic range. The method also includes receiving a radio frequency signal and detecting an on-channel signal level of the radio frequency signal. The method also includes when the on-channel signal level is above an on-channel threshold, operating the analog-to-digital converter at a second dynamic range. The method also includes when the on-channel signal level is below the on-channel threshold, operating the analog-to-digital converter at the first dynamic range.

Abstract: Methods and systems are provided for gain control during communications. A first electronic device may communicated data to a second electronic device; may monitor conditions and/or parameters affecting estimated reception performance at the second electronic device; and may communicated to the second electronic device, via a connection separate from and different than a connection used in communicating the data, information relating to the monitored conditions, to enable adjusting functions relating to reception of the data at the second electronic device. Based on the received information, at least one reception related function in the second electronic device may be controlled. The controlling may include determining, based on the received information, adjustments to the at least one reception related function or to a related parameter. The at least one reception related function may include applying gain to at least a portion of signals received by the second electronic device.

Abstract: A method of receiving an RF signal is applied to a receiving circuit of a wireless communication system and amplifies the RF signals according to an analog gain. The RF signal includes data signals and interference signals. The method includes steps of: employing a low noise amplifier (LNA) to amplify the RF signal according to a first gain to generate an amplified RF signal, the first gain being associated with a first bias signal; detecting the amplified RF signal in an RF band to generate a control signal corresponding to the power of the amplified RF signal, the control signal being an analog signal; providing the first bias signal to the LNA according to the control signal; down-converting the amplified RF signal to generate an intermediate frequency or baseband signal; and filtering the intermediate frequency or baseband signal to filter out the interference signal and thus obtain the data signal.

Abstract: The disclosure includes a successive approximation register (SAR) analog to digital converter (ADC). The SAR ADC includes a sampling network to store a sample of an analog signal. The SAR ADC also includes a comparator to successively compare the sample to reference values to determine a digital value corresponding to the sample of the analog signal. The comparator employs a plurality of comparator preamplifiers. The comparator also includes a programmable trim filter. The programmable trim filter is selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with a preamplifier settling time subceeding a preamplifier settling threshold.

Abstract: A method is provided including separating a first file into a first plurality of instrument tracks and a second file into a second plurality of instrument tracks, wherein each instrument track of each of the first plurality and second plurality corresponds to a type of instrument; selecting a first instrument track from the first plurality of instrument tracks and a second instrument track from the second plurality of instrument tracks based at least on the type of instrument corresponding to the first instrument track and the second instrument track; fading out other instrument tracks from the first plurality of instrument tracks; performing a crossfade between the first instrument track and the second instrument track; and fading in other instrument tracks from the second plurality of instrument tracks.

Abstract: Improved systems and methods for processing and recording audio received from one or more wired or wireless devices. In one aspect, the dynamic range of an analog-to-digital conversion system is extended. In another aspect, processes for generating a timecode, displaying and/or freezing a timecode display, and displaying an electronic timecode slate. Displaying a timecode slate may include rotating the orientation of the timecode display one hundred and eighty degrees to allow the timecode display to appear upright to individuals and/or equipment viewing and/or recording same. Displaying a timecode slate may also include an audible tone for synchronization of audio and video recordings.

Abstract: A method for operating a User Equipment (UE) is provided to minimize performance degradation due to a difference between a transmit power for D2B communication and a transmit power for Device to Device (D2D) communication. The method includes transmitting a signal for D2B communication to a Base Station (BS) and a signal for D2D communication to another UE in a first time period, and configuration for the D2D communication, when it is determined there is a difference between a transmit power for the D2B communication and a transmit power for the D2D communication.

Abstract: Residue generation systems for use in continuous-time and hybrid ADCs are described. An exemplary system includes a filter, e.g. a FIR filter, for generating a filtered analog output based on an analog input, a quantizer for generating a digital input to a feedforward DAC based on the filtered analog output generated by the filter, a feedforward DAC for generating a feedforward path analog output based on the digital input generated by the quantizer, and a subtractor for generating a residue signal based on the feedforward path analog output. Providing a filter that filters the analog input before it is quantized advantageously allows blockers to be attenuated before they are sampled and aliased by the quantizer. At least some of the residue generation systems described herein may be implemented with relatively small design and power dissipation overheads.

Abstract: In an audio processing device having a first output route and a second output route, to be able to reproduce the same audio signal as the first output rote at the second output route. A microcomputer 2 connects a Zone2 reproduction device 6 with a DAC 10 for a surround back by a switch 17 and the DAC 10 for the surround back with a surround back analog output terminal 15 by a switch 18 in case that the DSD data is reproduced at a Zone2 output route.

Abstract: A system and method of adjusting digital audio sampling used with wideband audio includes: performing audio sampling on an analog audio signal at an initial sampling rate and an initial bit rate over a wideband audio frequency range; generating a digital audio signal based on the audio sampling; detecting a qualitative error rate between the analog audio signal and the digital audio signal; and decreasing the initial sampling rate, the initial bit rate, or both for sampling subsequent analog audio when the qualitative error is below a threshold.

Abstract: An electronic device is provided. The electronic device includes a processor, a memory configured to connect to the processor, and an embedded secure element (eSE) configured to connect to the processor over a physical channel to receive secure data sent by the processor over the physical channel, and store the secure data.

Abstract: A data calculator repeatedly calculates electric power of a delayed transmission signal and a multiplication value of a complex conjugate of the delayed transmission signal and a feedback signal. A memory stores, for each delayed electric power address corresponding to the electric power, a first total value that is the total of electric power of the delayed transmission signal and a second total value that is the total of the multiplication value. A range adjuster adjusts the upper limit of a determination reference range according to the maximum reference address. When a determiner determines that the number of repeats of the data calculator is sufficient based on the determination reference range, a vector calculator calculates a distortion correction vector based on a distortion vector calculated from the ratio between the first total value and the second total value. An updater updates the distortion correction vector stored in a look-up table based on the distortion correction vector.

Abstract: A pickup apparatus includes a digital signal processor, at least one microphone, multiple amplifiers, and multiple analog-to-digital converters (ADCs), where each microphone is configured to receive an audio signal, and send the audio signal to an amplifier corresponding to the microphone, each amplifier is configured to amplify the received audio signal, and send the amplified audio signal to an analog-to-digital converter corresponding to the amplifier, each analog-to-digital converter is configured to convert the received audio signal into a digital signal, and send the digital signal to the digital signal processor, and the digital signal processor is configured to receive multiple digital signals sent by the multiple analog-to-digital converters, determine an unclipped digital signal from the multiple received digital signals, and determine an output signal according to a gain value corresponding to the unclipped digital signal.

Abstract: A method is provided including separating a first file into a first plurality of instrument tracks and a second file into a second plurality of instrument tracks, wherein each instrument track of each of the first plurality and second plurality corresponds to a type of instrument; selecting a first instrument track from the first plurality of instrument tracks and a second instrument track from the second plurality of instrument tracks based at least on the type of instrument corresponding to the first instrument track and the second instrument track; fading out other instrument tracks from the first plurality of instrument tracks; performing a crossfade between the first instrument track and the second instrument track; and fading in other instrument tracks from the second plurality of instrument tracks.

Abstract: A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal.

Abstract: The disclosure provides for an article including a substrate, an environmental barrier coating (EBC), a bondcoat and a boron source. The substrate may include a silicon-including ceramic material. The EBC may be disposed over the substrate, and the bondcoat may disposed between the substrate and the EBC. The bondcoat may include silicon. The boron source may be disposed within the article to provide an effective amount of boron to form an oxide including silicon and at least 0.1 weight percent boron during exposure of the bondcoat to an oxidizing environment at a temperature greater than 900 degrees Celsius. The oxide may be a borosilicate glass that is substantially devitrification resistant to prevent spallation of the EBC and thereby enhance the temperature capability of the article.

Abstract: In accordance with embodiments of the present disclosure, a processing system may include multiple selectable processing paths for processing an analog signal in order to reduce noise, increase dynamic range, and mask audio artifacts associated with a change in noise floor. Techniques are employed to transition between processing paths and calibrate operational parameters of the two paths in order to reduce or eliminate artifacts caused by switching between processing paths.

Abstract: An apparatus includes a plurality of delay elements, a plurality of multipliers and an accumulator to form a biquad stage; and a precision logic circuit. The biquad stage includes feedback paths; at least one feedback path has an adjustable bit precision; and the precision logic is adapted to regulate the bit precision of the feedback path(s) based at least in part on at least one parameter that is associated with the biquad stage.

Abstract: A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal.

Abstract: A dielectric comprises a matrix and a plurality of isolated, ionomeric domains, defined as micelles herein, distributed within the matrix. A capacitor is comprised of the dielectric and two electrodes. A method incorporates the capacitor into a circuit for an energy storage device, especially for applications requiring both high energy density and high power density. The method includes both rapid charging and rapid discharging of the energy storage device.

Abstract: A device for removing a noise on an image using a cross-kernel type median filter includes a target pixel determination unit configured to determine whether a target pixel is a noise or not; a peripheral pixel determination unit configured to determine degrees of the noise on a peripheral pixel information of a peripheral pixel of the target pixel; and a noise removing unit configured to remove the noise of the target pixel and corrects the image by applying a cross-kernel type median filter based on the peripheral pixel information.

Abstract: During operation, a protection circuit receives an input voltage representative of current delivered by a power supply phase to a load. In one configuration, the input voltage is received as the voltage across respective drain-source nodes of a synchronous switch (low side switch) disposed in a power supply. The protection circuit selectively controls conveyance of the input voltage so that damaging transient voltages on the input voltage are not passed to a downstream sampling circuit. The sampling circuit includes a capacitor circuit to store the sample of the input voltage. During operation, the sampling circuit utilizes the input voltage conveyed by the input voltage circuit to charge the capacitor with a sample voltage representative of the current.

Abstract: A radio frequency (RF) receiver and method of controlling an RF receiver are provided. The method includes receiving an RF signal and down-converting the RF signal to a substantially baseband signal. A direct current (DC) transition is detected in a portion of the substantially baseband signal. The substantially baseband signal is then filtered using a first filter configuration at the portion of the substantially baseband signal including the DC transition and a second filter configuration at a portion of the substantially baseband signal not including the DC transition.

Abstract: A method may include processing an analog input signal to generate a first digital signal in accordance with a first analog gain, processing the analog input signal to generate a second digital signal in accordance with a second analog gain, and generating a digital output signal of the processing system from one or both of the first digital signal and the second digital signal based on a magnitude of the analog input signal and setting the first analog gain based on the magnitude of the analog input when the digital output signal is generated from the second digital signal.

Abstract: A problem in conventional semiconductor devices is that a frame rate for acquiring images cannot be increased. A semiconductor device according to one embodiment sets a slope of a ramp signal provided to an analog-to-digital converter for converting pixel signals into digital values such that it becomes large in a conversion process corresponding to short-time exposure whereas it becomes small in a conversion process corresponding to long-time exposure, sets a sweep time of the ramp signal such that it becomes short in the conversion process corresponding to the short-time exposure, whereas it becomes long in the conversion process corresponding to the long-time exposure, and generates two pieces of data such that the number of bits in a digital value corresponding to the short-time exposure will become smaller than the number of bits in the digital value corresponding to the long-time exposure.

Abstract: Various techniques are disclosed for performing non-uniformity correction (NUC) for infrared imaging devices. Intentionally blurred image frames may be obtained and processed to correct for FPN (e.g., random spatially uncorrelated FPN in one embodiment) associated with infrared sensors of the infrared imaging device. Intentionally blurred image frames may be used to distinguish between FPN associated with the infrared sensors and desired scene information. Advantageously, such techniques may be implemented without requiring the use of a shutter to perform flat field correction for the infrared imaging device.

Abstract: This document discusses, among other things, a detection circuit configured to receive an output of a window comparator over a range of input values and to measure a difference between first and second thresholds of the window comparator, and a trim circuit configured to adjust at least one of the first or second thresholds using the measured difference between the first and second thresholds.

Abstract: A solid-state imaging device includes: a pixel unit which includes a plurality of pixels arranged in rows and columns and which generates pixel signals according to an amount of incident light; a column analog-to-digital converter (ADC) which is disposed for each of the columns of the pixel unit and which performs digital conversion on each of the pixel signals output from the pixels in the column; a timing control unit which generates a control signal for controlling the digital conversion performed by the column ADC; and a logic swing and delay adjusting circuit which is disposed in a signal path for supplying the control signal from the timing control unit to the column ADC and which at least either reduces an amplitude of the control signal or delays the control signal.

Abstract: A system is provided with circuits and methods for dynamically reducing interference to maintain linear system operation and mitigate interference degradation to desired signal components. The system can include a binning subcircuit system configured to divide the digitized input signal into a plurality of spectral bins each having a power level. A power analysis subcircuit can be coupled to the binning subcircuit and configured to compare a collective power level of spectral bins to a threshold level that would produce nonlinear system operation. Based upon the collective power level exceeding the threshold level, outputting a gain control signal to a variable gain amplifier so that the system remains linear. This dynamic gain control can be applied to systems that receive and/or transmit signals. Residual interference components that degrade signal components can be dynamically removed by excision and the distortion introduced by the excision process can be reduced with equalization circuitry.

Abstract: A coordinating interface for electrophysiological signals provides inputs for ECG and intra-cardiac electrodes and provides a computer controllable processing path outputting data using a shareable digital data output. Requests received over a digital control line allow the computer to control a multiway switch and analog filter set to arbitrate among different uses of the electrophysiological signals by different devices. A single coordinating interface helps reduce interference from competing uses. Pre-stored configuration data simplifies the connection of different devices having different uses of the physiological data.

Abstract: A charge sharing circuit for generating a calibration voltage. The circuit comprises a calibration capacitor for providing at an upper terminal of the calibration capacitor the calibration voltage. The circuit further comprises a series connection of a plurality of N switches, wherein N is an integer>2, and a plurality of at least N?1 switching capacitors. Each switching capacitor is coupled to one connecting node connecting two of the N switches. One side of the series connection of the plurality of N switches is coupled to the upper terminal of the calibration capacitor and the other side of the series connection of the N switches is coupled to a fixed voltage. The circuit is configured to transmit at least two clock signals to selectively drive at least two distinct subsets of the switches. There is further provided a corresponding method and a corresponding design structure.

Abstract: A decimatorless continuous-time delta-sigma analog-to-digital receiver includes a continuous-time delta-sigma modulator (CTDSM) that receives a receiving signal and is configured to encode analog signals into digital signals; and a demodulator that receives a digital output of the CTDSM and is configured to recover information content from the receiving signal.

Abstract: A system includes an analog-to-digital converter receiving a plurality of input signals. One particular input signal has a particular analog value and the analog-to-digital converter uses a fixed reference to convert the particular analog value to a particular digital value. The analog-to-digital converter uses the particular analog value as a reference for converting the analog values of the remaining input signals.

Abstract: The application relates to digital to analogue conversion circuits having dynamic gain control. A digital variable gain element (102) may apply gain to an input digital signal (DIN) upstream of a DAC (101) to make better use of the input range of the DAC and an analogue variable gain element (103) applies a compensating analogue gain. Again controller (201) has a gain allocation module (204) for controlling the allocation of gain between said digital and analogue variable gain elements in response to changes in a signal level of the input digital audio signal. In the present invention the gain allocation module is operable in first and second modes of operation where the response to reductions in signal level is slower in the first mode than in the second mode of operation.

Abstract: An analog-to-digital converter (ATC) circuit includes a current source; a first amplifier coupled to the current source through a first discharging switch; and a second amplifier coupled to the first amplifier through a second discharging switch; wherein the first amplifier is configured to receive a residue signal of an analog input signal, upon the first discharging switch being turned on, the first amplifier amplifies the residue signal to generate an output signal and simultaneously the current source discharges the residue signal, upon the second discharging switch being turned on, the second amplifier detects when the output signal equals zero so as to determine a discharging time duration of the output signal.

Abstract: A method for adapting a mixed signal Infinite Impulse Response (IIR) Decision Feedback Equalizer (DFE) using pivot taps and monitor taps is disclosed. The method includes, for a given IIR path for a received signal, updating gain of the given IIR path using a respective pivot tap error-data correlation with a first Least Mean Square (LMS) update equation; and updating a time constant of the given IIR path using a respective monitor tap error-data correlation with a second LMS update equation.

Abstract: A comparator includes a common mode voltage sampling unit suitable for sampling a common mode voltage based on a sampling control signal; a coarse ramping voltage sampling unit suitable for sampling a coarse ramping voltage based on the sampling control signal; a preamplifier suitable for amplifying a difference between an input voltage and the sampled coarse ramping voltage to output a coarse conversion result, and amplifying a difference between a fine ramping voltage and the sampled common mode voltage to output a fine conversion result; and a signal processing unit suitable for generating the sampling control signal based on the coarse conversion result, and generating a comparison signal based on the coarse conversion result and the fine conversion result.

Abstract: Method for capturing a high dynamic range signal includes: receiving the wideband analog signal; digitizing the wideband signal by a wideband ADC; detecting N strongest sub-bands in the digitized wideband analog signal; adaptively programming N bandstop filters to block the detected N strongest sub-bands from being digitized by the wideband ADC; adjusting a gain of output signals of the N bandstop filters to amplify said output signals; digitizing the amplified output signals by the wideband ADC to obtain a first digitized signal; adaptively programming N passband filters to pass the detected N strongest sub-bands to N ADCs, respectively; digitizing the detected strongest N sub-band signals output from the N pass-band filters by the respective N ADCs to obtain a plurality of second digitized signals; and processing the first digitized signal and the plurality of second digitized signals to identify any duplicate bands.

Abstract: A method to measure and report electromagnetic radiation power includes receiving electromagnetic radiation and generating an electrical signal having a magnitude based on the power of the electromagnetic radiation. An adjustable gain may be applied to the electrical signal to generate an amplified electrical signal that may be sampled to generate a digital sample. The adjustable gain may be controlled based on the value of the digital sample and the digital sample may be associated with a gain value. One or more calibration factors may be selected based on the gain value associated with the digital sample and the selected calibration factor(s) may be used to calculate the power of the electromagnetic radiation.

Abstract: An electronic device with a touch sensor comprises: a touch screen including touch sensors defined by Tx lines and Rx lines; a touch sensing circuit that supplies a drive signal to the Tx lines and senses a voltage change in the touch sensors to output sensing data; and a noise filtering unit that profiles the type of noise in the sensing data and compensates the sensing data so that the sensing data is near the maximum threshold or the minimum threshold, which is calculated based on a average value of the previous frame, or within the range between the maximum and minimum thresholds.

Abstract: A method and arrangement for setting an effective resolution of an output signal in an incremental delta-sigma analog-to-digital conversion by an incremental delta-sigma analog-to-digital converter, includes feeding a difference between an input signal and a reference voltage signal formed in a feedback branch to a first integrator. Safeguarding the stability of multi-stage incremental delta-sigma analog-to-digital converters for large input signal ranges and not requiring direct damping of the input signal, such that a direct SNR impairment with regard to the ADC-inherent noise sources can be avoided, is achieved by a virtual reference voltage in the feedback branch of the incremental delta-sigma analog-to-digital converter. The reference voltage signal is adapted to a changing input signal range by a settable reference capacitance and a clock cycle number dependent thereon is set.

Abstract: The present invention provides a data processing system which can increase resolution and which has excellent tracking with respect to the switching of a conversion range and is small in conversion error.

Abstract: The present invention is directed to a capacitive touch system and method with auto-calibration. A driving signal generator provides driving signals to first electrodes, thereby resulting in induced signals on second electrodes. An induced signal receiver receives and processes the induced signals. The induced signals associated with at least some no-touch points are measured and pre-stored in an initial value generator, which, at the beginning of a measuring period, generates initial induced signals of the second electrodes according to the pre-stored induced signals for initializing the induced signal generator.

Abstract: A current regulator controller includes a differential amplifier that is arranged to output a current sense signal based on a differential input signal and a first stage trim signal. The current regulator controller also includes a first stage trim circuit that is arranged to provide the first stage trim signal. The current regulator controller also includes a digital-to-analog converter that is arranged to provide a set signal based on a digital input signal and a second stage trim signal. The current regulator controller also includes a second stage trim circuit that is arranged to provide the second stage trim signal. The current regulator controller also includes an error amplifier that is arranged to output an error signal based on the set signal and the current sense signal. The regulation of the current is based on the error signal.