Abstract: A multi-layer structure including a base insulating layer and a thin metal film layer (seed layer) is prepared. A plating resist layer is formed to have a prescribed pattern on the upper surface of the thin metal film layer. A metal plating layer is formed on the thin metal film layer exposed by electroplating. Then, the plating resist layer is removed, and the thin metal film layer in the region having the plating resist layer is removed. In this way, a conductive pattern including the thin metal film layer and the metal plating layer is formed. The upper surface of the base insulating layer in the region without the conductive pattern is subjected to roughening treatment. A cover insulating layer is formed on the upper surfaces of the base insulating layer and the conductive pattern. In this way, a printed circuit board is completed.

Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.

Abstract: A multilayer wiring board includes a first insulating film and a first patterned metal wiring film extending along a first major surface thereof, and a second insulating film a second patterned metal wiring film extending along a second major surface thereof. The wiring board includes solid metal interconnects connecting the first patterned metal wiring film to the second patterned metal wiring film, the interconnects extending through at least one of the first and second insulating films, and a microelectronic element disposed between the first and second patterned wiring films, the microelectronic element having bond pads conductively connected to the first patterned metal wiring films. The wiring board also includes a plurality of external contacts exposed at one or more external surfaces of the multilayer wiring board, the contacts being conductively connected to at least one of the first and second patterned metal wiring films.

Abstract: A semiconductor package features a ring-shaped silicon decoupling capacitor that reduces simultaneous switching noise. The decoupling capacitor is fabricated on a substrate from silicon using a wafer fabrication process and takes the form of an annular capacitive structure that extends around a periphery of a substrate-mounted integrated circuit (IC). The decoupling capacitor has a reduced thickness on or below a chip level and takes the place of a conventional power/ground ring. Therefore, the decoupling capacitor can be disposed within the package without increasing the thickness and the size of the package. The decoupling capacitor may be coupled to various power pins, allowing optimum wire bonding, shortened electrical connections, and reduced inductance. Bonding wires connected to the decoupling capacitor have higher specific resistance, lowering the peak of the resonance frequency and thereby reducing simultaneous switching noise.

Abstract: A method for the production of an encapsulated and at least partly organic electronic device wherein the device comprises a combination of three groups of different electronic units or components which may be separate discrete structures arranged to be produced independently from one another electrically conductively interconnected, the groups including inorganic units, passive units and active units or active components such as antennae, diodes (rectifier diodes and/or light-emitting diodes), some of which units may be organic, e.g., organic transistors, and so on, and forming a resulting optimized circuit. The components of the three groups of units forming the resulting circuit are combined on a one piece flexible substrate film which can also serve as an encapsulation layer for the device.

Abstract: In a printed wiring board 10, an upper electrode connecting portion 52 penetrates through a capacitor portion 40 in top to bottom direction so that an upper electrode connecting portion first part 52a is not in contact with the capacitor portion 40, passes through an upper electrode connecting portion third part 52c provided at the upper portion of the capacitor portion 40, and then connects from the upper electrode connecting portion second part 52b to an upper electrode 42. Furthermore, a lower electrode connecting portion 51 penetrates through the capacitor portion 40 in top to bottom direction so that it is not in contact with the upper electrode 42 of the capacitor portion 40, but is in contact with a lower electrode 41.

Abstract: A device includes a base plate, a first cell, a second cell, and a housing in which the-first cell and the second cell are arranged. The first cell and the second cell each include at least one capacitor. The device also includes a first metal plate configured connected to a capacitor in the first cell and second metal plate connected to a capacitor in the second cell. The first and second metal plates each having at least one hole configured to receive the conductive fastening element. The device also includes an electrically conductive fastening element connected through the hole in the first metal plate and the hole in the second metal plate such that the first metal plate and the second metal plate are-electrically connected to one another and mechanically attached to one another and to the base plate.

Abstract: A connector is provided for simultaneously improving both the NEXT high frequency performance when low crosstalk plugs are used and the NEXT low frequency performance when high crosstalk plugs are used. The connector includes PCB substrates made of materials having different dielectric frequency characteristics.

Abstract: Vias are used in multilayer printed circuit boards to route electrical interconnects between layers. Some via constructions embodiments result in the formation of a via-stub section. Via stub sections can distort signals passing through the interconnect and decrease the usable bandwidth of the interconnect. To minimize distortion and increase bandwidth, one or more terminating elements can be attached to the unterminated end of the via-stub section. The impedance terminating element may include, by way of non-limiting example, one or more resistors, capacitors, and/or inductors between the via stub and a ground layer. The impedance terminating element may be formed internally to the PCB or mounted to the PCB surface.

Abstract: A printed wiring board comprises the insulating layer 11 (12); at least one resistance element 311 (312) comprising a metal as a main component has 0.5 to 5 ?m of a roughened surface in an arithmetic means height in the one surface, in ?Z direction, and 5% to 50% of the arithmetic mean height in average thickness, which is embedded close to a surface on one side of the insulating layer 11 and a conductive pattern wired surface is composed of the one surface of the resistance element and the one side of the insulating layer 11; and the conductive pattern 351 (352), arranged on the conductive pattern wired surface, is connected to the terminal of the resistance element 311 (312). With this structure, it is provided the printed wiring board comprising the resistance element having an accurate and stable resistance value in a broader resistance value range.

Abstract: A process for fabricating a circuit board with embedded passive component is provided. A conductive layer including a first surface and a second surface opposing to the first surface is provided. The conductive layer has first through holes passing through the conductive layer, respectively. At least one passive component material layer is formed on the first surface. A circuit unit including second through holes is provided. Locations of the second through holes are corresponding to the locations of the first through holes, respectively. The conductive layer and the circuit unit are aligned by the first through holes and the second through holes, while the first surface of the conductive layer faces the circuit unit, and the passive component material layer is between the circuit unit and the conductive layer. The conductive layer is laminated to the circuit unit. The conductive layer is patterning to form a circuit layer.

Abstract: An interposer is constructed with a substrate body having first and second through-holes, a capacitor formed by a laminating dielectric layer and a second electrode portion on a first electrode portion, which is structured on inner surfaces of first and second through-holes and on the first surface of the substrate body. An insulation layer is formed by filling insulation material in the space within the first through-hole surrounded by second electrode portion, and a first post passes through the insulation layer, one end being electrically connected to the first electrode portion, while the first post is electrically insulated from the second electrode portion. Furthermore, a second post is formed in the second through-hole, and is connected to the second electrode portion at its peripheral surface while being electrically insulated from the first electrode portion.

Abstract: The invention provides a wiring board with built-in capacitors, that has a multilayer wiring structure and capable of mounting an IC chip thereon. The wiring board with built-in capacitors includes: a first capacitor that is built into the multilayer wiring structure and formed so that an overlapping area between a first lower electrode and a first upper electrode provided on respective surfaces of a first dielectric layer is a predetermined area; and a second capacitor that is built into the multilayer wiring structure along the same plane as the first dielectric layer and formed so that an overlapping area between a second lower electrode and a second upper electrode provided on respective surfaces of a second dielectric layer with the same thickness as the first dielectric layer is different from the predetermined area.

Abstract: A capacitive/resistive device provides both resistive and capacitive functions. The capacitive/resistive device may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.

Abstract: This invention relates to a capacitive/resistive device, which may be embedded within a layer of a printed wiring board. Embedding the device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. More specifically, the device, comprises a first metallic foil; a second metallic foil; a first electrode formed from the first metallic foil; a dielectric disposed over the first electrode, a resistor element formed on and adjacent to the dielectric; a conductive trace; and a second electrode formed from the second metallic foil and disposed over the dielectric and in electrical contact with the resistor element, wherein the dielectric is disposed between the first electrode and the second electrode and wherein said dielectric comprises an unfilled polymer of dielectric constant less than 4.0. This invention also relates to a method of making the device.

Abstract: A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. Photoimageable material is used to facilitate positioning of the capacitive dielectric being printed. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

Abstract: A thermally stabilized device is described. Single or multiple input ports are accommodated and single and multiple power ports are described. The variation of resistance of a resistor subject to varying power dissipations is minimized by injecting complementary power dissipation and thermally linking it to the resistor. In this manner the temperature of a resistor may be maintained constant even though it dissipates varying amounts of power.

Abstract: The present invention describes methods for enhancing the performance of two-capacitor low-pass filters. In certain embodiments of the invention, the capacitors are placed on opposite sides of a PCB board.

Abstract: A module incorporating a capacitor, the module including a circuit board and a layer incorporating a capacitor, wherein the circuit board includes a wiring layer and a via contact for providing electrical conductivity to a cathode and an anode of the capacitor. The layer incorporating the capacitor includes a ferromagnetic layer integrated with at least a portion of a surface of the capacitor, and in the circuit board or the layer incorporating the capacitor a coil is wound around the capacitor, or an inductor component is disposed in parallel with the capacitor. Accordingly, a module incorporating a capacitor in which miniaturization, a higher density and a reduced thickness have been achieved, as well as a method for producing the module and a capacitor used for the module, are provided.

Abstract: Methodologies are disclosed for producing multilayer electronic devices using a single screen printing mask. Plural layer devices are constructed by placing a common mask in alternating positions among alternating layers of support material such that, upon stacking of the plural layers, complimentary electrode structure is produced in alternating layers. Support material may be varied to produce different devices, including capacitors, resistors, and varistors. Multilayer electronic devices include multiple layers providing adjacent printed complimentary electrode layers having an upper surface, a lower surface, a front edge, and a back edge, and with lateral end portions of combined first and second layers trimmed so as to expose selected conductive patterns. Termination material is applied to at least such trimmed lateral end portions.

Abstract: An electronic component built-in module according to the present invention includes a pair of opposed circuit substrates, each of which includes a wiring pattern and an insulating base material containing a resin, an insulating layer that is placed between the pair of circuit substrates and contains an inorganic filler and a resin composition containing a thermosetting resin, an electronic component that is embedded in the insulating layer, and an inner via that is provided in the insulating layer so as to make an electrical connection between wiring patterns provided on different circuit substrates. A glass transition temperature Tg1 of the resin composition contained in the insulating layer and a glass transition temperature Tg2 of the insulating base material included in each of the circuit substrates satisfy a relationship Tg1>Tg2.

Abstract: A keypad encoding circuit contains a voltage dividing network and an integrated circuit. The voltage dividing network includes a string of resistors that generates an encoding signal voltage. The integrated circuit converts the encoding signal voltage into a digital value indicative of which of the keys has been pressed. The cost of the voltage dividing network is reduced by forming the resistors from a layer of conductive carbon and avoiding the cost of providing discrete resistors. Each resistor has the same resistance even where the dimensions of the conductive carbon patches that form the resistors vary. Providing the resistors does not involve additional manufacturing cost because the resistors are made in the same step as are the landing pads of the voltage dividing circuit. Manufacturing costs associated with etched printed circuit board layers are avoided because inexpensive printed layers are used to realize the required traces and resistors.

Abstract: A capacitive/resistive device provides both resistive and capacitive functions. The capacitive/resistive device may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. Conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.

Abstract: A multilayered electronic component that is easy to manufacture and that has excellent electrical characteristics includes end portions of coil wiring patterns that oppose a coil connection electrode that is displaced on the surface of a second ceramic layer due to an increase or decrease in the number of first ceramic layers. A coil connection electrode has a shape in which surface portions of second ceramic layers or opposed second ceramic layers having the first ceramic layers disposed in between are connected to the end portions of the coil wiring patterns that oppose the respective coil connection electrode, which are displaced due to the increase or decrease in the number of the first ceramic layers. A connection wiring pattern has a shape in which one portion of a coil connection electrode is connected to one portion of an external extension electrode connection pattern.

Abstract: The present invention is directed to a power semiconductor device in which a control circuit controls a power switching element, comprising: a semiconductor substrate having a front surface and a back surface; a capacitor disposed on the front surface side of the semiconductor substrate and being comprised of a stacked structure of a first conductive layer, an insulation film and a second conductive layer; and a bonding pad which is disposed on the front surface side to the capacitor and to which a bonding wire being connected, wherein the bonding pad are arranged overlapping the capacitor.

Abstract: A method and system for reducing the release of high frequency electromagnetic energy into the environment is disclosed, wherein local regions of distributed capacitance are embedded within a printed circuit board (PCB) and adjacent the PCB conductive traces act as low pass filters and thus increase the rise and/or fall times occurring on such traces. The present invention increases very short rise and/or fall times (e.g., 200 picoseconds or less) without degrading or detrimentally affecting other signal characteristics. The present invention does not substantially affect the voltage amplitude and does not affect the bit period when lengthening the rise and/or fall time. Also, the present invention does not induce any timing jitter that may cause synchronization problems within the system.

Abstract: An R-C network formed on a substrate. The capacitor includes a metal member with anodized and unanodized layers. The unanodized layer functions as one of the capacitor's electrodes. The anodized layer functions as the capacitor's dielectric layer. The resistor is formed from material on the same side of the substrate as the capacitor. In some versions of the invention, the resistor is formed on top of a substrate dielectric layer. In these versions of the invention, a conductor both functions as one of the capacitor's electrodes and connects the resistor to the capacitor. In alternative versions of the invention, the resistor is formed from a film that disposed on the undersurface a metal foil. The foil functions as the resistor to capacitor conductor. Sections of the foil that are removed expose and define the resistor. Solder balls or other connectors on the substrate surface connect the network to another component.

Abstract: To provide a multilayer wiring board mainly used for an electronic device, in which a bump passing through an interlayer insulating film allows for interlayer connection between plural wiring films insulated from one another with plural interlayer insulating layers. In the multilayer wiring board, a circuit element such as an electronic part, a semiconductor chip, or a passive element is accommodated in the interlayer insulating films so as to connect its terminal with the corresponding wiring film. In particular, the semiconductor chip is polished to a thickness of 50 ?m or smaller, and the multilayer wiring board itself for the electronic device has the flexibility.

Abstract: A semiconductor device including a semiconductor device package providing a capacitor in its circuit board and a semiconductor chip mounted on that package, wherein the capacitor is provided directly under a semiconductor chip mounting surface of the circuit board on which the semiconductor chip is to be mounted and the conductor circuit electrically connecting the semiconductor chip and capacitor is made the shortest distance by having the external connection terminals of the capacitor directly connected to the other surface of the connection pads exposed at one surface at the semiconductor chip mounting surface of the circuit board and to which the electrode terminals of the semiconductor chip are to be directly connected.

Abstract: The invention provides a wiring board with built-in capacitors, that has a multilayer wiring structure and capable of mounting an IC chip thereon. The wiring board with built-in capacitors includes: a first capacitor that is built into the multilayer wiring structure and formed so that an overlapping area between a first lower electrode and a first upper electrode provided on respective surfaces of a first dielectric layer is a predetermined area; and a second capacitor that is built into the multilayer wiring structure along the same plane as the first dielectric layer and formed so that an overlapping area between a second lower electrode and a second upper electrode provided on respective surfaces of a second dielectric layer with the same thickness as the first dielectric layer is different from the predetermined area.

Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).

Abstract: A flexible substrate comprises: a film; an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.

Abstract: A module incorporating a capacitor, the module including a circuit board and a layer incorporating a capacitor, wherein the circuit board includes a wiring layer and a via contact for providing electrical conductivity to a cathode and an anode of the capacitor. The layer incorporating the capacitor includes a ferromagnetic layer integrated with at least a portion of a surface of the capacitor, and in the circuit board or the layer incorporating the capacitor, a coil is wound around the capacitor, or an inductor component is disposed in parallel with the capacitor. Accordingly, a module incorporating a capacitor in which miniaturization, a higher density and a reduced thickness have been achieved, as well as a method for producing the module and a capacitor used for the module, are provided.

Abstract: The invention provides a wiring board with built-in capacitors, that has a multilayer wiring structure and capable of mounting an IC chip thereon. The wiring board with built-in capacitors includes: a first capacitor that is built into the multilayer wiring structure and formed so that an overlapping area between a first lower electrode and a first upper electrode provided on respective surfaces of a first dielectric layer is a predetermined area; and a second capacitor that is built into the multilayer wiring structure along the same plane as the first dielectric layer and formed so that an overlapping area between a second lower electrode and a second upper electrode provided on respective surfaces of a second dielectric layer with the same thickness as the first dielectric layer is different from the predetermined area.

Abstract: A connector is provided for simultaneously improving both the NEXT high frequency performance when low crosstalk plugs are used and the NEXT low frequency performance when high crosstalk plugs are used. The connector includes PCB substrates made of materials having different dielectric frequency characteristics.

Abstract: A thin film circuit module constructed for serial coupling to circuit conductors at printed and transmission line circuits. In one form of equalizer construction, thin film circuit elements are deposited on a supporting substrate and wherein a capacitor plate is defined a circuit resistor. Two connector applications serially couple the equalizer modules to trace conductors of a motherboard connector block and to cylindrical core conductors of a coaxial connector. Other hybrid equalizer constructions provide modules constructed of thin film resistors and pick-and-placed capacitors mounted piggyback to an equalizer module substrate.

Abstract: A circuit board comprises a base film that is a base layer, a first conductive circuit manufactured by hardening conductive paste material formed in a predetermined shape on the base film, a first insulating layer manufactured by hardening insulating paste material formed on the base film and the first conductive circuit, and a second conductive circuit manufactured by hardening conductive paste material in a predetermined shape on the first insulating layer, wherein an electronic part built-in by the first insulating layer and second insulating layer is connected to the second conductive circuit, and the first conductive circuit is connected to the second conductive circuit through a via hole.

Abstract: A method of making a resonant frequency tag which resonates at a predetermined frequency. The method involves providing a first conductive pattern having an inductive element and a first land and a second conductive pattern having a second land and a third land which are joined together by a link. The second conductive pattern is overlaid the first conductive pattern such that the second land is positioned over the first land. The third land is in electrical communication with the inductive element of the first conductive pattern. The formed resonant frequency tag is energized to determine if the tag resonates at the predetermined frequency. If the tag resonates properly, the third land is electrically coupled to the inductive element. If it does not, the second conductive pattern is adjusted so that overlapping portions of the first and second lands are changed, altering the capacitance to adjust the resonant tag frequency.

Abstract: A circuit substrate comprises a first substrate on a first surface of which circuit elements are loaded, a second substrate on which the first substrate is loaded, and noise reduction elements. Each of the noise reduction elements is sandwiched between an area of a second surface of the first substrate over against the first surface of the first substrate and a surface of the second substrate facing the second surface of the first substrate. The noise reduction element is connected between a power source terminal of the second surface of the first substrate and a power source terminal of the surface of the second substrate, and/or between a ground terminal of the second surface of the first substrate and a ground terminal of the surface of the second substrate.

Abstract: An electronic component arrangement includes a discrete electronic component having first and second terminals and a centre-exposed pad. A substrate has a first electrical conductor electrically connected to the first terminal, a second electrical conductor electrically connected to the second terminal, and a third electrical conductor. A thermally conductive element is in direct thermal communication with both the centre-exposed pad of the electronic component and the third electrical conductor of the substrate.

Abstract: A slot apparatus for a memory module on a printed circuit board. The slot apparatus includes a first memory slot set, a second memory slot set, a terminal resistor, and a serial resistance. The first and second memory slot sets are disposed on the printed circuit board. The terminal resistor is disposed between the first and second memory slot sets. The serial resistance is disposed on the printed circuit board and is electrically connected to the first and second memory slot sets through the printed circuit board. The terminal resistor is respectively and electrically connected to the first and second memory slot sets through the printed circuit board. The terminal resistor and the first and second memory slot sets are connected to a terminator voltage.

Abstract: A method for manufacturing a modular electrical circuit includes the steps of pre-manufacturing a plurality of components having fine features such as resistors, capacitors, inductances, and conductors formed on a dielectric substrate. The pre-manufactured components are laminated each to the other in a predetermined order. Each pre-manufactured component includes one or more electrical elements of the same type coupled each to the other by conducting lines. Each dielectric substrate includes through vias filled with the conductive material which serve for cross-coupling of the elements of neighboring components. Position of the passive elements, as well as conductive lines and through vias, are pre-designed to allow precise coordination between the elements of different components in the multi-layered modular electrical circuit.

Abstract: A combination run capacitor/positive temperature coefficient resistor/overload (CAP/PTCR/OL) module is described. The cover of the combination housing includes a capacitor compartment and terminal openings for receiving blade terminals of a run capacitor. The terminal openings in the cover align with blade receiving receptacles coupled to the PTCR start circuit. The blade terminals of a run capacitor are inserted into the receptacle openings and into electrical engagement with the blade receiving receptacles. The capacitor is supported and protected by a potting mixture filling the capacitor compartment.

Abstract: A method of making a resonant frequency tag having a predetermined frequency comprises forming a first conductive pattern comprising an inductive element and a first land having a first end connected to an inductive element end, and a second end spaced a predetermined distance from the first end; separately forming a second conductive pattern comprising a second land having a predetermined width and a link element; placing the second conductive pattern proximate the first conductive pattern at a first location wherein the second land overlies a portion of the first land with a dielectric therebetween establishing capacitive element plates having a first capacitance along with the inductive element forming a resonant circuit; measuring the resonant circuit frequency and comparing the measured and predetermined frequencies moving the second land along of the first land length to match the resonant frequency; and securing the second conductive pattern to the first conductive pattern.

Abstract: An electrical component with a printed circuit board. The printed circuit board has an upper face and a lower face. A microprocessor is mounted to the upper face. A capacitor is mounted to the lower face. The capacitor has a first face parallel to the printed circuit board and a second face opposite to the first face. First plates and second plates are in alternating planar relationship with a dielectric therebetween and arranged in a plane perpendicular to the plane created by the circuit board. Each first plate has a first coupling tab and a power tab on opposing edges wherein the first coupling tab terminates at the first face and the power tab terminates at the second face. Each second plate of the second plates comprises a second coupling tab and a ground tab on opposing edges wherein the second coupling tab terminates at the first face and the ground tab terminates at the second face. The first coupling tab and the second coupling tab are in electrical contact with the microprocessor.

Abstract: In an electronic circuit having an integrated circuit (110) having a power supply terminal, a noise filter disposed adjacent to the integrated circuit, and a printed board (101) having a pattern for supplying a power supply to the power supply terminals of the integrated circuit through the noise filter, the noise filter consists of a transmission line type noise filter (121–124) for removing noises having a wide frequency band.

Abstract: A contact-less high-speed signaling interface and method provide for the communication of high-speed signals across an interface, such as a die-substrate interface or die-die interface. The interface includes a transmission-line structure disposed on a dielectric medium to carry a high-speed forward incident signal, and another transmission-line structure disposed on another dielectric medium and substantially aligned with the other transmission-line structure to generate a coupled high-speed signal in a direction opposite to the incident signal.

Abstract: A process is revealed whereby resistors can be manufactured integral with a printed circuit board by plating the resistors onto the insulative substrate. Uniformization of the insulative substrate through etching and oxidation of the plated resistor are discussed as techniques for improving the uniformity and consistency of the plated resistors. Trimming and baking are also disclosed as methods for adjusting and stabilizing the resistance of the plated resistors.

Abstract: A sheet capacitor of the invention has a contact portion formed in a through-hole requiring electrical connection with an IC connection pin among the through-holes in which the IC connection pins are inserted, and a capacitor element connected to the contact portion. Another sheet capacitor of the invention includes an insulating board and a capacitor element mounted on the insulating board. The insulating board has a connection land with an IC at the upper side, and a connection land with a printed wiring board at the lower side. The capacitor element and connection lands at the upper and lower side of the insulating board are connected with each other electrically. In any one of these configurations, a capacitor element of large capacity and low ESL is connected closely to the IC, and the mounting area of the peripheral circuits of the IC can be increased.

Abstract: A capacitor-mounted metal foil of the present invention is provided with a metal foil and a plurality of capacitors formed on the metal foil. Each of the capacitors includes a conductive layer disposed above the metal foil, and a dielectric layer disposed between the metal foil and the conductive layer.