Abstract: Structures that provide decoupling capacitance to packaged IC devices with reduced capacitor and via parasitic inductance. A capacitive interposer structure is physically interposed between the packaged IC and the PCB, thus eliminating the leads and vias that traverse the PCB in known structures. A capacitive interposer is mounted to a PCB and the packaged IC is mounted on the interposer. The interposer has an array of lands on an upper surface, to which the packaged IC is coupled, and an array of terminals on a lower surface, which are coupled to the PCB. Electrically conductive vias interconnect each land with an associated terminal on the opposite surface of the interposer. Within the interposer, layers of a conductive material alternate with layers of a dielectric material, thus forming parallel plate capacitors between adjacent dielectric layers. Each conductive layer is either electrically coupled to, or is electrically isolated from, each via.

Abstract: A method of making a resonant frequency tag which resonates at a predetermined frequency. The method involves providing a first conductive pattern having an inductive element and a first land and a second conductive pattern having a second land and a third land which are joined together by a link. The second conductive pattern is overlaid the first conductive pattern such that the second land is positioned over the first land. The third land is in electrical communication with the inductive element of the first conductive pattern. The formed resonant frequency tag is energized to determine if the tag resonates at the predetermined frequency. If the tag resonates properly, the third land is electrically coupled to the inductive element. If it does not, the second conductive pattern is adjusted so that overlapping portions of the first and second lands are changed, altering the capacitance to adjust the resonant tag frequency.

Abstract: A capacitor mounting structure has four capacitors close-arranged so that the outline of the arrangement is almost rectangular. The capacitors are arranged so that an angle formed by the current vectors of each pair of adjacent capacitors is 90 degrees and that one end face in the length direction of each capacitor is directed in parallel to an inner side face of another adjacent capacitor.

Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).

Abstract: A capacitor mounting structure is proposed which can easily relieve a stress given to an extraction lead when ambient temperature is changed, soldering is made, or vibration is given, and can prevent breakage of the extraction lead. An outside holder is provided at an outside of a resin case housing a capacitor covered with a filler, and an inside holder is provided. The outside holder includes an upper outer wall bonded to an upper resin wall of the resin case. Lower openings of the resin case and the outside holder overlap with each other and form a lower space. An extraction lead is disposed in the lower space.

Abstract: A thin type printed circuit board with an enclosed capacitor of a large capacitance. The printed circuit board includes metal sheet 11 having roughed surface presenting micro-irregularities, a dielectric film for capacitor 12 covering the surface of the metal sheet, and a first electrically conductive layer of electrically conductive resin 13 covering the surface of the dielectric film. A second electrically conductive layer 14 is provided on the surface of the first electrically conductive layer in a region of via for cathode side connection 18. The metal sheet and the first and second electrically conductive layers are encapsulated by resin 15. The via for cathode side connection 18, obtained on boring through the resin 15 until reaching the second electrically conductive layer 14, is coated with an electrode 20. A via for anode side connection 19 obtained on boring through the resin 15 is coated with an electrode 21 that is insulated from the second electrically conductive layer 13 by the resin 15.

Abstract: The invention relates to a module component having chip components buried in a circuit board, and a method of manufacturing the same, and more specifically it relates to a module component capable of obtaining desired circuit characteristics and functions stably if the size of the component is reduced, being produced very efficiently, and suited to machine mounting, and a method of manufacturing the same.

Abstract: A device, such as a radio frequency identification (RFID) inlay structure for an RFID tag or label, includes a microstructure element, with leads coupling the microstructure element to other electrical or electronic components of the device. The leads may be electroless-plated leads, and may contact connectors of the microstructure element without the need for an intervening planarization layer.

Abstract: A printed-wiring substrate including a capacitor element, as well as a method for fabricating the printed-wiring substrate. An insulating substrate 3 is molded by placing a capacitor element 13 in a mold and charging a resin 4 into the mold. Therefore, the capacitor element 13 having a size (i.e., electrostatic capacitance) sufficient to suppress switching noise of an IC chip 15 and stabilize operation power voltage can be disposed, while providing a dimensional margin. Since the possibility of failing to embed the capacitor element 13 decreases, the printed-wiring substrate can be fabricated at reduced cost.

Abstract: A circuit board for a liquid discharging apparatus in which coating performance of a protective layer and a cavitation resistive film on a heat generating element is excellent and durability is excellent and a manufacturing method of such a circuit board are provided. A surface portion of a wiring material layer is processed so that an etching speed of the surface portion is made higher than that of the material forming the wiring material layer. It is desirable to execute a process for forming at least one selected from a fluoride, a chloride, and a nitride of the material forming the wiring material layer into the surface portion of the wiring material layer.

Abstract: A method for manufacturing a modular electrical circuit includes the steps of pre-manufacturing a plurality of components having fine features such as resistors, capacitors, inductances, and conductors formed on a dielectric substrate. The pre-manufactured components are laminated each to the other in a predetermined order. Each pre-manufactured component includes one or more electrical elements of the same type coupled each to the other by conducting lines. Each dielectric substrate includes through vias filled with the conductive material which serve for cross-coupling of the elements of neighboring components. Position of the passive elements, as well as conductive lines and through vias, are pre-designed to allow precise coordination between the elements of different components in the multi-layered modular electrical circuit.

Abstract: A conductor pattern is formed on a resin film which is made of a thermoplastic resin. Each single-sided conductor pattern film has via-holes filled with an electrically conductive paste. A printed conductor pattern and a printed resistor are formed on a ceramic substrate. The single-sided conductor pattern films are laminated on the ceramic substrate. Then, the multilayered assembly is heated and pressed from both sides thereof to obtain a printed circuit board. During the heat and press treatment, respective single-sided conductor pattern films and the ceramic substrate bond together while the interlayer connection is obtained between the conductor patterns as well as between the conductor pattern and the printed conductor pattern.

Abstract: A multiple network electronic component includes an insulator having a first element-forming surface and a second element-forming surface spaced thicknesswise from the first element-forming surface, a plurality of first intermediate film conductors 20A formed on the first element-forming surface and spaced from each other, a plurality of second intermediate film conductors 20B formed on the second element-forming surface and spaced from each other in corresponding relation to the first intermediate film conductors, and a plurality of through-conductive paths penetrating the insulator for electrically connecting each of the first intermediate film conductors to a corresponding one of the second film conductors. The first element-forming surface is formed with a plurality of first elements and a plurality of second elements, and each of the first and second elements has one end connected to a respective one of the first intermediate film conductors.

Abstract: A printed circuit board includes a power layer for use in providing electrical power to circuit components and a ground layer for use in carrying electrical current away from the circuit components. A loss element connects electrically between the power layer and ground layer to suppress electrical noise caused by changes in current flow in the circuit components.

Abstract: A connector is provided for simultaneously improving both the NEXT high frequency performance when low crosstalk plugs are used and the NEXT low frequency performance when high crosstalk plugs are used. The connector includes PCB substrates made of materials having different dielectric frequency characteristics.

Abstract: An electronic component built-in module according to the present invention includes a pair of opposed circuit substrates, each of which includes a wiring pattern and an insulating base material containing a resin, an insulating layer that is placed between the pair of circuit substrates and contains an inorganic filler and a resin composition containing a thermosetting resin, an electronic component that is embedded in the insulating layer, and an inner via that is provided in the insulating layer so as to make an electrical connection between wiring patterns provided on different circuit substrates. A glass transition temperature Tg1 of the resin composition contained in the insulating layer and a glass transition temperature Tg2 of the insulating base material included in each of the circuit substrates satisfy a relationship Tg1>Tg2.

Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).

Abstract: A distributive capacitor 205 and impedance matching network 201 and transmitter 101 that use the capacitor and are suitable for high density integration applications include a printed circuit substrate 303 comprising one of a printed circuit board and a silicon based substrate, a first conductive layer 305 disposed on the printed circuit substrate, a layer of dielectric material 307 disposed on the first conductive layer and having a thickness, the dielectric material having a dielectric constant more than five times greater than the dielectric constant of the printed circuit substrate; and a second conductive layer 309 disposed on the layer of dielectric material and having a second length 311 and a second width 603 that are selected so that the distributive capacitor operates as a transmission line.

Abstract: In an electronic circuit equipment using a multilayer circuit board on which a semiconductor chip is mounted, a thin film capacitor is provided on the multilayer circuit board. Moreover, a first electrode of the thin film capacitor and a first wiring of the multilayer circuit board are electrically connected to each other, and a second electrode of the thin film capacitor and a second wiring of the multilayer circuit board are electrically connected to each other, respectively. Furthermore, a thin film dielectric of the thin film capacitor was grown epitaxially with the first electrode as its base. The employment of the multilayer circuit board makes it possible to provide the electronic circuit equipment using the multilayer circuit board that includes the built-in thin film capacitor having the high dielectric-constant thin film dielectric.

Abstract: A method is provided for producing a capacitor to be embedded in an electronic circuit package comprising the steps of selecting a first conductor foil, selecting a dielectric material, coating the dielectric material on at least one side of the first conductor foil, and layering the coated foil with a second conductor foil on top of the coating of dielectric material. Also claimed is an electronic circuit package incorporating at least one embedded capacitor manufactured in accordance with the present invention.

Abstract: An active package for an integrated circuit may include an integrated circuit and an active component that is part of the circuit topology for the integrated circuit. The active component forms at least a portion of the housing for the integrated circuit. The integrated circuit may be housed in a shell formed by one or more discrete components. The active package may be formed in the same geometry and dimensions as a standard passive integrated circuit package, or may be formed in a shape to fit inside a standard or specially made battery package, or for another special application. A smart component may include a discrete component or a semiconductor-based resistor, capacitor or inductor, and a separate integrated circuit housed in the same housing as the discrete component or a semiconductor-based resistor, capacitor or inductor. The integrated circuit may control at least one electrical parameter of the discrete component or a semiconductor-based resistor, capacitor or inductor.

Abstract: In a computer system two integrated circuit devices are operatively mounted on the main system board using a pair of interstitial circuit boards sandwiched between the integrated circuit devices and the system board and having substantially smaller footprints than the system board. Each interstitial board has a series of terminating components, representatively resistors, interposed in its circuitry which interconnects the associated integrated circuit board with system board circuitry that, in turn, operatively couples the two integrated circuit boards. The incorporation of the terminating components in the interstitial boards instead of in the system board reduces the circuit complexity of the system board and the required number of layers therein, thereby reducing the cost of the system board and substantially simplifying its signal trace routing design.

Abstract: In a leadframe packaging structure, a leadframe includes a plurality of first leads, a plurality of second leads, and a die pad. The first leads define a chip-bonding region in which is arranged the die pad. The second leads extend and terminate into a plurality of contact pads in the chip-bonding region. An adhesive tape further is bonded on bottom surfaces of the contact pads. A chip is bonded on the die pad. At least a passive device is mounted between and electrically connects the contact pads. A plurality of bonding wires respectively connect the chip, the passive device, and the first and second leads. An encapsulant material encapsulates the chip, the passive device, and the bonding wires.

Abstract: Surface applied passive devices for use on electronic circuit boards are formed by applying layers of conductive, insulating, and other material to a thin polymer film carrier. The surface applied passives are thin enough to fit underneath standard integrated circuit packages in order to conserve space on the circuit board. Resistors, capacitors, inductors and other passive circuits may be formed on thin polymer films, less than 8 mils thick. This significantly aids in conserving space on an electronic circuit board.

Abstract: Three or more, or two or more types of electronic components are formed on one substrate, and these electronic components form an aggregated planar surface on a surface of the substrate.

Abstract: A resistor-capacitor network for terminating transmission lines. The network includes a core of dielectric material. Capacitors are formed within the core from spaced apart electrode plates. Terminals extend from the electrode plates to a top surface of the core. The electrode plates are oriented perpendicular to the top surface. Ball pads are located on the top surface. Resistors are located on the top surface and are connected between the ball pads and terminals. Conductive spheres are attached to the ball pads.

Abstract: An electronic device includes a wiring board, and at least one pair of signal lines that is provided on the wiring board in parallel and has an equal length. A chip is mounted on the wiring board and includes at least one differential driver which outputs complementary digital transmit signals to said at least one of lines. A pair of power system lines is provided to supply first and second power supply voltages to the above-mentioned at least one differential driver. The power system lines are parallel to each other and have an equal length.

Abstract: A packaging structure with low switching noises is disclosed. In this structure, a chip capacitor is connected to a chip. The chip capacitor is a capacitor structure formed using a high dielectric material to provide a better noise filtering effect. Therefore, the invention can effectively lower switching noises.

Abstract: A thin film capacitor is provided with a substrate having a thickness equal to or more than 2 &mgr;m and equal to or less than 100 &mgr;m; a lower electrode on the substrate, which includes at least a highly elastic electrode and an anti-oxidation electrode on the highly elastic electrode; a dielectric thin film on the first lower electrode; and an upper electrode on the dielectric thin film; wherein the highly elastic electrode is made of a material having a Young's modulus higher than that of the anti-oxidation electrode.

Abstract: A multi-layered substrate having built-in capacitors is disclosed. The substrate comprises at least one high permittivity of dielectric material filled in the through holes between the power plane and the ground plane so as to form capacitors. The built in capacitors are to decouple high frequency noise due to the voltage fluctuation.

Abstract: A chip component assembly is provided that includes a plurality of chip components each having respective first and second terminal elements, the first terminal elements being joined to corresponding solder pads on a printed circuit board, the solder pads being in communication with electronic circuitry of the printed circuit board, and the second terminal elements being joined together by an array ground plane of a grounding device. The grounding device additionally includes a ground path structure which physically and electrically connects the array ground plane, and thus the chip components, to a ground pad located on the printed circuit board so as to provide a ground path from the chip components. Preferably, the array ground plane additionally includes a plurality of resilient contact elements which provide for substantial and continuous contact between the array ground plane and an ancillary ground plane, such as the top cover of a PC card.

Abstract: A wiring board simplifying connection of electronic parts mounted on a principal face side of the wiring board and chip capacitors mounted on a reverse face side thereof in such a manner that the wiring board 100 mounting the chip capacitors 160 on a reverse face 101c-side comprises bumps 129 capable of being connected to IC chip 10, first and second capacitor connecting pads 149p, 149g connecting the upper face parts 163 of the chip capacitors 160, a plurality of insulating layers 121, 111, 141 intervening the first and the second capacitor connecting pads, and first and second converting-conductor layers 146p, 146g in stripe pattern formed at interlayer 152, connected to the bumps 129 at the principal face 101b-side, connected to the first capacitor connecting pads 149p at the reverse face 101c-side or the second capacitor connecting pads 149g for changing the connecting positions or the connecting number between the principal face side and the reverse face side.

Abstract: The present invention provides a small-sized capacitor module for use in an inverter, which is capable of suppressing the occurrence of unwanted inductance components in an electric connection path and which is suitable for a large current use. The present capacitor module is constituted by: mounting a plurality of ceramic capacitors 3 having first and second terminals 3a and 3b on the first surface 1 of a substrate 2; forming a first conductor 12 on the first surface of the substrate 2; forming a second conductor 14 on the second surface of the substrate 2; electrically connecting first and second terminals 3a and 3b to the first conductor 12 and the second conductor 14, respectively; forming, on the substrate 2, first and second terminal mounting portions where the respective first and second terminals of a switching module are mounted; and electrically connecting the first and second terminal mounting portions to the first and second conductors 12 and 14, respectively.

Abstract: A multilayered circuit board is constructed such that holes penetrating through second and third dielectric layers, interposed between a pair of electrodes for constructing a capacitor, are filled with a material having a high dielectric constant respectively in a capacitor-forming area, and a plurality of (for example, four) holes are filled with a material having a high magnetic permeability respectively so as to penetrate through first to fifth dielectric layers in a magnetic flux-passing area of a coil constructed by coil electrodes of first to fifth turns in a coil-forming area.

Abstract: An interposer adapted to be used between a mounting board and a semiconductor chip which is to be mounted on the mounting board. The interposer comprises: a heat-resistant insulator having first and second surfaces, the insulator being provided with a plurality of through-holes opened at the first and second surfaces; wiring patterns formed on the first and second surfaces of the insulator electrically connected to each other by means of a conductor provided on an inner wall of at least one of the through-holes; and a capacitor. The capacitor comprises: a first electrode formed on the insulator and having a connecting portion formed on an inner wall of at least one of the other through-holes; a dielectric layer formed on the first electrode; and a second electrode formed on the dielectric layer.

Abstract: An electronic circuit package (400, FIG. 4) includes one or more trench vias (404, FIG. 4). Each trench via makes electrical contact with one or more terminals (526, FIG. 5) of a discrete device (520, FIG. 5) embedded within the package. A trench via can extend to a surface of the package, or one or more conventional vias (620, FIG. 6) formed within layers (602, FIG. 6) above or below the trench via can electrically connect the trench via, and thus the discrete device, to the surface of the package. The discrete device (520, FIG. 5) can be a capacitor, in one embodiment, providing decoupling capacitance to an integrated circuit load. Besides being implemented in a package, the trench vias also could be implemented in other types of electronic circuit housings (e.g., interposers, sockets, and printed circuit boards).

Abstract: A resistive element, a circuit board, and a circuit package, as well as a method of adding a resistive element to a circuit board are described. The resistive element includes a first contact point connected to a capacitor terminal, a second contact point connected to a circuit board plane, and resistive material connected to the first and second contact points. The invention may also include a circuit board with one or more resistive elements, as well as a circuit package, such as an integrated circuit or a discrete bypass capacitor, including one or more resistive elements, applied to an outside surface. The value of resistance for the resistive element can be selected by design to have a predetermined relationship with the equivalent resistance of an associated circuit board and connecting circuitry.

Abstract: Apparatus and methods for connecting a device to an integrated circuit. The apparatus includes an insulating substrate that has two major sides and a number of sites for housing components. Each site has a first node on one of the two sides of the insulating substrate and a second node on the other of the two sides of the insulating substrate. Each site also has components that are aligned normal to the sides of the insulating substrate and are connected to the nodes at the site. Such apparatus are useful as adapters for testing an integrated circuit, such as connecting a test device to the integrated circuit with the adapter and observing and/or driving signals through the adapter.

Abstract: An eletronic package comprising a printed circuit board on which are mounted a plurality of decoupling capacitors is disclosed. A carrier component electrically connects an integrated circuit to the printed circuit board through a plurality of solder balls. The plurality of solder balls comprises at least one solder ball for the integrated circuit ground voltage connection and at least one solder ball for the integrated circuit power voltage connection. The plurality of decoupling capacitors is organized as a set of ‘n’ capacitors ranged from a lower capacitor value Clow to a higher capacitor value Chigh such that the range Clow to Chigh of the ‘n’ capacitor values is a function of the frequency range Flow to Fhigh on which the integrated circuit operates.

Abstract: A method of manufacturing a printed circuit board with a polymer thick-film (PTF) resistor whose dimensions can be defined with improved precision by providing a circuit board construction having a planar surface where the resistor is to be deposited. To achieve the desired board construction, the interconnect for the resistor is pattern plated using a permanent photodielectric layer as a plating mask instead of a sacrificial plating resist. The interconnect can be patterned before or after the PTF resistor ink is printed. The x and z dimensions (width and thickness, respectively) of the resistor are determined by the deposition process, while the y dimension (electrical length) is accurately determined by copper terminations.

Abstract: The invention relates to a multiple-component unit in which at least two passive components have been realized one above the other. A multiple-component unit thus comprises at least one resistor and at least one capacitor, or at least two capacitors. This space-saving construction allows for a miniaturization of circuits. A further miniaturization can be achieved in that the multiple-component units are not manufactured as discrete components, but are integrated into ICs.

Abstract: An interposer adapted to be used between a mounting board and a semiconductor chip which is to be mounted on the mounting board. The interposer having a heat-resistant insulator having first and second surfaces, the insulator being provided with a plurality of through-holes opened at the first and second surfaces; wiring patterns formed on the first and second surfaces of the insulator electrically connected to each other by means of a conductor provided on an inner wall of at least one of the through-holes; and a capacitor. The capacitor has first electrode formed on the insulator and having a connecting portion formed on an inner wall of at least one of the other through-holes, a dielectric layer formed on the first electrode, and a second electrode formed on the dielectric layer.

Abstract: A printed circuit board (PCB) includes a first layer having first and second surfaces, with an above-board device mounted thereon. The PCB includes a second layer having third and fourth surfaces. One of the surfaces can include a recessed portion for securedly holding an interstitial component. A via, electrically connecting the PCB layers, is also coupled to a lead of the interstitial component.

Abstract: An insulation layer is formed on a ground layer. The insulation layer includes first and second regions for forming wiring layers. The impedance of a wiring layer formed on the second region is lower than that of a wiring layer formed on the first region. A signal line pattern is formed on the wiring layer on the first region of the insulation layer. A power supply plane is formed on the wiring layer on the second region of the insulation layer in order to feed power to the signal line pattern through a termination resistor connected to the signal line pattern.

Abstract: The invention provides a circuit-mounted board which can improve the reliability in the operations of a system having expansion slots. The load adjustment board is a circuit-mounted board to be used by being inserted into the expansion slot of the system, and comprises a plurality of connection pins to obtain electric connection with another board, and devices each having variable electric property, such as a variable resistance or a variable capacitor, provided for each connection pin. One end of each device is connected to the respective connection pin, and the other end is fixed to the predetermined potential (ground, for example). The board is inserted into a vacant slot of the expansion slots of the system to suppress reflection noise etc.

Abstract: A multi-chip module includes bare IC chips mounted on respective areas of a printed wiring board. Outer electrode pads on the peripheries of the board are soldered to another printed wiring board such as a motherboard. Lead pads and the outer electrode pads are interconnected through a circuit pattern, through holes, and interstitial via holes. The circuit pattern is disposed on a die bonding surface of the bare IC chips for which insulation is not necessary.

Abstract: A microwave-frequency microcircuit assembly includes an integrated circuit structure having a circuit ground. A support structure includes a grounded metallic carrier, and a dielectric substrate having a top surface, a bottom surface contacting the carrier, and a capacitor via extending through the dielectric substrate. A metallization on the top surface of the substrate includes an input metallization trace to the integrated circuit structure, an output metallization trace from the integrated circuit structure, and a substrate ground plane upon which the integrated circuit structure is affixed. A thin-film capacitor resides in the capacitor via and is electrically connected between the substrate ground plane and the carrier. An electrical resistor is connected between the circuit ground of the integrated circuit structure and the carrier to self-bias the integrated circuit structure.

Abstract: A multiple chip module (MCM) for use with baseband, RF, or IF applications includes a number of active circuit chips having a plurality of different functions. The active circuit chips are mounted on a substrate that is configured to provide an integrated subsystem in a single MCM package. The MCM includes a number of features that enable it to meet electrical performance, high-volume manufacturing, and low-cost requirements. The MCM may incorporate split ground planes to achieve electronic shielding and isolation, vias configured as both thermal sinks and grounding connections, and specifically configured die attach pads and exposed ground conductor pads.

Abstract: A thin electrical circuitry structure is formed which contains conductive circuitry traces, integral capacitors and integral resistors. A first laminate structure comprises a conductive foil having a layer of embeddable dielectric material laminated thereto. A second laminate structure comprises a conductive foil having a layer of resistive material on one side, the thickness of the resistive material layer being less than that of the layer of embeddable dielectric material. The resistive material layer is circuitized to produce resistive patches, and the two structures are laminated together, embedding the resistive patches in the dielectric material layer. One of the foils is circuitized providing circuitry traces, optional inductor coils, and capacitor plates. That foil embedded in dielectric laminate to support the structure for further processing. The other foil is then circuitized providing circuitry traces, optional inductor coils and capacitor plates.

Abstract: A method of and apparatus for identifying an item to or with which a radio frequency identification tag is attached or associated is provided. The tag is made of a nonconductive material to have a flat surface on which a plurality of circuits are pressed, stamped, etched or otherwise positioned. Each circuit has a capacitance and an inductance. The capacitance is formed from the capacitive value of a single capacitor. The inductance is formed from the inductive value of a single inductor coil having two conductive ends each connected to the capacitor. Each tag is associated with a binary number established from a pattern of binary ones and zeros which depend on the resonance or nonresonance of each circuit, respectively and the circuits position with respect to the binary table. The binary number may be converted to a decimal number using the binary table for conversion.